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authorVic Yang <victoryang@chromium.org>2013-09-10 17:55:02 +0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2013-09-11 19:45:38 +0000
commiteff7a1910a60b1d30b10257fd4a12b5ed1402594 (patch)
treed604e3ec704575a5bdbedc7f172ed062586cdf12 /test
parent876d4c0031ce0d277f23eb08760c83b854038064 (diff)
downloadchrome-ec-eff7a1910a60b1d30b10257fd4a12b5ed1402594.tar.gz
Support multi-bit mask in STM32L's GPIO functions
The definition of GPIO interface allows passing in multi-bit mask, and this is what's done by gpio_config_module(). Fix STM32L's function so that it doesn't accidentally set incorrect GPIO register values. BUG=chrome-os-partner:22605 TEST=On Kirby, do 'led r 0' and check the value of 0x40020800 is 0x01540000. BRANCH=None Change-Id: I9a1c8074aab7345485a590ecf138bf99d0742997 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/168739 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'test')
-rw-r--r--test/utils.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/test/utils.c b/test/utils.c
index e2230bfd44..60d2c83a0f 100644
--- a/test/utils.c
+++ b/test/utils.c
@@ -154,6 +154,20 @@ static int test_uint64divmod_2(void)
TEST_CHECK(r == 0 && n == 0ULL);
}
+static int test_get_next_bit(void)
+{
+ uint32_t mask = 0x10001010;
+
+ TEST_ASSERT(get_next_bit(&mask) == 28);
+ TEST_ASSERT(mask == 0x1010);
+ TEST_ASSERT(get_next_bit(&mask) == 12);
+ TEST_ASSERT(mask == 0x10);
+ TEST_ASSERT(get_next_bit(&mask) == 4);
+ TEST_ASSERT(mask == 0x0);
+
+ return EC_SUCCESS;
+}
+
static int test_shared_mem(void)
{
int i, j;
@@ -299,6 +313,7 @@ void run_test(void)
RUN_TEST(test_uint64divmod_0);
RUN_TEST(test_uint64divmod_1);
RUN_TEST(test_uint64divmod_2);
+ RUN_TEST(test_get_next_bit);
RUN_TEST(test_shared_mem);
RUN_TEST(test_scratchpad);
RUN_TEST(test_cond_t);