diff options
author | Diana Z <dzigterman@chromium.org> | 2022-07-27 09:09:21 -0600 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-08-03 00:20:32 +0000 |
commit | 83f85e3648f515896626a5e21595109dd5d824b7 (patch) | |
tree | ab61dfeba88822a7c6017c6b585f3cde7429f91d /test | |
parent | 1192d2ac276b062bc06e45af48870a7f87e2b692 (diff) | |
download | chrome-ec-83f85e3648f515896626a5e21595109dd5d824b7.tar.gz |
TCPMv2: Add BIST shared mode
Systems which have a shared power reserve over ports are required to
implement BIST shared test mode. This mode will force us to advertise
more current than we can actually support, but it is only for test
purposes and the tester should not actually draw past our VIF declared
maximum.
BRANCH=None
BUG=b:237256250
TEST=zmake testall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Iacb17e0b3eb14c5b38220c7008aa3d2a8f0607a9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3789835
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Diffstat (limited to 'test')
-rw-r--r-- | test/fake_usbc.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/test/fake_usbc.c b/test/fake_usbc.c index 510370ed2e..e30afadd46 100644 --- a/test/fake_usbc.c +++ b/test/fake_usbc.c @@ -328,6 +328,14 @@ void dpm_remove_source(int port) { } +void dpm_bist_shared_mode_enter(int port) +{ +} + +void dpm_bist_shared_mode_exit(int port) +{ +} + int dpm_get_source_pdo(const uint32_t **src_pdo, const int port) { *src_pdo = pd_src_pdo; |