diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2016-02-19 16:40:11 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-02-22 23:51:19 -0800 |
| commit | 3f55d939d9b3ed939a230dc86e560ab422f06883 (patch) | |
| tree | f9e045decced23e54da7f378c3738fc9a7f36d9a /test | |
| parent | 98b0e13f606aefb7e2964bfa0358188d4fd31cfe (diff) | |
| download | chrome-ec-3f55d939d9b3ed939a230dc86e560ab422f06883.tar.gz | |
cr50: test: do not leave the bootsrtap pin in the wrong state
It was observed that the b1 test board falls into bootstrap mode once
the reset button is pressed after a firmware upgrade.
The reason turns out to be that the wrong lead was considered to be
the reset pin, the BIO4, responsible for bootstrapping, was used
instead of the reset pin.
Come to think of it, there is no need to reset the device each time
the FTDI SPI interface is initialized. Let's just drive the bootsrtap
pin to the correct level and not generate the reset pulse at all.
BRANCH=none
BUG=chrome-os-partner:37754
TEST=pressing the reset button on the b1 board now properly restarts
the device.
Change-Id: I123dad8043807c8ff01e12254f9efc2f0d1aaa13
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/328811
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Diffstat (limited to 'test')
| -rw-r--r-- | test/tpm_test/ftdi_spi_tpm.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/test/tpm_test/ftdi_spi_tpm.c b/test/tpm_test/ftdi_spi_tpm.c index 6cf8761b24..713a8d7ac9 100644 --- a/test/tpm_test/ftdi_spi_tpm.c +++ b/test/tpm_test/ftdi_spi_tpm.c @@ -207,10 +207,8 @@ int FtdiSpiInit(uint32_t freq, int enable_debug) if (!mpsse_) return false; - /* Reset the TPM using GPIOL0, issue a 100 ms long pulse. */ + /* Just in case, make sure bootsrap is not triggered. */ PinLow(mpsse_, GPIOL0); - usleep(100000); - PinHigh(mpsse_, GPIOL0); FtdiReadReg(TPM_DID_VID_REG, sizeof(did_vid), &did_vid); |