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| author | Eric Yilun Lin <yllin@chromium.org> | 2020-05-11 15:04:32 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-05-14 09:02:36 +0000 |
| commit | 5a0d616bbe7969bc18ab02856051e09899b21011 (patch) | |
| tree | c9b854a002176b6565a67bc69c17a3a424b76200 /util/ec_flash.h | |
| parent | 498b779c94c3306bc7a89a143d5e7394bc360c54 (diff) | |
| download | chrome-ec-5a0d616bbe7969bc18ab02856051e09899b21011.tar.gz | |
asurada: enable C0/C1 USBPD
This CL enable it81202 on-chip TCPC at C0 and C1 port.
The functionality is not completed yet (TODO: PPC).
C0: on the main board.
C1: on the subboard.
BRANCH=master
BUG=b:152562604
TEST=ensure C0 and C1 can do PD-comm (SNK and SRC)
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Change-Id: Ia8a2e557fd376a05f422bc1139abfd78be0c2b58
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2192466
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Ayo Wu <ayowu@google.com>
Diffstat (limited to 'util/ec_flash.h')
0 files changed, 0 insertions, 0 deletions