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| author | Aseda Aboagye <aaboagye@google.com> | 2017-05-11 13:09:02 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-06-07 23:45:31 -0700 |
| commit | cfcbe9da95a4652a0e058574ebbebfdcc5329cf7 (patch) | |
| tree | 46ddf4827130df533179654ed966db9836765d6c /util/signer | |
| parent | 27a39b44d11d0da165d491c1b14cde9ac60f4874 (diff) | |
| download | chrome-ec-cfcbe9da95a4652a0e058574ebbebfdcc5329cf7.tar.gz | |
cr50: Enable EC UART bit banging.
Cr50 needs to be able to bit bang the EC UART in order to flash certain
ECs such as the STM32 family. This is because the UART block on the
chip has no provision to change the parity which is necessary for the
STM32 bootloader protocol.
This commit adds a configuration to bit bang the EC UART. It's been
tested at 9600 baud.
BUG=b:35648297
BRANCH=cr50
TEST=With a logic analyzer, verify that TX to the EC can be bit banged
with no issues at 9600.
TEST=With some other changes, verify that cr50 is able to flash an EC
image to an STM32 EC.
Change-Id: Ice72aff133f268b5b7f0868aeec590a21404d1af
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/503474
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Diffstat (limited to 'util/signer')
0 files changed, 0 insertions, 0 deletions