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authorZhuohao Lee <zhuohao@chromium.org>2020-03-05 21:08:19 +0800
committerCommit Bot <commit-bot@chromium.org>2020-04-07 14:42:20 +0000
commit598ef8b43219dd769602f884b49556f64ed157c0 (patch)
treec2327bcde376e366b44f8962137a11cf0cdb8fcd /util
parent62e4ff1b2ace788736a37e7fc26b297bd8954eb5 (diff)
downloadchrome-ec-598ef8b43219dd769602f884b49556f64ed157c0.tar.gz
flash_fp_mcu: Add a config for the Volteer fingerprint MCU
To enable the flash_fp_mcu to update the fingerprint MCU firmware, we need to add a config for the Volteer fingerprint MCU. BUG=b:147687800 BRANCH=None TEST=use 'flash_fp_mcu ${BINARY_PATH}', the firmware is programmed correctly. Change-Id: Ib62ae29ca805985e0256c2ebee5fee633ccef082 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2089214 Reviewed-by: Alex Levin <levinale@chromium.org>
Diffstat (limited to 'util')
-rw-r--r--util/flash_fp_mcu21
1 files changed, 21 insertions, 0 deletions
diff --git a/util/flash_fp_mcu b/util/flash_fp_mcu
index 80b3385c56..0dd3af6409 100644
--- a/util/flash_fp_mcu
+++ b/util/flash_fp_mcu
@@ -293,6 +293,27 @@ config_nocturne() {
readonly GPIO_PWREN=371
}
+config_volteer() {
+ check_gpio_chip_exists "gpiochip252"
+ check_gpio_chip_exists "gpiochip445"
+
+ readonly SPIDEV="/dev/spidev1.0"
+
+ # See
+ # third_party/coreboot/src/soc/intel/tigerlake/include/soc/gpio_soc_defs_tgl.h
+ # for pin name to number mapping.
+ # Examine `cat /sys/kernel/debug/pinctrl/INT34C5:02/gpio-ranges` and
+ # `cat /sys/kernel/debug/pinctrl/INT34C5:00/gpio-ranges` on a volteer
+ # device to determine gpio number from pin number.
+
+ # FPMCU RST_ODL is on GPP_C23 = 252 + (211 - 188) = 275
+ readonly GPIO_NRST=275
+ # FPMCU BOOT0 is on GPP_C22 = 252 + (210 - 188) = 274
+ readonly GPIO_BOOT0=274
+ # FP_PWR_EN is on GPP_A21 = 445 + 63 = 508
+ readonly GPIO_PWREN=508
+}
+
# The "platform name" corresponds to the underlying board (reference design)
# that we're running on (not the FPMCU or sensor). At the moment all of the
# reference designs use the same GPIOs. If for some reason a design differs in