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| author | Firas Sammoura <fsammoura@google.com> | 2022-06-17 16:41:11 +0000 |
|---|---|---|
| committer | Firas Sammoura <fsammoura@google.com> | 2022-06-17 16:41:11 +0000 |
| commit | 6c1587ca70f558b4f96b3f0b18ad8b027d3ba99d (patch) | |
| tree | 9a15b4a98d7987870a1805a33883d0cf9123fc05 /zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x | |
| parent | 63a8a1366e390b757c37e167927102be0fc4fb63 (diff) | |
| parent | a46d3f3feaac0d69012f61b66f652bff991d05a7 (diff) | |
| download | chrome-ec-6c1587ca70f558b4f96b3f0b18ad8b027d3ba99d.tar.gz | |
Merge remote-tracking branch cros/main into firmware-fpmcu-dartmonkey-release
Generated by: ./util/update_release_branch.py --board dartmonkey --relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-fpmcu-dartmonkey-release
Relevant changes:
git log --oneline 63a8a1366e..a46d3f3fea -- board/nocturne_fp
board/dartmonkey common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh
981fb88cf8 docs/fingerprint: Resolve contradictory FPMCU factory flashing instructions
60032a8828 docs/fingerprint: Clean up formatting in fingerprint-factory-quick-guide.md
f49eb6f894 docs/fingerprint: Run mdformat
64aa5fc7bb docs/fingerprint: Add links to info on fuzz testing
8bd99cc434 fpsensor: Use correct return type
2b2d7a991d fpsensor: Use correct return type
BRANCH=None
BUG=b:234772776 b:234181908
TEST=`make -j buildall`
Cq-Include-Trybots: chromeos/cq:cq-orchestrator
Signed-off-by: Firas Sammoura <fsammoura@google.com>
Change-Id: I1714a77d292aad81bdc71982c88b2b067cfdada7
Diffstat (limited to 'zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x')
| -rw-r--r-- | zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x index 998116c243..9e37b6a534 100644 --- a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x +++ b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x @@ -20,16 +20,18 @@ if SOC_SERIES_MEC172X config CROS_EC_PROGRAM_MEMORY_BASE default 0xc0000 +# Data SRAM base config CROS_EC_RAM_BASE - default 0xc0000 + default 0x118000 -# Data size: 64K - 2K, top 1KB is persistent +# Total data SRAM size config CROS_EC_DATA_RAM_SIZE - default 0x00F800 + default 0x010000 -# Code + Data: Top 1KB is peristent +# Top 2KB reserved for PUF leaving 62KB +# 61KB for data + 1KB persistent across chip reset. config CROS_EC_RAM_SIZE - default 0x067800 + default 0x00f800 config FLASH_SIZE default 512 @@ -37,8 +39,9 @@ config FLASH_SIZE config CROS_EC_RO_MEM_OFF default 0x0 +# was 0x40000 config CROS_EC_RO_SIZE - default 0x40000 + default 0x3F000 # RW firmware in program memory - Identical to RO, only one image loaded at a # time. |