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| author | Wai-Hong Tam <waihong@google.com> | 2021-07-15 12:58:02 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-07-15 22:50:39 +0000 |
| commit | afcca55528b45fccec91db1b87fd8c458c6ca825 (patch) | |
| tree | c8bc4de5be6cc840209d2683b9538df31731a90a /zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx | |
| parent | 278c7a1290a8a8715b194046bebcea78628dbb56 (diff) | |
| download | chrome-ec-afcca55528b45fccec91db1b87fd8c458c6ca825.tar.gz | |
zephyr: Source the chip/ Kconfig in ARCH-specific
The Zephyr upstream sources the soc/ directory in ARCH-specific.
Our shim zephyr/app/ec should align to source the chip/ directory
in ARCH-specific. So it won't result defining a default value in
the shim layer but missing the original definition in Zephyr.
BRANCH=None
BUG=b:192253134
TEST=Built the brya, lazor, asurada, and posix-ec images.
Change-Id: I20476f8b071d530008333850d4d0a4c9598d0958
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3032867
Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx')
| -rw-r--r-- | zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx new file mode 100644 index 0000000000..b4a7c36a3d --- /dev/null +++ b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx @@ -0,0 +1,37 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# +# This file defines the default config values shared by all NPCX chipsets +# + +if SOC_FAMILY_NPCX + +# ADC +# The resolution and oversamplig values are fixed by the NPCX ADC driver +config PLATFORM_EC_ADC_RESOLUTION + default 10 + +config PLATFORM_EC_ADC_OVERSAMPLING + default 0 + +# Set the system clock to 15MHz. +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 15000000 + +if WATCHDOG + +# Set the delay time for printing panic data. +# 1 cycle is about 32ms. 500ms is about 16 cycles. +config WDT_NPCX_DELAY_CYCLES + default 16 + +endif # WATCHDOG + +# The maximum supported time the NPCX can spend in deep-sleep with instant +# wake is 200 ms, so the hook tick interval is set to match. +config CROS_EC_HOOK_TICK_INTERVAL + default 200000 + +endif # SOC_FAMILY_NPCX |