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authorJack Rosenthal <jrosenth@chromium.org>2021-11-04 12:11:58 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-05 04:22:34 +0000
commit252457d4b21f46889eebad61d4c0a65331919cec (patch)
tree01856c4d31d710b20e85a74c8d7b5836e35c3b98 /zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx
parent08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff)
downloadchrome-ec-252457d4b21f46889eebad61d4c0a65331919cec.tar.gz
In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx')
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diff --git a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx
deleted file mode 100644
index 2da9252775..0000000000
--- a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx
+++ /dev/null
@@ -1,53 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-#
-# This file defines the default config values shared by all NPCX chipsets
-#
-
-if SOC_FAMILY_NPCX
-
-# Enable NPCX firmware header generator
-config NPCX_HEADER
- default y
-
-choice NPCX_HEADER_SPI_MAX_CLOCK_CHOICE
- default NPCX_HEADER_SPI_MAX_CLOCK_50
-endchoice
-
-choice NPCX_HEADER_SPI_READ_MODE_CHOICE
- default NPCX_HEADER_SPI_READ_MODE_DUAL
-endchoice
-
-choice NPCX_HEADER_CORE_CLOCK_SPI_CLOCK_RATIO_CHOICE
- default NPCX_HEADER_CORE_CLOCK_SPI_CLOCK_RATIO_2
-endchoice
-
-# ADC
-# The resolution and oversamplig values are fixed by the NPCX ADC driver
-config PLATFORM_EC_ADC_RESOLUTION
- default 10
-
-config PLATFORM_EC_ADC_OVERSAMPLING
- default 0
-
-# Set the system clock to 15MHz.
-config SYS_CLOCK_HW_CYCLES_PER_SEC
- default 15000000
-
-if WATCHDOG
-
-# Set the delay time for printing panic data.
-# 1 cycle is about 32ms. 500ms is about 16 cycles.
-config WDT_NPCX_DELAY_CYCLES
- default 16
-
-endif # WATCHDOG
-
-# The maximum supported time the NPCX can spend in deep-sleep with instant
-# wake is 200 ms, so the hook tick interval is set to match.
-config CROS_EC_HOOK_TICK_INTERVAL
- default 200000
-
-endif # SOC_FAMILY_NPCX