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| author | Peter Marheine <pmarheine@chromium.org> | 2023-02-16 00:14:21 +0000 |
|---|---|---|
| committer | Peter Marheine <pmarheine@chromium.org> | 2023-02-16 00:14:21 +0000 |
| commit | f43d6df6f2860dbe8ec15aebdc28890771ad7897 (patch) | |
| tree | 6877eff7016f9979e46017ea5221a16d36344304 /zephyr/app/ec/chip/arm/st_stm32/Kconfig.stm32 | |
| parent | dce247e97903a2464ff8884106bffa43587c1dcb (diff) | |
| parent | 0849542c72359150a357945c010dca6b5a213633 (diff) | |
| download | chrome-ec-f43d6df6f2860dbe8ec15aebdc28890771ad7897.tar.gz | |
Merge remote-tracking branch cros/main into firmware-nissa-15217.B-mainfirmware-nissa-15217.126.B-main
Generated by: ./util/update_release_branch.py --zephyr --board nissa firmware-
nissa-15217.B-main
Relevant changes:
git log --oneline dce247e979..0849542c72 -- zephyr/program/nissa
util/getversion.sh
0849542c72 zephyr: add sleep property for keyboard factory test
5825d894b9 nissa: disable PLATFORM_EC_TCPC_INTERRUPT
25a400690f yavikso: Update fan table version 3
9263f14536 zephyr: remove shi node and add references to shi0
b40c6970d3 Craask: Charger limit for 65w adapter
6fd2d3ea6c zephyr: add comments for tcpc driver
00986ffb1c zephyr: move usbc interrupt handler to shim
2508094b14 yaviks: reduce RW image size (64KB)
55b6aaf52f yaviks: enable keyboard factory test
4786d1eac6 nissa: Add ocpc init function to Nissa boards
2ae1083638 zephyr: cros_kb: set KSI/KSO kbs mode by pinctrl driver
d415f4665a yaviks: Fix OCPC Vsys overshooting
93f9d42a7c zephyr: config: drop few more redundant options
BRANCH=None
BUG=b:254148652 b:260762509 b:265220075 b:268273712 b:265763662
BUG=b:253557900 b:254148652 b:269212593 b:267404783 b:262352202
TEST=`make -j buildall`
Force-Relevant-Builds: all
Change-Id: I195dd82af114180b611f9afd1465a69f7f43d417
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Diffstat (limited to 'zephyr/app/ec/chip/arm/st_stm32/Kconfig.stm32')
| -rw-r--r-- | zephyr/app/ec/chip/arm/st_stm32/Kconfig.stm32 | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/zephyr/app/ec/chip/arm/st_stm32/Kconfig.stm32 b/zephyr/app/ec/chip/arm/st_stm32/Kconfig.stm32 new file mode 100644 index 0000000000..17f712028e --- /dev/null +++ b/zephyr/app/ec/chip/arm/st_stm32/Kconfig.stm32 @@ -0,0 +1,32 @@ +# Copyright 2023 The ChromiumOS Authors. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +if SOC_FAMILY_STM32 + +DT_CHOSEN_Z_SRAM := zephyr,sram + +config CROS_EC_PROGRAM_MEMORY_BASE + default FLASH_BASE_ADDRESS + +config CROS_EC_RAM_BASE + default SRAM_BASE_ADDRESS + +config CROS_EC_DATA_RAM_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_SRAM)) + +config CROS_EC_RAM_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_SRAM)) + +config CROS_EC_RO_MEM_OFF + default $(dt_node_int_prop_hex,/binman/wp-ro,offset) + +config CROS_EC_RW_MEM_OFF + default $(dt_node_int_prop_hex,/binman/ec-rw,offset) + +# Tell the linker where the RO/RW part is. +config FLASH_LOAD_OFFSET + default CROS_EC_RO_MEM_OFF if CROS_EC_RO + default CROS_EC_RW_MEM_OFF if CROS_EC_RW + +endif # SOC_FAMILY_STM32 |