zephyr: Add npcx7 as zephyr board target

Make npcx7 support common so that lazor et. al
can use it instead of having a trogdor board target.

BUG=b:217460464
TEST=zmake testall
BRANCH=none

Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: Ia91173c74b0c4ae2fcc6a8931dd9e43f29ab3bbc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3430639
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>

5 files changed, 152 insertions, 0 deletions

diff --git a/zephyr/boards/arm/npcx7/Kconfig.board b/zephyr/boards/arm/npcx7/Kconfig.board
new file mode 100644
index 0000000000..53bc39959b
--- /dev/null
+++ b/zephyr/boards/arm/npcx7/Kconfig.board
@@ -0,0 +1,10 @@
+# Copyright 2022 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+config BOARD_NPCX7
+	bool "NPCX7 Zephyr Baseboard"
+	depends on SOC_NPCX7M7FC
+	# NPCX doesn't actually have enough ram for coverage, but this will
+	# allow generating initial 0 line coverage.
+	select HAS_COVERAGE_SUPPORT
diff --git a/zephyr/boards/arm/npcx7/Kconfig.defconfig b/zephyr/boards/arm/npcx7/Kconfig.defconfig
new file mode 100644
index 0000000000..fcea4f964e
--- /dev/null
+++ b/zephyr/boards/arm/npcx7/Kconfig.defconfig
@@ -0,0 +1,10 @@
+# Copyright 2022 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+if BOARD_NPCX7
+
+config BOARD
+	default "npcx7"
+
+endif # BOARD_NPCX7
diff --git a/zephyr/boards/arm/npcx7/board.cmake b/zephyr/boards/arm/npcx7/board.cmake
new file mode 100644
index 0000000000..f2117625b3
--- /dev/null
+++ b/zephyr/boards/arm/npcx7/board.cmake
@@ -0,0 +1,5 @@
+# Copyright 2022 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+set(NPCX_IMAGE_FILE ${PROJECT_BINARY_DIR}/zephyr.npcx.bin)
diff --git a/zephyr/boards/arm/npcx7/npcx7.dts b/zephyr/boards/arm/npcx7/npcx7.dts
new file mode 100644
index 0000000000..6e699827da
--- /dev/null
+++ b/zephyr/boards/arm/npcx7/npcx7.dts
@@ -0,0 +1,80 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/dts-v1/;
+
+#include <cros/nuvoton/npcx7.dtsi>
+#include <dt-bindings/gpio_defines.h>
+#include <nuvoton/npcx7m7fc.dtsi>
+
+/ {
+	model = "NPCX7";
+
+	aliases {
+		i2c-0 = &i2c0_0;
+		i2c-1 = &i2c1_0;
+		i2c-2 = &i2c2_0;
+		i2c-3 = &i2c3_0;
+		i2c-5 = &i2c5_0;
+		i2c-7 = &i2c7_0;
+	};
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+		zephyr,flash = &flash0;
+		zephyr,flash-controller = &int_flash;
+		cros,rtc = &mtc;
+	};
+
+	named-i2c-ports {
+		compatible = "named-i2c-ports";
+	};
+
+	named-pwms {
+		compatible = "named-pwms";
+	};
+
+	named-adc-channels {
+		compatible = "named-adc-channels";
+	};
+
+	def-lvol-io-list {
+		compatible = "nuvoton,npcx-lvolctrl-def";
+	};
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&altc_uart1_sl2>; /* Use UART1_SL2 ie. PIN64.65 */
+};
+
+&cros_kb_raw {
+	status = "okay";
+	/* No KSO2 (it's inverted and implemented by GPIO) */
+	pinctrl-0 = <&alt7_no_ksi0_sl
+		     &alt7_no_ksi1_sl
+		     &alt7_no_ksi2_sl
+		     &alt7_no_ksi3_sl
+		     &alt7_no_ksi4_sl
+		     &alt7_no_ksi5_sl
+		     &alt7_no_ksi6_sl
+		     &alt7_no_ksi7_sl
+		     &alt8_no_kso00_sl
+		     &alt8_no_kso01_sl
+		     &alt8_no_kso03_sl
+		     &alt8_no_kso04_sl
+		     &alt8_no_kso05_sl
+		     &alt8_no_kso06_sl
+		     &alt8_no_kso07_sl
+		     &alt9_no_kso08_sl
+		     &alt9_no_kso09_sl
+		     &alt9_no_kso10_sl
+		     &alt9_no_kso11_sl
+		     &alt9_no_kso12_sl
+		     >;
+};
diff --git a/zephyr/boards/arm/npcx7/npcx7_defconfig b/zephyr/boards/arm/npcx7/npcx7_defconfig
new file mode 100644
index 0000000000..f47bb4c2af
--- /dev/null
+++ b/zephyr/boards/arm/npcx7/npcx7_defconfig
@@ -0,0 +1,47 @@
+# Copyright 2022 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# Zephyr Kernel Configuration
+CONFIG_SOC_SERIES_NPCX7=y
+CONFIG_SOC_NPCX7M7FC=y
+
+# Platform Configuration
+CONFIG_BOARD_NPCX7=y
+
+# Serial Drivers
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Pinmux Driver
+CONFIG_PINMUX=y
+
+# GPIO Controller
+CONFIG_GPIO=y
+
+# Clock configuration
+CONFIG_CLOCK_CONTROL=y
+
+# WATCHDOG configuration
+CONFIG_WATCHDOG=y
+
+# Power Management
+CONFIG_SOC_POWER_MANAGEMENT=y
+CONFIG_PM_POLICY_APP=y
+CONFIG_UART_CONSOLE_INPUT_EXPIRED=y
+
+# BBRAM
+CONFIG_BBRAM=y
+CONFIG_BBRAM_NPCX=y
+
+# SPI
+CONFIG_SPI=y
+
+# Flash
+CONFIG_FLASH=y
+CONFIG_SPI_NOR=y
+CONFIG_FLASH_JESD216_API=y