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authorWealian Liao <whliao@nuvoton.corp-partner.google.com>2021-06-10 17:46:46 +0800
committerCommit Bot <commit-bot@chromium.org>2021-07-27 15:57:24 +0000
commit88b7bf8f40e8100eb338917ff1c9b1f82c449530 (patch)
treec0fcbff8ac475914c77a096d6473ae2550fa7d2e /zephyr/boards
parentc4e335d6851438aa2767189ef84dfefecca92869 (diff)
downloadchrome-ec-88b7bf8f40e8100eb338917ff1c9b1f82c449530.tar.gz
zephyr: Initial image for npcx_evb/npcx7
Initial image for npcx_evb/npcx7 supporting basic UART functionality and basic commands. BUG=none BRANCH=none TEST=test basic console functionality on npcx7_evb Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Ibdf1ce98b6ad747dc649b82f12e555e63569036a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3033230 Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'zephyr/boards')
-rw-r--r--zephyr/boards/arm/npcx_evb/Kconfig.board12
-rw-r--r--zephyr/boards/arm/npcx_evb/Kconfig.defconfig6
-rw-r--r--zephyr/boards/arm/npcx_evb/npcx7_evb.dts22
-rw-r--r--zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig34
-rw-r--r--zephyr/boards/arm/npcx_evb/npcx_evb.dtsi17
5 files changed, 91 insertions, 0 deletions
diff --git a/zephyr/boards/arm/npcx_evb/Kconfig.board b/zephyr/boards/arm/npcx_evb/Kconfig.board
new file mode 100644
index 0000000000..d7cdd067da
--- /dev/null
+++ b/zephyr/boards/arm/npcx_evb/Kconfig.board
@@ -0,0 +1,12 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# Note: this Zephyr board more closely represents the Chrome OS
+# concept of a baseboard. Zephyr boards and Chrome OS boards do not
+# have a 1:1 mapping.
+config BOARD_NPCX7_EVB
+ bool "NPCX7 Evaluation Board"
+ depends on SOC_NPCX7M6FB || SOC_NPCX7M6FC || SOC_NPCX7M7FC
+ # Allow generating initial 0 line coverage.
+ select HAS_COVERAGE_SUPPORT
diff --git a/zephyr/boards/arm/npcx_evb/Kconfig.defconfig b/zephyr/boards/arm/npcx_evb/Kconfig.defconfig
new file mode 100644
index 0000000000..81268a4636
--- /dev/null
+++ b/zephyr/boards/arm/npcx_evb/Kconfig.defconfig
@@ -0,0 +1,6 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+config BOARD
+ default "npcx7_evb" if BOARD_NPCX7_EVB
diff --git a/zephyr/boards/arm/npcx_evb/npcx7_evb.dts b/zephyr/boards/arm/npcx_evb/npcx7_evb.dts
new file mode 100644
index 0000000000..c20589d637
--- /dev/null
+++ b/zephyr/boards/arm/npcx_evb/npcx7_evb.dts
@@ -0,0 +1,22 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/dts-v1/;
+
+#include <cros/nuvoton/npcx7.dtsi>
+
+/*
+ * #include <nuvoton/npcx7m6fb.dtsi>
+ * #include <nuvoton/npcx7m6fc.dtsi>
+ * #include <nuvoton/npcx7m7fc.dtsi>
+ */
+#include <nuvoton/npcx7m6fc.dtsi>
+#include "npcx_evb.dtsi"
+
+&uart1 {
+ status = "okay";
+ current-speed = <115200>;
+ pinctrl-0 = <&altc_uart1_sl2>; /* Use UART1_SL2 ie. PIN64.65 */
+};
diff --git a/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig b/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig
new file mode 100644
index 0000000000..7491ae09df
--- /dev/null
+++ b/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig
@@ -0,0 +1,34 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# Zephyr Kernel Configuration
+CONFIG_SOC_SERIES_NPCX7=y
+# NPCX7 soc list
+# CONFIG_SOC_NPCX7M6FB
+# CONFIG_SOC_NPCX7M6FC
+# CONFIG_SOC_NPCX7M7FC
+CONFIG_SOC_NPCX7M6FC=y
+
+# Platform Configuration
+CONFIG_BOARD_NPCX7_EVB=y
+
+# Serial Drivers
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Pinmux Driver
+CONFIG_PINMUX=y
+
+# GPIO Controller
+CONFIG_GPIO=y
+
+# Clock configuration
+CONFIG_CLOCK_CONTROL=y
+
+# WATCHDOG configuration
+CONFIG_WATCHDOG=y
diff --git a/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi b/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi
new file mode 100644
index 0000000000..65c1ab7e68
--- /dev/null
+++ b/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi
@@ -0,0 +1,17 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <dt-bindings/gpio_defines.h>
+
+/ {
+ model = "Nuvoton NPCX Evaluation Board";
+
+ chosen {
+ zephyr,sram = &sram0;
+ zephyr,console = &uart1;
+ zephyr,shell-uart = &uart1;
+ zephyr,flash = &flash0;
+ };
+};