diff options
| author | Dino Li <Dino.Li@ite.com.tw> | 2021-07-28 11:55:18 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-07-29 09:47:39 +0000 |
| commit | 06309cebb69bc3d1f4711249463d013a76f9d950 (patch) | |
| tree | 49a73fa9f6076fe36480d639baaeb09d95a3e6f0 /zephyr/boards | |
| parent | 8fa2833c058609a9aff106642493404e1dfe0203 (diff) | |
| download | chrome-ec-06309cebb69bc3d1f4711249463d013a76f9d950.tar.gz | |
zephyr: asurada: correct RO/RW size and offset
it8xxx2's memory-mapped flash layout are as the below:
- RO image starts at the beginning of flash.
- PSTATE immediately follows the RO image.
- RW image starts at the second half of flash.
And its flash size is 1M byte. So let's correct RO/RW size and offset.
BRANCH=none
BUG=b:194794622
TEST=sysjump rw/ro, sysinfo.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I1130d670af054d88f7dfd1874ba5ecfd22b500df
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058156
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'zephyr/boards')
| -rw-r--r-- | zephyr/boards/riscv/asurada/asurada_defconfig | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/zephyr/boards/riscv/asurada/asurada_defconfig b/zephyr/boards/riscv/asurada/asurada_defconfig index efee264407..63fd37f073 100644 --- a/zephyr/boards/riscv/asurada/asurada_defconfig +++ b/zephyr/boards/riscv/asurada/asurada_defconfig @@ -101,6 +101,6 @@ CONFIG_CROS_EC_DATA_RAM_SIZE=0x00100000 CONFIG_CROS_EC_RAM_SIZE=0x0000f000 CONFIG_CROS_EC_RO_MEM_OFF=0x0 -CONFIG_CROS_EC_RO_SIZE=0x40000 -CONFIG_CROS_EC_RW_MEM_OFF=0x40000 -CONFIG_CROS_EC_RW_SIZE=0x40000 +CONFIG_CROS_EC_RO_SIZE=0x80000 +CONFIG_CROS_EC_RW_MEM_OFF=0x80000 +CONFIG_CROS_EC_RW_SIZE=0x80000 |