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authorYH Lin <yueherngl@google.com>2022-11-30 21:45:30 +0000
committerYH Lin <yueherngl@google.com>2022-11-30 21:45:30 +0000
commit184d13e77614be3be5374d3fef9d1edf66ec8687 (patch)
treed0c89ae8814c2ba35c238c6c0644ec6b1602c63a /zephyr/drivers/cros_rtc
parent19d4d68ffa8b6910d716ab5e1953c41b58614a57 (diff)
parentaa40b859b3a73e5a205bc561c1a29eff38485461 (diff)
downloadchrome-ec-184d13e77614be3be5374d3fef9d1edf66ec8687.tar.gz
Merge remote-tracking branch cros/main into factory-brya-14909.124.B-main
Generated by: util/update_release_branch.py --baseboard brya --relevant_paths_file baseboard/brya/relevant-paths.txt factory-brya-14909.124.B-main Relevant changes: git log --oneline 19d4d68ffa..aa40b859b3 -- baseboard/brya board/agah board/anahera board/banshee board/brya board/crota board/felwinter board/gimble board/kano board/mithrax board/osiris board/primus board/redrix board/taeko board/taniks board/vell board/volmar driver/bc12/pi3usb9201_public.* driver/charger/bq25710.* driver/ppc/nx20p348x.* driver/ppc/syv682x_public.* driver/retimer/bb_retimer_public.* driver/tcpm/nct38xx.* driver/tcpm/ps8xxx_public.* driver/tcpm/tcpci.* include/power/alderlake* include/intel_x86.h power/alderlake* power/intel_x86.c util/getversion.sh e6da633c38 driver: Sort header files 234a87ae2d tcpci: Add FRS enable to driver structure a56be59ccd tcpm_header: add test for tcpm_dump_registers 57b3256963 Rename CONFIG_CHARGER_INPUT_CURRENT to _CHARGER_DEFAULT_CURRENT_LIMIT e420c8ff9a marasov: Modify TypeC and TypeA configuration. 43b53e0045 Add default implementation of board_set_charge_limit b75dc90677 Add CONFIG_CHARGER_MIN_INPUT_CURRENT_LIMIT f1b563c350 baseboard: Sort header files 7d01b1e58d driver/retimer/ps8818.h: Add I2C ADDR FLAGS 0x30, 0x58, 0x70 ec31407993 Add CONFIG_CHARGER_INPUT_CURRENT_DERATE_PCT 8f89f69a5b crota: disable lid angle sensor for clamshell BRANCH=None BUG=b:260630630 b:163093572 b:259002141 b:255184961 b:259354679 BUG=b:247100970 b:254328661 TEST=`emerge-brya chromeos-ec` Force-Relevant-Builds: all Change-Id: I0ecfa0e6af68631283c7a9e8f1afb9d827176c62 Signed-off-by: YH Lin <yueherngl@google.com>
Diffstat (limited to 'zephyr/drivers/cros_rtc')
-rw-r--r--zephyr/drivers/cros_rtc/Kconfig14
-rw-r--r--zephyr/drivers/cros_rtc/cros_rtc_npcx.c22
-rw-r--r--zephyr/drivers/cros_rtc/cros_rtc_xec.c13
-rw-r--r--zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c21
-rw-r--r--zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h1
-rw-r--r--zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c11
6 files changed, 54 insertions, 28 deletions
diff --git a/zephyr/drivers/cros_rtc/Kconfig b/zephyr/drivers/cros_rtc/Kconfig
index 2839b03c62..2f064b4db8 100644
--- a/zephyr/drivers/cros_rtc/Kconfig
+++ b/zephyr/drivers/cros_rtc/Kconfig
@@ -6,7 +6,12 @@ if PLATFORM_EC_RTC && !ARCH_POSIX
choice CROS_RTC_TYPE
prompt "Select the RTC to use"
- default CROS_RTC_NPCX if SOC_FAMILY_NPCX
+ # List standalone controllers before embedded once so that they get
+ # higher priority.
+ default CROS_RTC_NXP_PCF85063A if DT_HAS_NXP_RTC_PCF85063A_ENABLED
+ default CROS_RTC_RENESAS_IDT1337AG if DT_HAS_RENESAS_RTC_IDT1337AG_ENABLED
+ default CROS_RTC_NPCX if DT_HAS_NUVOTON_NPCX_CROS_MTC_ENABLED
+ default CROS_RTC_XEC if DT_HAS_MICROCHIP_XEC_CROS_RTC_ENABLED
help
Select the RTC used on the board.
@@ -40,4 +45,11 @@ config CROS_RTC_RENESAS_IDT1337AG
endchoice # CROS_RTC_TYPE
+config PLATFORM_EC_PCF85063A_CAP_SEL
+ bool "Set CAP_SEL of PCF85063A"
+ depends on CROS_RTC_NXP_PCF85063A
+ help
+ This option select the internal oscillator capacitor to 12.5 pF,
+ default is 7 pF.
+
endif # PLATFORM_EC_RTC
diff --git a/zephyr/drivers/cros_rtc/cros_rtc_npcx.c b/zephyr/drivers/cros_rtc/cros_rtc_npcx.c
index 3312ad899f..a248357cfe 100644
--- a/zephyr/drivers/cros_rtc/cros_rtc_npcx.c
+++ b/zephyr/drivers/cros_rtc/cros_rtc_npcx.c
@@ -1,23 +1,23 @@
-/*
- * Copyright 2021 Google LLC
- *
- * SPDX-License-Identifier: Apache-2.0
+/* Copyright 2021 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
*/
#define DT_DRV_COMPAT nuvoton_npcx_cros_mtc
-#include <assert.h>
-#include <drivers/cros_rtc.h>
-#include <zephyr/drivers/gpio.h>
-#include <zephyr/kernel.h>
-#include <soc.h>
-#include <soc/nuvoton_npcx/reg_def_cros.h>
-
#include "ec_tasks.h"
#include "soc_miwu.h"
#include "task.h"
+#include <assert.h>
+
+#include <zephyr/drivers/gpio.h>
+#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
+
+#include <drivers/cros_rtc.h>
+#include <soc.h>
+#include <soc/nuvoton_npcx/reg_def_cros.h>
LOG_MODULE_REGISTER(cros_rtc, LOG_LEVEL_ERR);
#define NPCX_MTC_TTC_LOAD_DELAY_US 250 /* Delay after writing TTC */
diff --git a/zephyr/drivers/cros_rtc/cros_rtc_xec.c b/zephyr/drivers/cros_rtc/cros_rtc_xec.c
index c543aab6af..f42560e107 100644
--- a/zephyr/drivers/cros_rtc/cros_rtc_xec.c
+++ b/zephyr/drivers/cros_rtc/cros_rtc_xec.c
@@ -5,17 +5,18 @@
#define DT_DRV_COMPAT microchip_xec_cros_rtc
+#include "ec_tasks.h"
+#include "task.h"
+
#include <assert.h>
-#include <drivers/cros_rtc.h>
+
#include <zephyr/drivers/gpio.h>
#include <zephyr/kernel.h>
+#include <zephyr/logging/log.h>
+
+#include <drivers/cros_rtc.h>
#include <soc.h>
#include <soc/microchip_xec/reg_def_cros.h>
-
-#include "ec_tasks.h"
-#include "task.h"
-
-#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(cros_rtc, LOG_LEVEL_ERR);
/* Driver config */
diff --git a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c b/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c
index c5580eaeef..298c8cd64f 100644
--- a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c
+++ b/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c
@@ -5,18 +5,19 @@
#define DT_DRV_COMPAT nxp_rtc_pcf85063a
+#include "nxp_rtc_pcf85063a.h"
+
#include <assert.h>
+
#include <zephyr/device.h>
-#include <drivers/cros_rtc.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/kernel.h>
+#include <zephyr/logging/log.h>
+
+#include <drivers/cros_rtc.h>
#include <rtc.h>
#include <soc.h>
-
-#include "nxp_rtc_pcf85063a.h"
-
-#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(cros_rtc, LOG_LEVEL_ERR);
/* Driver config */
@@ -362,6 +363,16 @@ static int nxp_rtc_pcf85063a_init(const struct device *dev)
}
}
+#ifdef CONFIG_PLATFORM_EC_PCF85063A_CAP_SEL
+ ret = pcf85063a_write_reg(dev, REG_CONTROL_1,
+ (CONTROL_1_DEFAULT_VALUE | CAP_SEL));
+
+ if (ret < 0) {
+ LOG_ERR("PCF85063A set CAP_SEL Fail!");
+ return ret;
+ }
+#endif
+
/*
* Read Seconds register and check if oscillator is stopped.
* If so, clear the bit.
diff --git a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h b/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h
index 54b1fbd2ea..c0139db631 100644
--- a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h
+++ b/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h
@@ -10,6 +10,7 @@
#define SOFT_RESET 0x58
#define CONTROL_1_DEFAULT_VALUE 0
#define OS_BIT 0x80
+#define CAP_SEL 0x01
#define DISABLE_ALARM 0x80
#define ENABLE_ALARM_INTERRUPT 0x80
#define RTC_STOP_CLOCKS 0x20
diff --git a/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c b/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c
index 7a9a11fd41..f6d3a7c292 100644
--- a/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c
+++ b/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c
@@ -5,18 +5,19 @@
#define DT_DRV_COMPAT renesas_rtc_idt1337ag
+#include "renesas_rtc_idt1337ag.h"
+
#include <assert.h>
+
#include <zephyr/device.h>
-#include <drivers/cros_rtc.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/kernel.h>
+#include <zephyr/logging/log.h>
+
+#include <drivers/cros_rtc.h>
#include <rtc.h>
#include <soc.h>
-
-#include "renesas_rtc_idt1337ag.h"
-
-#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(cros_rtc, LOG_LEVEL_ERR);
/* Driver config */