zephyr: npcx: add reset cause check

The reset cause will influence the initialization flow. We define some
of initial flow of the reset cause for the following development.

This CL include the following:
1. Add check_reset_cause() which sets the system reset flag.
2. Add chip_bbram_status_check() to clear the error status & show the
error message.
3. Add CONFIG_BOARD_RESET_AFTER_POWER_ON feature.
4. Define the initialize flow for reset cause.

BRANCH=none
BUG=b:178101173
TEST=check the following reset cause by 'sysinfo'
1. power-up
2. reset-pin reset
3. soft by 'reboot' console command
4. watchdog by 'waitms 2000'

Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I515868d8cda4544fdbe782210b0108b4dda0d8cc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2731180
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>

4 files changed, 38 insertions, 4 deletions

diff --git a/zephyr/drivers/cros_bbram/Kconfig b/zephyr/drivers/cros_bbram/Kconfig
index ba7ce8b1ad..43850b032a 100644
--- a/zephyr/drivers/cros_bbram/Kconfig
+++ b/zephyr/drivers/cros_bbram/Kconfig
@@ -7,4 +7,18 @@ menuconfig CROS_BBRAM_NPCX
 	depends on SOC_FAMILY_NPCX
 	default y
 	help
-		This options enables stuff.
\ No newline at end of file
+		This options enables stuff.
+
+if CROS_BBRAM_NPCX
+
+config CROS_BBRAM_NPCX_INIT_PRIORITY
+	int "cros_bbram npcx initialization priority"
+	default 11
+	range 10 19
+	help
+	  This sets the npcx cros_bbram driver initialization priority. NPCX
+	  chip uses BBRAM to save some system information that persists across
+	  chip resets. The priority should be higher than
+	  SYSTEM_PRE_INIT_PRIORITY & lower than CROS_SYSTEM_NPCX_INIT_PRIORITY.
+
+endif # CROS_BBRAM_NPCX
diff --git a/zephyr/drivers/cros_bbram/cros_bbram_npcx.c b/zephyr/drivers/cros_bbram/cros_bbram_npcx.c
index f6fa64fdd2..20698df85b 100644
--- a/zephyr/drivers/cros_bbram/cros_bbram_npcx.c
+++ b/zephyr/drivers/cros_bbram/cros_bbram_npcx.c
@@ -126,6 +126,12 @@ static int bbram_npcx_init(const struct device *dev)
 /*
  * The priority of bbram_npcx_init() should lower than cros_system_npcx_init().
  */
+#if (CONFIG_CROS_BBRAM_NPCX_INIT_PRIORITY <= \
+     CONFIG_CROS_SYSTEM_NPCX_INIT_PRIORITY)
+#error CONFIG_CROS_BBRAM_NPCX_INIT_PRIORITY must greater than \
+	CONFIG_CROS_SYSTEM_NPCX_INIT_PRIORITY
+#endif
+
 #define CROS_BBRAM_INIT(inst)                                                \
 	static struct {                                                      \
 	} cros_bbram_data_##inst;                                            \
@@ -137,7 +143,7 @@ static int bbram_npcx_init(const struct device *dev)
 	DEVICE_DEFINE(cros_bbram_npcx_##inst, DT_INST_LABEL(inst),           \
 		      bbram_npcx_init, NULL, &cros_bbram_data_##inst,        \
 		      &cros_bbram_cfg_##inst, PRE_KERNEL_1,                  \
-		      CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,                   \
+		      CONFIG_CROS_BBRAM_NPCX_INIT_PRIORITY,                  \
 		      &cros_bbram_npcx_driver_api);
 
 DT_INST_FOREACH_STATUS_OKAY(CROS_BBRAM_INIT);
diff --git a/zephyr/drivers/cros_system/Kconfig b/zephyr/drivers/cros_system/Kconfig
index e1e7163f99..09d47ad7e7 100644
--- a/zephyr/drivers/cros_system/Kconfig
+++ b/zephyr/drivers/cros_system/Kconfig
@@ -11,3 +11,16 @@ menuconfig CROS_SYSTEM_NPCX
 	  processors. Currently, Zephyr doesn't provide the system related API.
 	  The cros system driver provides the low-level driver related to
 	  chromium ec system functionality.
+
+if CROS_SYSTEM_NPCX
+
+config CROS_SYSTEM_NPCX_INIT_PRIORITY
+	int "cros_system npcx initialization priority"
+	default 10
+	range 10 19
+	help
+	  This sets the npcx cros_system driver initialization priority. The
+	  cros_system driver provides access to the NPCX reset cause and must be
+	  higher priority than CONFIG_SYSTEM_PRE_INIT_PRIORITY.
+
+endif # CROS_SYSTEM_NPCX
diff --git a/zephyr/drivers/cros_system/cros_system_npcx.c b/zephyr/drivers/cros_system/cros_system_npcx.c
index b21219355d..48e33188cf 100644
--- a/zephyr/drivers/cros_system/cros_system_npcx.c
+++ b/zephyr/drivers/cros_system/cros_system_npcx.c
@@ -128,12 +128,13 @@ static const struct cros_system_driver_api cros_system_driver_npcx_api = {
 };
 
 /*
- * The priority of cros_system_npcx_init() should be lower than watchdog init
+ * The priority of cros_system_npcx_init() should be higher than watchdog init
  * for reset cause check.
  */
 DEVICE_DEFINE(cros_system_npcx_0, "CROS_SYSTEM", cros_system_npcx_init, NULL,
 	      &cros_system_npcx_dev_data, &cros_system_dev_cfg, PRE_KERNEL_1,
-	      30, &cros_system_driver_npcx_api);
+	      CONFIG_CROS_SYSTEM_NPCX_INIT_PRIORITY,
+	      &cros_system_driver_npcx_api);
 
 #define HAL_DBG_REG_BASE_ADDR \
 	((struct dbg_reg *)DT_REG_ADDR(DT_INST(0, nuvoton_npcx_cros_dbg)))