diff options
| author | Jun Lin <CHLin56@nuvoton.com> | 2021-02-22 16:42:05 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-03-02 03:27:34 +0000 |
| commit | e1aed455f52d28bf419c86431546b476db4e15e5 (patch) | |
| tree | 0e51dfb7e3955a7fdbec6af47663dac1fe140092 /zephyr/include/cros/nuvoton | |
| parent | 2cd7866a7f55aae9453518cb5b06659e7c847c9d (diff) | |
| download | chrome-ec-e1aed455f52d28bf419c86431546b476db4e15e5.tar.gz | |
zephyr: Add initial configuration for debug interface
This CL configures the initial setting for debug interface.
It will also select the device pin to JTAG0 or JTAG1 by adding either
&dbg {
pinctrl-0 = <&alt5_njen0_en>;
status = "okay";
};
or
&dbg {
pinctrl-0 = <&alt5_njen1_en>;
status = "okay";
};
to the board's dts file.
BUG=b:179809145
BRANCH=None.
TEST=observe the registers are set correctly.
Cq-Depend: chromium:2717588, chromium:2717589, chromium:2717590
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I0e3cdeed2974a535bd6d6d0ddaaf291db1d8e1dc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2712142
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Diffstat (limited to 'zephyr/include/cros/nuvoton')
| -rw-r--r-- | zephyr/include/cros/nuvoton/npcx.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/zephyr/include/cros/nuvoton/npcx.dtsi b/zephyr/include/cros/nuvoton/npcx.dtsi index 89fb9484d9..2d87e91dca 100644 --- a/zephyr/include/cros/nuvoton/npcx.dtsi +++ b/zephyr/include/cros/nuvoton/npcx.dtsi @@ -69,6 +69,14 @@ reg-names = "memory", "status"; label = "BBRAM"; }; + + dbg: dbg@400c3074 { + compatible = "nuvoton,npcx-cros-dbg"; + reg = <0x400c3074 0x0C>; + pinctrl-0 = <&alt5_njen0_en>; + label = "DBG"; + status = "disabled"; + }; }; }; |