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authorYH Lin <yueherngl@google.com>2022-11-30 21:45:30 +0000
committerYH Lin <yueherngl@google.com>2022-11-30 21:45:30 +0000
commit184d13e77614be3be5374d3fef9d1edf66ec8687 (patch)
treed0c89ae8814c2ba35c238c6c0644ec6b1602c63a /zephyr/program/skyrim/morthal/src/usb_mux_config.c
parent19d4d68ffa8b6910d716ab5e1953c41b58614a57 (diff)
parentaa40b859b3a73e5a205bc561c1a29eff38485461 (diff)
downloadchrome-ec-184d13e77614be3be5374d3fef9d1edf66ec8687.tar.gz
Merge remote-tracking branch cros/main into factory-brya-14909.124.B-main
Generated by: util/update_release_branch.py --baseboard brya --relevant_paths_file baseboard/brya/relevant-paths.txt factory-brya-14909.124.B-main Relevant changes: git log --oneline 19d4d68ffa..aa40b859b3 -- baseboard/brya board/agah board/anahera board/banshee board/brya board/crota board/felwinter board/gimble board/kano board/mithrax board/osiris board/primus board/redrix board/taeko board/taniks board/vell board/volmar driver/bc12/pi3usb9201_public.* driver/charger/bq25710.* driver/ppc/nx20p348x.* driver/ppc/syv682x_public.* driver/retimer/bb_retimer_public.* driver/tcpm/nct38xx.* driver/tcpm/ps8xxx_public.* driver/tcpm/tcpci.* include/power/alderlake* include/intel_x86.h power/alderlake* power/intel_x86.c util/getversion.sh e6da633c38 driver: Sort header files 234a87ae2d tcpci: Add FRS enable to driver structure a56be59ccd tcpm_header: add test for tcpm_dump_registers 57b3256963 Rename CONFIG_CHARGER_INPUT_CURRENT to _CHARGER_DEFAULT_CURRENT_LIMIT e420c8ff9a marasov: Modify TypeC and TypeA configuration. 43b53e0045 Add default implementation of board_set_charge_limit b75dc90677 Add CONFIG_CHARGER_MIN_INPUT_CURRENT_LIMIT f1b563c350 baseboard: Sort header files 7d01b1e58d driver/retimer/ps8818.h: Add I2C ADDR FLAGS 0x30, 0x58, 0x70 ec31407993 Add CONFIG_CHARGER_INPUT_CURRENT_DERATE_PCT 8f89f69a5b crota: disable lid angle sensor for clamshell BRANCH=None BUG=b:260630630 b:163093572 b:259002141 b:255184961 b:259354679 BUG=b:247100970 b:254328661 TEST=`emerge-brya chromeos-ec` Force-Relevant-Builds: all Change-Id: I0ecfa0e6af68631283c7a9e8f1afb9d827176c62 Signed-off-by: YH Lin <yueherngl@google.com>
Diffstat (limited to 'zephyr/program/skyrim/morthal/src/usb_mux_config.c')
-rw-r--r--zephyr/program/skyrim/morthal/src/usb_mux_config.c142
1 files changed, 142 insertions, 0 deletions
diff --git a/zephyr/program/skyrim/morthal/src/usb_mux_config.c b/zephyr/program/skyrim/morthal/src/usb_mux_config.c
new file mode 100644
index 0000000000..f4b6502b35
--- /dev/null
+++ b/zephyr/program/skyrim/morthal/src/usb_mux_config.c
@@ -0,0 +1,142 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Morthal board-specific USB-C mux configuration */
+
+#include "console.h"
+#include "cros_board_info.h"
+#include "cros_cbi.h"
+#include "driver/retimer/anx7483_public.h"
+#include "hooks.h"
+#include "ioexpander.h"
+#include "usb_mux.h"
+#include "usbc/usb_muxes.h"
+
+#include <zephyr/drivers/gpio.h>
+
+#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args)
+#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args)
+
+/*
+ * USB C0 (general) and C1 (just ANX DB) use IOEX pins to
+ * indicate flipped polarity to a protection switch.
+ */
+static int ioex_set_flip(int port, mux_state_t mux_state)
+{
+ if (port == 0) {
+ if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
+ gpio_pin_set_dt(
+ GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
+ 1);
+ else
+ gpio_pin_set_dt(
+ GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
+ 0);
+ } else {
+ if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
+ gpio_pin_set_dt(
+ GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
+ 1);
+ else
+ gpio_pin_set_dt(
+ GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
+ 0);
+ }
+
+ return EC_SUCCESS;
+}
+
+int board_anx7483_c0_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+ /* Set the SBU polarity mux */
+ RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
+
+ return anx7483_set_default_tuning(me, mux_state);
+}
+
+int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+ bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED;
+
+ /* Set the SBU polarity mux */
+ RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
+
+ /* Remove flipped from the state for easier compraisons */
+ mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED;
+
+ RETURN_ERROR(anx7483_set_default_tuning(me, mux_state));
+
+ if (mux_state == USB_PD_MUX_USB_ENABLED) {
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
+ ANX7483_EQ_SETTING_12_5DB));
+ } else if (mux_state == USB_PD_MUX_DP_ENABLED) {
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
+ ANX7483_EQ_SETTING_12_5DB));
+ } else if (mux_state == USB_PD_MUX_DOCK && !flipped) {
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
+ ANX7483_EQ_SETTING_12_5DB));
+ } else if (mux_state == USB_PD_MUX_DOCK && flipped) {
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
+ ANX7483_EQ_SETTING_12_5DB));
+ RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
+ ANX7483_EQ_SETTING_12_5DB));
+ }
+
+ return EC_SUCCESS;
+}
+
+int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+ CPRINTSUSB("C1: PS8818 mux using default tuning");
+
+ /* Once a DP connection is established, we need to set IN_HPD */
+ if (mux_state & USB_PD_MUX_DP_ENABLED)
+ ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1);
+ else
+ ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0);
+
+ return 0;
+}
+
+static void setup_mux(void)
+{
+ uint32_t val;
+
+ if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0)
+ CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG");
+ /* Val will have our dts default on error, so continue setup */
+
+ if (val == FW_IO_DB_PS8811_PS8818) {
+ CPRINTSUSB("C1: Setting PS8818 mux");
+ USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_ps8818_port1);
+ } else if (val == FW_IO_DB_NONE_ANX7483) {
+ CPRINTSUSB("C1: Setting ANX7483 mux");
+ } else {
+ CPRINTSUSB("Unexpected DB_IO board: %d", val);
+ }
+}
+DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C);