diff options
| author | Wai-Hong Tam <waihong@google.com> | 2021-07-19 18:26:23 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-07-20 20:56:48 +0000 |
| commit | f5364070332169ea2733b750df3265f410ea8be6 (patch) | |
| tree | 5a7e50d558c347fa307c706d1777cc892da1e0e7 /zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h | |
| parent | 64b6e903dd03150d255513e6f35be48aff701a58 (diff) | |
| download | chrome-ec-f5364070332169ea2733b750df3265f410ea8be6.tar.gz | |
zephyr: herobrine_npcx9: Initial image which uses NPCX9
This CL copies the Zephyr board/trogdor to board/herobrine_npcx9.
Modify the chip config to npcx9m3f and some related configs (simply
rename) and dts (update the UART property). The board/herobrine_npcx9
and other NPCX9 boards, like board/brya will be merged to a single
board. But the merge needs more work to remove the not-common configs
and dts to the project directories. Leave it as a future work.
This CL also copies the project trogdor/herobrine_npcx7 to
herobrine/herobrine_npcx9. Remove the dead files power.c and
hibernate.c, in the EC-OS directory. Remove the Zephyr 2.5 support
and board.cmake (needed only for 2.5).
BRANCH=None
BUG=b:192253134
TEST=Built the herobrine_npcx9 image successfully.
Change-Id: I9641768ee978920f6a8677f13ae14e0a26ad35f4
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993220
Reviewed-by: Yuval Peress <peress@chromium.org>
Diffstat (limited to 'zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h')
| -rw-r--r-- | zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h b/zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h new file mode 100644 index 0000000000..df4dcb0e25 --- /dev/null +++ b/zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h @@ -0,0 +1,63 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_GPIO_MAP_H +#define __ZEPHYR_GPIO_MAP_H + +#include <devicetree.h> +#include <gpio_signal.h> + +#ifdef CONFIG_PLATFORM_EC_GMR_TABLET_MODE +#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L +#endif + +/* + * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items. + * + * Each GPIO_INT requires three parameters: + * gpio_signal - The enum gpio_signal for the interrupt gpio + * interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH) + * handler - The platform/ec interrupt handler. + * + * Ensure that this files includes all necessary headers to declare all + * referenced handler functions. + * + * For example, one could use the follow definition: + * #define EC_CROS_GPIO_INTERRUPTS \ + * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print) + */ +#define EC_CROS_GPIO_INTERRUPTS \ + GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt) \ + GPIO_INT(GPIO_LID_OPEN, GPIO_INT_EDGE_BOTH, lid_interrupt) \ + GPIO_INT(GPIO_WP_L, GPIO_INT_EDGE_BOTH, switch_interrupt) \ + GPIO_INT(GPIO_POWER_BUTTON_L, GPIO_INT_EDGE_BOTH, \ + power_button_interrupt) \ + GPIO_INT(GPIO_VOLUME_DOWN_L, GPIO_INT_EDGE_BOTH, button_interrupt) \ + GPIO_INT(GPIO_VOLUME_UP_L, GPIO_INT_EDGE_BOTH, button_interrupt) \ + GPIO_INT(GPIO_AP_RST_L, GPIO_INT_EDGE_BOTH, chipset_ap_rst_interrupt) \ + GPIO_INT(GPIO_AP_SUSPEND, GPIO_INT_EDGE_BOTH, power_signal_interrupt) \ + GPIO_INT(GPIO_DEPRECATED_AP_RST_REQ, GPIO_INT_EDGE_BOTH, \ + power_signal_interrupt) \ + GPIO_INT(GPIO_POWER_GOOD, GPIO_INT_EDGE_BOTH, \ + chipset_power_good_interrupt) \ + GPIO_INT(GPIO_PS_HOLD, GPIO_INT_EDGE_BOTH, power_signal_interrupt) \ + GPIO_INT(GPIO_WARM_RESET_L, GPIO_INT_EDGE_BOTH, \ + chipset_warm_reset_interrupt) \ + GPIO_INT(GPIO_USB_C0_PD_INT_ODL, GPIO_INT_EDGE_FALLING, \ + tcpc_alert_event) \ + GPIO_INT(GPIO_USB_C1_PD_INT_ODL, GPIO_INT_EDGE_FALLING, \ + tcpc_alert_event) \ + GPIO_INT(GPIO_USB_C0_SWCTL_INT_ODL, GPIO_INT_EDGE_FALLING, \ + ppc_interrupt) \ + GPIO_INT(GPIO_USB_C1_SWCTL_INT_ODL, GPIO_INT_EDGE_FALLING, \ + ppc_interrupt) \ + GPIO_INT(GPIO_USB_C0_BC12_INT_L, GPIO_INT_EDGE_FALLING, usb0_evt) \ + GPIO_INT(GPIO_USB_C1_BC12_INT_L, GPIO_INT_EDGE_FALLING, usb1_evt) \ + GPIO_INT(GPIO_USB_A0_OC_ODL, GPIO_INT_EDGE_BOTH, usba_oc_interrupt) \ + GPIO_INT(GPIO_ACCEL_GYRO_INT_L, GPIO_INT_EDGE_FALLING, \ + bmi160_interrupt) \ + GPIO_INT(GPIO_TABLET_MODE_L, GPIO_INT_EDGE_BOTH, gmr_tablet_switch_isr) + +#endif /* __ZEPHYR_GPIO_MAP_H */ |