ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish

In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.

This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.

The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.

BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>

14 files changed, 0 insertions, 1816 deletions

diff --git a/zephyr/projects/herobrine/herobrine_npcx9/CMakeLists.txt b/zephyr/projects/herobrine/herobrine_npcx9/CMakeLists.txt
deleted file mode 100644
index dfccaf12c6..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/CMakeLists.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-cmake_minimum_required(VERSION 3.13.1)
-
-find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
-project(herobrine_npcx9)
-
-zephyr_library_include_directories(include)
-
-# Board specific implementation
-zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC
-  "src/usbc_config.c"
-  "src/usb_pd_policy.c")
-zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_COMMON
-  "src/led.c")
-zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C
-  "src/i2c.c")
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/battery.dts b/zephyr/projects/herobrine/herobrine_npcx9/battery.dts
deleted file mode 100644
index ab4b28999a..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/battery.dts
+++ /dev/null
@@ -1,12 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/ {
-	batteries {
-		default_battery: ap16l5j {
-			compatible = "panasonic,ap16l5j";
-		};
-	};
-};
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/gpio.dts b/zephyr/projects/herobrine/herobrine_npcx9/gpio.dts
deleted file mode 100644
index 1f5052af04..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/gpio.dts
+++ /dev/null
@@ -1,388 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/ {
-	named-gpios {
-		compatible = "named-gpios";
-
-		usb_c0_pd_int_odl {
-			gpios = <&gpioe 0 GPIO_INPUT>;
-			enum-name = "GPIO_USB_C0_PD_INT_ODL";
-			label = "USB_C0_PD_INT_ODL";
-		};
-		usb_c1_pd_int_odl {
-			gpios = <&gpiof 5 GPIO_INPUT>;
-			enum-name = "GPIO_USB_C1_PD_INT_ODL";
-			label = "USB_C1_PD_INT_ODL";
-		};
-		usb_c0_swctl_int_odl {
-			gpios = <&gpio0 3 GPIO_INPUT>;
-			enum-name = "GPIO_USB_C0_SWCTL_INT_ODL";
-			label = "USB_C0_SWCTL_INT_ODL";
-		};
-		usb_c1_swctl_int_odl {
-			gpios = <&gpio4 0 GPIO_INPUT>;
-			enum-name = "GPIO_USB_C1_SWCTL_INT_ODL";
-			label = "USB_C1_SWCTL_INT_ODL";
-		};
-		usb_c0_bc12_int_l {
-			gpios = <&gpio6 1 (GPIO_INPUT | GPIO_PULL_UP)>;
-			enum-name = "GPIO_USB_C0_BC12_INT_L";
-			label = "USB_C0_BC12_INT_L";
-		};
-		usb_c1_bc12_int_l {
-			gpios = <&gpio8 2 (GPIO_INPUT | GPIO_PULL_UP)>;
-			enum-name = "GPIO_USB_C1_BC12_INT_L";
-			label = "USB_C1_BC12_INT_L";
-		};
-		usb_a0_oc_odl {
-			gpios = <&gpiof 4 (GPIO_INPUT | GPIO_PULL_UP)>;
-			enum-name = "GPIO_USB_A0_OC_ODL";
-			label = "USB_A0_OC_ODL";
-		};
-		gpio_chg_acok_od: chg_acok_od {
-			gpios = <&gpiod 2 GPIO_INPUT>;
-			enum-name = "GPIO_AC_PRESENT";
-			label = "CHG_ACOK_OD";
-		};
-		gpio_ec_pwr_btn_odl: ec_pwr_btn_odl {
-			gpios = <&gpio0 0 GPIO_INPUT>;
-			enum-name = "GPIO_POWER_BUTTON_L";
-			label = "EC_PWR_BTN_ODL";
-		};
-		ec_voldn_btn_odl {
-			gpios = <&gpio6 2 (GPIO_INPUT | GPIO_PULL_UP)>;
-			enum-name = "GPIO_VOLUME_DOWN_L";
-			label = "EC_VOLDN_BTN_ODL";
-		};
-		ec_volup_btn_odl {
-			gpios = <&gpioc 2 (GPIO_INPUT | GPIO_PULL_UP)>;
-			enum-name = "GPIO_VOLUME_UP_L";
-			label = "EC_VOLUP_BTN_ODL";
-		};
-		ec_wp_odl {
-			gpios = <&gpiod 3 GPIO_INPUT>;
-			enum-name = "GPIO_WP_L";
-			label = "EC_WP_ODL";
-		};
-		gpio_lid_open_ec: lid_open_ec {
-			gpios = <&gpio0 1 GPIO_INPUT>;
-			enum-name = "GPIO_LID_OPEN";
-			label = "LID_OPEN_EC";
-		};
-		ap_rst_l {
-			gpios = <&gpio5 1 GPIO_INPUT>;
-			enum-name = "GPIO_AP_RST_L";
-			label = "AP_RST_L";
-		};
-		ps_hold {
-			gpios = <&gpioa 6 (GPIO_INPUT | GPIO_PULL_DOWN)>;
-			enum-name = "GPIO_PS_HOLD";
-			label = "PS_HOLD";
-		};
-		ap_suspend {
-			gpios = <&gpio5 7 GPIO_INPUT>;
-			enum-name = "GPIO_AP_SUSPEND";
-			label = "AP_SUSPEND";
-		};
-		power_good {
-			gpios = <&gpio3 7 (GPIO_INPUT | GPIO_PULL_DOWN)>;
-			enum-name = "GPIO_POWER_GOOD";
-			label = "MB_POWER_GOOD";
-		};
-		warm_reset_l {
-			gpios = <&gpiob 0 GPIO_INPUT>;
-			enum-name = "GPIO_WARM_RESET_L";
-			label = "WARM_RESET_L";
-		};
-		ap_ec_spi_cs_l {
-			gpios = <&gpio5 3 (GPIO_INPUT | GPIO_PULL_DOWN)>;
-			label = "AP_EC_SPI_CS_L";
-		};
-		tablet_mode_l {
-			gpios = <&gpioc 6 GPIO_INPUT>;
-			enum-name = "GPIO_TABLET_MODE_L";
-			label = "TABLET_MODE_L";
-		};
-		gpio_accel_gyro_int_l: accel_gyro_int_l {
-			gpios = <&gpioa 3 GPIO_INPUT>;
-			enum-name = "GPIO_ACCEL_GYRO_INT_L";
-			label = "ACCEL_GYRO_INT_L";
-		};
-		gpio_rtc_ec_wake_odl: rtc_ec_wake_odl {
-			#gpio-cells = <0>;
-			gpios = <&gpio0 2 GPIO_INPUT>;
-			enum-name = "GPIO_EC_RST_ODL";
-			label = "EC_RST_ODL";
-		};
-		ec_entering_rw {
-			gpios = <&gpio7 2 GPIO_OUT_LOW>;
-			enum-name = "GPIO_ENTERING_RW";
-			label = "EC_ENTERING_RW";
-		};
-		ccd_mode_odl {
-			gpios = <&gpio6 3 GPIO_INPUT>;
-			enum-name = "GPIO_CCD_MODE_ODL";
-			label = "CCD_MODE_ODL";
-		};
-		ec_batt_pres_odl {
-			gpios = <&gpioe 5 GPIO_INPUT>;
-			enum-name = "GPIO_BATT_PRES_ODL";
-			label = "EC_BATT_PRES_ODL";
-		};
-		ec_gsc_packet_mode {
-			gpios = <&gpio8 3 GPIO_OUT_LOW>;
-			enum-name = "GPIO_PACKET_MODE_EN";
-			label = "EC_GSC_PACKET_MODE";
-		};
-		pmic_resin_l {
-			gpios = <&gpioa 0 GPIO_ODR_HIGH>;
-			enum-name = "GPIO_PMIC_RESIN_L";
-			label = "PMIC_RESIN_L";
-		};
-		pmic_kpd_pwr_odl {
-			gpios = <&gpioa 2 GPIO_ODR_HIGH>;
-			enum-name = "GPIO_PMIC_KPD_PWR_ODL";
-			label = "PMIC_KPD_PWR_ODL";
-		};
-		ap_ec_int_l {
-			gpios = <&gpio5 6 GPIO_ODR_HIGH>;
-			enum-name = "GPIO_EC_INT_L";
-			label = "AP_EC_INT_L";
-		};
-		gpio_switchcap_on: switchcap_on {
-			gpios = <&gpiod 5 GPIO_OUT_LOW>;
-			enum-name = "GPIO_SWITCHCAP_ON";
-			label = "SWITCHCAP_ON";
-		};
-		en_pp5000_s5 {
-			gpios = <&gpio7 3 GPIO_OUT_HIGH>;
-			enum-name = "GPIO_EN_PP5000";
-			label = "EN_PP5000_S5";
-		};
-		ec_bl_disable_l {
-			gpios = <&gpiob 6 GPIO_OUT_LOW>;
-			enum-name = "GPIO_ENABLE_BACKLIGHT";
-			label = "EC_BL_DISABLE_L";
-		};
-		lid_accel_int_l {
-			gpios = <&gpioa 1 GPIO_INPUT>;
-			enum-name = "GPIO_LID_ACCEL_INT_L";
-			label = "LID_ACCEL_INT_L";
-		};
-		tp_int_gate {
-			gpios = <&gpio7 4 GPIO_OUT_LOW>;
-			enum-name = "GPIO_TRACKPAD_INT_GATE";
-			label = "TP_INT_GATE";
-		};
-		usb_c0_pd_rst_l {
-			gpios = <&gpiof 1 GPIO_OUT_HIGH>;
-			enum-name = "GPIO_USB_C0_PD_RST_L";
-			label = "USB_C0_PD_RST_L";
-		};
-		usb_c1_pd_rst_l {
-			gpios = <&gpioe 4 GPIO_OUT_HIGH>;
-			enum-name = "GPIO_USB_C1_PD_RST_L";
-			label = "USB_C1_PD_RST_L";
-		};
-		dp_mux_oe_l {
-			gpios = <&gpiob 1 GPIO_ODR_HIGH>;
-			enum-name = "GPIO_DP_MUX_OE_L";
-			label = "DP_MUX_OE_L";
-		};
-		dp_mux_sel {
-			gpios = <&gpio4 5 GPIO_OUT_LOW>;
-			enum-name = "GPIO_DP_MUX_SEL";
-			label = "DP_MUX_SEL";
-		};
-		dp_hot_plug_det_r {
-			gpios = <&gpio9 5 GPIO_OUT_LOW>;
-			enum-name = "GPIO_DP_HOT_PLUG_DET";
-			label = "DP_HOT_PLUG_DET_R";
-		};
-		en_usb_a_5v {
-			gpios = <&gpiof 0 GPIO_OUT_LOW>;
-			enum-name = "GPIO_EN_USB_A_5V";
-			label = "EN_USB_A_5V";
-		};
-		usb_a_cdp_ilim_en_l {
-			gpios = <&gpio7 5 GPIO_OUT_HIGH>;
-			label = "USB_A_CDP_ILIM_EN_L";
-		};
-		ec_chg_led_y_c0 {
-			gpios = <&gpio6 0 GPIO_OUT_LOW>;
-			enum-name = "GPIO_EC_CHG_LED_Y_C0";
-			label = "EC_CHG_LED_Y_C0";
-		};
-		ec_chg_led_w_c0 {
-			gpios = <&gpioc 0 GPIO_OUT_LOW>;
-			enum-name = "GPIO_EC_CHG_LED_W_C0";
-			label = "EC_CHG_LED_W_C0";
-		};
-		ec_chg_led_y_c1 {
-			gpios = <&gpioc 3 GPIO_OUT_LOW>;
-			enum-name = "GPIO_EC_CHG_LED_Y_C1";
-			label = "EC_CHG_LED_Y_C1";
-		};
-		ec_chg_led_w_c1 {
-			gpios = <&gpioc 4 GPIO_OUT_LOW>;
-			enum-name = "GPIO_EC_CHG_LED_W_C1";
-			label = "EC_CHG_LED_W_C1";
-		};
-		ap_ec_spi_mosi {
-			gpios = <&gpio4 6 (GPIO_INPUT | GPIO_PULL_DOWN)>;
-			label = "AP_EC_SPI_MOSI";
-		};
-		ap_ec_spi_miso {
-			gpios = <&gpio4 7 (GPIO_INPUT | GPIO_PULL_DOWN)>;
-			label = "AP_EC_SPI_MISO";
-		};
-		ap_ec_spi_clk {
-			gpios = <&gpio5 5 (GPIO_INPUT | GPIO_PULL_DOWN)>;
-			label = "AP_EC_SPI_CLK";
-		};
-		gpio_brd_id0: brd_id0 {
-			gpios = <&gpio9 4 GPIO_INPUT>;
-			enum-name = "GPIO_BOARD_VERSION1";
-			label = "BRD_ID0";
-		};
-		gpio_brd_id1: brd_id1 {
-			gpios = <&gpio9 7 GPIO_INPUT>;
-			enum-name = "GPIO_BOARD_VERSION2";
-			label = "BRD_ID1";
-		};
-		gpio_brd_id2: brd_id2 {
-			gpios = <&gpioa 5 GPIO_INPUT>;
-			enum-name = "GPIO_BOARD_VERSION3";
-			label = "BRD_ID2";
-		};
-		gpio_sku_id0: sku_id0 {
-			gpios = <&gpio6 7 GPIO_INPUT>;
-			enum-name = "GPIO_SKU_ID0";
-			label = "SKU_ID0";
-		};
-		gpio_sku_id1: sku_id1 {
-			gpios = <&gpio7 0 GPIO_INPUT>;
-			enum-name = "GPIO_SKU_ID1";
-			label = "SKU_ID1";
-		};
-		gpio_sku_id2: sku_id2 {
-			gpios = <&gpioe 1 GPIO_INPUT>;
-			enum-name = "GPIO_SKU_ID2";
-			label = "SKU_ID2";
-		};
-		gpio_switchcap_pg: src_vph_pwr_pg {
-			gpios = <&gpioe 2 (GPIO_INPUT | GPIO_PULL_DOWN)>;
-			enum-name = "GPIO_SWITCHCAP_PG";
-			label = "SRC_VPH_PWR_PG";
-		};
-		arm_x86 {
-			gpios = <&gpio6 6 GPIO_OUT_LOW>;
-			label = "ARM_X86";
-		};
-		ec_kso_02_inv {
-			gpios = <&gpio1 7 GPIO_OUT_LOW>;
-			enum-name = "GPIO_KBD_KSO2";
-			label = "EC_KSO_02_INV";
-		};
-	};
-
-	def-lvol-io-list {
-		compatible = "nuvoton,npcx-lvolctrl-def";
-		lvol-io-pads = <
-			&lvol_iob3 /* EC_I2C_SENSOR_SCL */
-			&lvol_iob2 /* EC_I2C_SENSOR_SDA */
-		>;
-	};
-
-	hibernate-wake-pins {
-		compatible = "cros-ec,hibernate-wake-pins";
-		wakeup-pins = <
-			&gpio_chg_acok_od
-			&gpio_ec_pwr_btn_odl
-			&gpio_lid_open_ec
-			&gpio_rtc_ec_wake_odl
-		>;
-	};
-
-	vsby-psl-in-list {
-		/* Use PSL_IN1/2/3/4 as detection pins from hibernate mode */
-		psl-in-pads = <&psl_in1 &psl_in2 &psl_in3 &psl_in4>;
-	};
-
-	sku {
-		compatible = "cros-ec,gpio-id";
-
-		bits  = <
-			&gpio_sku_id0
-			&gpio_sku_id1
-			&gpio_sku_id2
-		>;
-
-		system = "binary_first_base3";
-	};
-
-	board {
-		compatible = "cros-ec,gpio-id";
-
-		bits  = <
-			&gpio_brd_id0
-			&gpio_brd_id1
-			&gpio_brd_id2
-		>;
-
-		system = "binary_first_base3";
-	};
-
-	unused-pins {
-		compatible = "unused-gpios";
-		unused-gpios =
-			<&gpio5 2 0>,
-			<&gpio5 4 0>,
-			<&gpio7 6 0>,
-			<&gpioc 5 0>,
-			<&gpiod 1 0>,
-			<&gpiod 0 0>,
-			<&gpioe 3 0>,
-			<&gpioc 1 0>,
-			<&gpio0 4 0>,
-			<&gpiod 6 0>,
-			<&gpio3 2 0>,
-			<&gpio3 5 0>,
-			<&gpiod 7 0>,
-			<&gpio8 6 0>,
-			<&gpiod 4 0>,
-			<&gpio4 1 0>,
-			<&gpio3 4 0>,
-			<&gpioc 7 0>,
-			<&gpioa 4 0>,
-			<&gpio9 6 0>,
-			<&gpio9 3 0>,
-			<&gpioa 7 0>,
-			<&gpio5 0 0>,
-			<&gpio8 1 0>;
-	};
-};
-
-/* Power switch logic input pads */
-&psl_in1 {
-	/* ACOK_OD */
-	flag = <NPCX_PSL_RISING_EDGE>;
-};
-
-&psl_in2 {
-	/* EC_PWR_BTN_ODL */
-	flag = <NPCX_PSL_FALLING_EDGE>;
-};
-
-&psl_in3 {
-	/* LID_OPEN_EC */
-	flag = <NPCX_PSL_RISING_EDGE>;
-};
-
-&psl_in4 {
-	/* RTC_EC_WAKE_ODL */
-	flag = <NPCX_PSL_FALLING_EDGE>;
-};
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/i2c.dts b/zephyr/projects/herobrine/herobrine_npcx9/i2c.dts
deleted file mode 100644
index 0821f8b806..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/i2c.dts
+++ /dev/null
@@ -1,160 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/ {
-	aliases {
-		i2c-0 = &i2c0_0;
-		i2c-1 = &i2c1_0;
-		i2c-2 = &i2c2_0;
-		i2c-3 = &i2c3_0;
-		i2c-4 = &i2c4_1;
-		i2c-5 = &i2c5_0;
-		i2c-7 = &i2c7_0;
-	};
-
-	named-i2c-ports {
-		compatible = "named-i2c-ports";
-
-		power {
-			i2c-port = <&i2c0_0>;
-			enum-name = "I2C_PORT_POWER";
-			label = "POWER";
-		};
-		battery {
-			i2c-port = <&i2c0_0>;
-			remote-port = <0>;
-			enum-name = "I2C_PORT_BATTERY";
-			label = "BATTERY";
-		};
-		virtual {
-			i2c-port = <&i2c0_0>;
-			enum-name = "I2C_PORT_VIRTUAL";
-			label = "VIRTUAL";
-		};
-		charger {
-			i2c-port = <&i2c0_0>;
-			enum-name = "I2C_PORT_CHARGER";
-			label = "CHARGER";
-		};
-		tcpc0 {
-			i2c-port = <&i2c1_0>;
-			enum-name = "I2C_PORT_TCPC0";
-			label = "TCPC0";
-		};
-		tcpc1 {
-			i2c-port = <&i2c2_0>;
-			enum-name = "I2C_PORT_TCPC1";
-			label = "TCPC1";
-		};
-		rtc {
-			i2c-port = <&i2c4_1>;
-			enum-name = "I2C_PORT_RTC";
-			label = "RTC";
-		};
-		eeprom {
-			i2c-port = <&i2c5_0>;
-			enum-name = "I2C_PORT_EEPROM";
-			label = "EEPROM";
-		};
-		i2c_sensor: sensor {
-			i2c-port = <&i2c7_0>;
-			enum-name = "I2C_PORT_SENSOR";
-			label = "SENSOR";
-		};
-		accel {
-			i2c-port = <&i2c7_0>;
-			enum-name = "I2C_PORT_ACCEL";
-			label = "ACCEL";
-		};
-	};
-
-
-};
-
-&i2c0_0 {
-	status = "okay";
-	clock-frequency = <I2C_BITRATE_STANDARD>;
-
-	isl9238: isl9238@9 {
-		compatible = "intersil,isl9238";
-		reg = <0x09>;
-		label = "ISL9238_CHARGER";
-	};
-};
-
-&i2c_ctrl0 {
-	status = "okay";
-};
-
-&i2c1_0 {
-	status = "okay";
-	/*
-	 * TODO(b/200280341): PS8805 SPI ROM access
-	 *
-	 * The PS8805 supports 1 MHz during normal operation, but only
-	 * 400 Khz during firmware updates. The I2C passthru commands don't
-	 * currently support changing the I2C frequency or notifying the EC
-	 * that a programming operation is going to start.  Lower the clock
-	 * rate to 400 kHz for all accesses.
-	 */
-	clock-frequency = <I2C_BITRATE_FAST>;
-};
-
-&i2c_ctrl1 {
-	status = "okay";
-};
-
-&i2c2_0 {
-	status = "okay";
-	/* TODO(b/200280341): PS8805 SPI ROM access */
-	clock-frequency = <I2C_BITRATE_FAST>;
-};
-
-&i2c_ctrl2 {
-	status = "okay";
-};
-
-&i2c3_0 {
-	/* Not used as no WLC connected */
-	clock-frequency = <I2C_BITRATE_FAST>;
-};
-
-&i2c_ctrl3 {
-	status = "okay";
-};
-
-&i2c4_1 {
-	status = "okay";
-	clock-frequency = <I2C_BITRATE_FAST>;
-
-	pcf85063a: pcf85063a@51 {
-		compatible = "nxp,rtc-pcf85063a";
-		reg = <0x51>;
-		label = "RTC_PCF85063A";
-		int-gpios = <&gpio_rtc_ec_wake_odl>;
-	};
-};
-
-&i2c_ctrl4 {
-	status = "okay";
-};
-
-&i2c5_0 {
-	status = "okay";
-	clock-frequency = <I2C_BITRATE_FAST>;
-};
-
-&i2c_ctrl5 {
-	status = "okay";
-};
-
-&i2c7_0 {
-	status = "okay";
-	clock-frequency = <I2C_BITRATE_FAST>;
-};
-
-&i2c_ctrl7 {
-	status = "okay";
-};
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h b/zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h
deleted file mode 100644
index 00ab9bd98c..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifndef __ZEPHYR_GPIO_MAP_H
-#define __ZEPHYR_GPIO_MAP_H
-
-#include <devicetree.h>
-#include <gpio_signal.h>
-
-#ifdef CONFIG_PLATFORM_EC_GMR_TABLET_MODE
-#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L
-#endif
-
-/*
- * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items.
- *
- * Each GPIO_INT requires three parameters:
- *   gpio_signal - The enum gpio_signal for the interrupt gpio
- *   interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH)
- *   handler - The platform/ec interrupt handler.
- *
- * Ensure that this files includes all necessary headers to declare all
- * referenced handler functions.
- *
- * For example, one could use the follow definition:
- * #define EC_CROS_GPIO_INTERRUPTS \
- *   GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print)
- */
-#define EC_CROS_GPIO_INTERRUPTS                                               \
-	GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt)     \
-	GPIO_INT(GPIO_LID_OPEN, GPIO_INT_EDGE_BOTH, lid_interrupt)            \
-	GPIO_INT(GPIO_WP_L, GPIO_INT_EDGE_BOTH, switch_interrupt)             \
-	GPIO_INT(GPIO_POWER_BUTTON_L, GPIO_INT_EDGE_BOTH,                     \
-		 power_button_interrupt)                                      \
-	GPIO_INT(GPIO_VOLUME_DOWN_L, GPIO_INT_EDGE_BOTH, button_interrupt)    \
-	GPIO_INT(GPIO_VOLUME_UP_L, GPIO_INT_EDGE_BOTH, button_interrupt)      \
-	GPIO_INT(GPIO_AP_RST_L, GPIO_INT_EDGE_BOTH, chipset_ap_rst_interrupt) \
-	GPIO_INT(GPIO_AP_SUSPEND, GPIO_INT_EDGE_BOTH, power_signal_interrupt) \
-	GPIO_INT(GPIO_POWER_GOOD, GPIO_INT_EDGE_BOTH, power_signal_interrupt) \
-	GPIO_INT(GPIO_PS_HOLD, GPIO_INT_EDGE_BOTH, power_signal_interrupt)    \
-	GPIO_INT(GPIO_WARM_RESET_L, GPIO_INT_EDGE_BOTH,                       \
-		 power_signal_interrupt)                                      \
-	GPIO_INT(GPIO_USB_C0_PD_INT_ODL, GPIO_INT_EDGE_FALLING,               \
-		 tcpc_alert_event)                                            \
-	GPIO_INT(GPIO_USB_C1_PD_INT_ODL, GPIO_INT_EDGE_FALLING,               \
-		 tcpc_alert_event)                                            \
-	GPIO_INT(GPIO_USB_C0_SWCTL_INT_ODL, GPIO_INT_EDGE_FALLING,            \
-		 ppc_interrupt)                                               \
-	GPIO_INT(GPIO_USB_C1_SWCTL_INT_ODL, GPIO_INT_EDGE_FALLING,            \
-		 ppc_interrupt)                                               \
-	GPIO_INT(GPIO_USB_C0_BC12_INT_L, GPIO_INT_EDGE_FALLING, usb0_evt)     \
-	GPIO_INT(GPIO_USB_C1_BC12_INT_L, GPIO_INT_EDGE_FALLING, usb1_evt)     \
-	GPIO_INT(GPIO_USB_A0_OC_ODL, GPIO_INT_EDGE_BOTH, usba_oc_interrupt)   \
-	GPIO_INT(GPIO_ACCEL_GYRO_INT_L, GPIO_INT_EDGE_FALLING,                \
-		 bmi260_interrupt)                                            \
-	GPIO_INT(GPIO_TABLET_MODE_L, GPIO_INT_EDGE_BOTH, gmr_tablet_switch_isr)
-
-#endif /* __ZEPHYR_GPIO_MAP_H */
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/include/pwm_map.h b/zephyr/projects/herobrine/herobrine_npcx9/include/pwm_map.h
deleted file mode 100644
index e704b6d6d3..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/include/pwm_map.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifndef __ZEPHYR_PWM_MAP_H
-#define __ZEPHYR_PWM_MAP_H
-
-#include <devicetree.h>
-
-#include "pwm/pwm.h"
-
-#define PWM_CH_KBLIGHT		NAMED_PWM(kblight)
-#define PWM_CH_DISPLIGHT	NAMED_PWM(displight)
-
-#endif /* __ZEPHYR_PWM_MAP_H */
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/motionsense.dts b/zephyr/projects/herobrine/herobrine_npcx9/motionsense.dts
deleted file mode 100644
index 977c27bfc3..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/motionsense.dts
+++ /dev/null
@@ -1,157 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include <dt-bindings/motionsense/utils.h>
-
-
-/ {
-	aliases {
-		/*
-		 * motion sense's <>_INT_EVENT is handled
-		 * by alias. Using the alias, each driver creates
-		 * its own <>_INT_EVENT.
-		 */
-		bmi260-int = &base_accel;
-	};
-
-	/*
-	 * Declare mutexes used by sensor drivers.
-	 * A mutex node is used to create an instance of mutex_t.
-	 * A mutex node is referenced by a sensor node if the
-	 * corresponding sensor driver needs to use the
-	 * instance of the mutex.
-	 */
-	motionsense-mutex {
-		compatible = "cros-ec,motionsense-mutex";
-		lid_mutex: lid-mutex {
-			label = "LID_MUTEX";
-		};
-
-		mutex_bmi260: bmi260-mutex {
-			label = "BMI260_MUTEX";
-		};
-	};
-
-	/* Rotation matrix used by drivers. */
-	motionsense-rotation-ref {
-		compatible = "cros-ec,motionsense-rotation-ref";
-		lid_rot_ref: lid-rotation-ref {
-			mat33 = <0 1 0
-				 (-1) 0 0
-				 0 0 1>;
-		};
-
-		base_rot_ref: base-rotation-ref {
-			mat33 = <1 0 0
-				 0 (-1) 0
-				 0 0 (-1)>;
-		};
-	};
-
-	/*
-	 * Driver specific data. A driver-specific data can be shared with
-	 * different motion sensors while they are using the same driver.
-	 *
-	 * If a node's compatible starts with "cros-ec,accelgyro-", it is for
-	 * a common structure defined in accelgyro.h.
-	 * e.g) compatible = "cros-ec,accelgyro-als-drv-data" is for
-	 * "struct als_drv_data_t" in accelgyro.h
-	 */
-	motionsense-sensor-data {
-		bma255_data: bma255-drv-data {
-			compatible = "cros-ec,drvdata-bma255";
-			status = "okay";
-		};
-
-		bmi260_data: bmi260-drv-data {
-			compatible = "cros-ec,drvdata-bmi260";
-			status = "okay";
-		};
-	};
-
-	/*
-	 * List of motion sensors that creates motion_sensors array.
-	 * The label "lid_accel" and "base_accel" are used to indicate
-	 * motion sensor IDs for lid angle calculation.
-	 */
-	motionsense-sensor {
-		lid_accel: lid-accel {
-			compatible = "cros-ec,bma255";
-			status = "okay";
-
-			label = "Lid Accel";
-			active-mask = "SENSOR_ACTIVE_S0_S3";
-			location = "MOTIONSENSE_LOC_LID";
-			mutex = <&lid_mutex>;
-			port = <&i2c_sensor>;
-			rot-standard-ref = <&lid_rot_ref>;
-			default-range = <2>;
-			drv-data = <&bma255_data>;
-			i2c-spi-addr-flags = "BMA2x2_I2C_ADDR1_FLAGS";
-			configs {
-				compatible =
-					"cros-ec,motionsense-sensor-config";
-				ec-s0 {
-					label = "SENSOR_CONFIG_EC_S0";
-					odr = <(10000 | ROUND_UP_FLAG)>;
-				};
-				ec-s3 {
-					label = "SENSOR_CONFIG_EC_S3";
-					odr = <(10000 | ROUND_UP_FLAG)>;
-				};
-			};
-		};
-
-		base_accel: base-accel {
-			compatible = "cros-ec,bmi260-accel";
-			status = "okay";
-
-			label = "Base Accel";
-			active-mask = "SENSOR_ACTIVE_S0_S3";
-			location = "MOTIONSENSE_LOC_BASE";
-			mutex = <&mutex_bmi260>;
-			port = <&i2c_sensor>;
-			rot-standard-ref = <&base_rot_ref>;
-			drv-data = <&bmi260_data>;
-			configs {
-				compatible =
-					"cros-ec,motionsense-sensor-config";
-				ec-s0 {
-					label = "SENSOR_CONFIG_EC_S0";
-					odr = <(10000 | ROUND_UP_FLAG)>;
-				};
-				ec-s3 {
-					label = "SENSOR_CONFIG_EC_S3";
-					odr = <(10000 | ROUND_UP_FLAG)>;
-				};
-			};
-		};
-
-		base-gyro {
-			compatible = "cros-ec,bmi260-gyro";
-			status = "okay";
-
-			label = "Base Gyro";
-			active-mask = "SENSOR_ACTIVE_S0_S3";
-			location = "MOTIONSENSE_LOC_BASE";
-			mutex = <&mutex_bmi260>;
-			port = <&i2c_sensor>;
-			rot-standard-ref = <&base_rot_ref>;
-			drv-data = <&bmi260_data>;
-		};
-	};
-
-	motionsense-sensor-info {
-		compatible = "cros-ec,motionsense-sensor-info";
-
-		/*
-		 * list of GPIO interrupts that have to
-		 * be enabled at initial stage
-		 */
-		sensor-irqs = <&gpio_accel_gyro_int_l>;
-		/* list of sensors in force mode */
-		accel-force-mode-sensors = <&lid_accel>;
-	};
-};
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/prj.conf b/zephyr/projects/herobrine/herobrine_npcx9/prj.conf
deleted file mode 100644
index 8c8576c78f..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/prj.conf
+++ /dev/null
@@ -1,168 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-CONFIG_CROS_EC=y
-CONFIG_SHIMMED_TASKS=y
-CONFIG_PLATFORM_EC=y
-CONFIG_PLATFORM_EC_BRINGUP=y
-CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y
-CONFIG_PLATFORM_EC_SWITCH=y
-CONFIG_PLATFORM_EC_LID_SWITCH=y
-CONFIG_PLATFORM_EC_BACKLIGHT_LID=y
-CONFIG_PLATFORM_EC_POWER_BUTTON=y
-CONFIG_I2C=y
-CONFIG_KERNEL_SHELL=y
-
-# Shell history and tab autocompletion (for convenience)
-CONFIG_SHELL_HELP=y
-CONFIG_SHELL_HISTORY=y
-CONFIG_SHELL_TAB=y
-CONFIG_SHELL_TAB_AUTOCOMPLETION=y
-
-# Miscellaneous configs
-CONFIG_PLATFORM_EC_HIBERNATE_PSL=y
-
-# LED
-CONFIG_PLATFORM_EC_LED_COMMON=y
-
-# PWM
-CONFIG_PWM=y
-CONFIG_PWM_SHELL=n
-CONFIG_PLATFORM_EC_PWM=y
-CONFIG_PLATFORM_EC_PWM_DISPLIGHT=y
-CONFIG_PLATFORM_EC_PWM_KBLIGHT=y
-
-# Application Processor is Qualcomm SC7280
-CONFIG_AP_ARM_QUALCOMM_SC7280=y
-
-# GPIO Switchcap
-CONFIG_PLATFORM_EC_SWITCHCAP_GPIO=y
-
-# Board version is selected over GPIO board ID pins.
-CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=y
-
-# Power Sequencing
-CONFIG_PLATFORM_EC_POWERSEQ=y
-CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=y
-CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n
-CONFIG_PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION=y
-CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK=y
-CONFIG_PLATFORM_EC_CHIPSET_RESUME_INIT_HOOK=y
-
-# TODO(b:193719620): Enable EC EFS2.
-CONFIG_PLATFORM_EC_VBOOT_EFS2=n
-
-# MKBP event mask
-CONFIG_PLATFORM_EC_MKBP_EVENT_WAKEUP_MASK=y
-CONFIG_PLATFORM_EC_MKBP_HOST_EVENT_WAKEUP_MASK=y
-
-# MKBP event
-CONFIG_PLATFORM_EC_MKBP_EVENT=y
-CONFIG_PLATFORM_EC_MKBP_USE_GPIO=y
-
-# Keyboard
-CONFIG_PLATFORM_EC_KEYBOARD=y
-CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_MKBP=y
-CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y
-CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y
-CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3=y
-CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y
-CONFIG_PLATFORM_EC_CMD_BUTTON=y
-CONFIG_CROS_KB_RAW_NPCX=y
-
-# ADC
-CONFIG_PLATFORM_EC_ADC=y
-CONFIG_ADC=y
-CONFIG_ADC_SHELL=n
-
-# Battery
-CONFIG_HAS_TASK_USB_CHG_P1=y
-CONFIG_PLATFORM_EC_BATTERY=y
-CONFIG_PLATFORM_EC_BATTERY_SMART=y
-CONFIG_PLATFORM_EC_I2C_VIRTUAL_BATTERY=y
-CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y
-CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y
-CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y
-CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y
-CONFIG_PLATFORM_EC_CHARGER_ISL9238=y
-CONFIG_PLATFORM_EC_CHARGE_RAMP_HW=y
-CONFIG_PLATFORM_EC_USE_BATTERY_DEVICE_CHEMISTRY=y
-CONFIG_PLATFORM_EC_BATTERY_DEVICE_CHEMISTRY="LION"
-CONFIG_PLATFORM_EC_BATTERY_REVIVE_DISCONNECT=y
-CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y
-CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC_CHARGER=y
-CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON=2
-CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON=10000
-CONFIG_PLATFORM_EC_CHARGER_PROFILE_OVERRIDE=y
-CONFIG_PLATFORM_EC_CHARGER_PSYS=y
-CONFIG_PLATFORM_EC_CHARGER_PSYS_READ=y
-CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10
-CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=20
-CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON=y
-
-# USB-A
-CONFIG_PLATFORM_EC_USB_A_PORT_COUNT=1
-
-# USB-C
-CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y
-CONFIG_PLATFORM_EC_USB_PD_USB32_DRD=n
-CONFIG_PLATFORM_EC_USBC_PPC_SN5S330=y
-CONFIG_PLATFORM_EC_USBC_RETIMER_FW_UPDATE=n
-CONFIG_PLATFORM_EC_USBC_SS_MUX_DFP_ONLY=y
-CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y
-CONFIG_PLATFORM_EC_USB_PD_5V_EN_CUSTOM=y
-CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y
-CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y
-CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT=2
-CONFIG_PLATFORM_EC_USB_PD_REV30=n
-CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y
-CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805=y
-CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n
-CONFIG_PLATFORM_EC_USB_PD_LOGGING=y
-CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB=y
-CONFIG_HAS_TASK_PD_C1=y
-CONFIG_HAS_TASK_PD_INT_C1=y
-
-# USB ID
-# This is allocated specifically for Herobrine
-# http://google3/hardware/standards/usb/
-# TODO(b/183608112): Move to device tree
-CONFIG_PLATFORM_EC_USB_PID=0x5055
-
-# RTC
-CONFIG_PLATFORM_EC_RTC=y
-CONFIG_CROS_RTC_NXP_PCF85063A=y
-CONFIG_PLATFORM_EC_HOSTCMD_RTC=y
-CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC=y
-CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC_ALARM=y
-
-# EC software sync
-CONFIG_PLATFORM_EC_VBOOT_HASH=y
-
-# Serial Host Interface (SHI) device.
-CONFIG_CROS_SHI_NPCX=y
-
-# Sensors
-CONFIG_PLATFORM_EC_MOTIONSENSE=y
-CONFIG_PLATFORM_EC_ACCEL_FIFO=y
-CONFIG_PLATFORM_EC_ACCEL_INTERRUPTS=y
-CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=y
-CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y
-CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y
-CONFIG_PLATFORM_EC_LID_ANGLE=y
-CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y
-CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=y
-CONFIG_PLATFORM_EC_TABLET_MODE=y
-CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH=y
-
-# Sensor Drivers
-CONFIG_PLATFORM_EC_ACCEL_BMA255=y
-CONFIG_PLATFORM_EC_ACCELGYRO_BMI260=y
-CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y
-
-CONFIG_SYSCON=y
-
-# Features should be enabled. But the code RAM is not enough, disable them.
-#CONFIG_PLATFORM_EC_ACCEL_SPOOF_MODE=y
-#CONFIG_PLATFORM_EC_EMULATED_SYSRQ=y
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/src/i2c.c b/zephyr/projects/herobrine/herobrine_npcx9/src/i2c.c
deleted file mode 100644
index f78ea56513..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/src/i2c.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "i2c/i2c.h"
-#include "i2c.h"
-
-/* Herobrine-NPCX9 board specific i2c implementation */
-
-#ifdef CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED
-int board_allow_i2c_passthru(int port)
-{
-	return (i2c_get_device_for_port(port) ==
-		i2c_get_device_for_port(I2C_PORT_VIRTUAL_BATTERY));
-}
-#endif
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/src/led.c b/zephyr/projects/herobrine/herobrine_npcx9/src/led.c
deleted file mode 100644
index 295c8effeb..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/src/led.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * Power and battery LED control.
- */
-
-#include "battery.h"
-#include "charge_manager.h"
-#include "charge_state.h"
-#include "chipset.h"
-#include "ec_commands.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "host_command.h"
-#include "led_common.h"
-#include "system.h"
-#include "util.h"
-
-#define BAT_LED_ON 1
-#define BAT_LED_OFF 0
-
-const enum ec_led_id supported_led_ids[] = {
-	EC_LED_ID_RIGHT_LED,
-	EC_LED_ID_LEFT_LED,
-};
-
-const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
-
-enum led_color {
-	LED_OFF = 0,
-	LED_AMBER,
-	LED_WHITE,
-	LED_COLOR_COUNT  /* Number of colors, not a color itself */
-};
-
-static void side_led_set_color(int port, enum led_color color)
-{
-	gpio_set_level(port ? GPIO_EC_CHG_LED_Y_C1 : GPIO_EC_CHG_LED_Y_C0,
-		(color == LED_AMBER) ? BAT_LED_ON : BAT_LED_OFF);
-	gpio_set_level(port ? GPIO_EC_CHG_LED_W_C1 : GPIO_EC_CHG_LED_W_C0,
-		(color == LED_WHITE) ? BAT_LED_ON : BAT_LED_OFF);
-}
-
-void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
-{
-	brightness_range[EC_LED_COLOR_AMBER] = 1;
-	brightness_range[EC_LED_COLOR_WHITE] = 1;
-}
-
-int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
-{
-	int port;
-
-	switch (led_id) {
-	case EC_LED_ID_RIGHT_LED:
-		port = 0;
-		break;
-	case EC_LED_ID_LEFT_LED:
-		port = 1;
-		break;
-	default:
-		return EC_ERROR_PARAM1;
-	}
-
-	if (brightness[EC_LED_COLOR_WHITE] != 0)
-		side_led_set_color(port, LED_WHITE);
-	else if (brightness[EC_LED_COLOR_AMBER] != 0)
-		side_led_set_color(port, LED_AMBER);
-	else
-		side_led_set_color(port, LED_OFF);
-
-	return EC_SUCCESS;
-}
-
-/*
- * Set active charge port color to the parameter, turn off all others.
- * If no port is active (-1), turn off all LEDs.
- */
-static void set_active_port_color(enum led_color color)
-{
-	int port = charge_manager_get_active_charge_port();
-
-	if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED))
-		side_led_set_color(0, (port == 0) ? color : LED_OFF);
-	if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED))
-		side_led_set_color(1, (port == 1) ? color : LED_OFF);
-}
-
-static void board_led_set_battery(void)
-{
-	static int battery_ticks;
-	uint32_t chflags = charge_get_flags();
-
-	battery_ticks++;
-
-	switch (charge_get_state()) {
-	case PWR_STATE_CHARGE:
-		/* Always indicate when charging, even in suspend. */
-		set_active_port_color(LED_AMBER);
-		break;
-	case PWR_STATE_DISCHARGE:
-		if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) {
-			if (charge_get_percent() <= 10)
-				side_led_set_color(0,
-				   (battery_ticks & 0x4) ? LED_WHITE : LED_OFF);
-			else
-				side_led_set_color(0, LED_OFF);
-		}
-
-		if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED))
-			side_led_set_color(1, LED_OFF);
-		break;
-	case PWR_STATE_ERROR:
-		set_active_port_color((battery_ticks & 0x2) ?
-				LED_WHITE : LED_OFF);
-		break;
-	case PWR_STATE_CHARGE_NEAR_FULL:
-		set_active_port_color(LED_WHITE);
-		break;
-	case PWR_STATE_IDLE: /* External power connected in IDLE */
-		if (chflags & CHARGE_FLAG_FORCE_IDLE)
-			set_active_port_color((battery_ticks & 0x4) ?
-					LED_AMBER : LED_OFF);
-		else
-			set_active_port_color(LED_WHITE);
-		break;
-	default:
-		/* Other states don't alter LED behavior */
-		break;
-	}
-}
-
-/* Called by hook task every TICK */
-static void led_tick(void)
-{
-	board_led_set_battery();
-}
-DECLARE_HOOK(HOOK_TICK, led_tick, HOOK_PRIO_DEFAULT);
-
-void led_control(enum ec_led_id led_id, enum ec_led_state state)
-{
-	enum led_color color;
-
-	if ((led_id != EC_LED_ID_RECOVERY_HW_REINIT_LED) &&
-	    (led_id != EC_LED_ID_SYSRQ_DEBUG_LED))
-		return;
-
-	if (state == LED_STATE_RESET) {
-		led_auto_control(EC_LED_ID_LEFT_LED, 1);
-		led_auto_control(EC_LED_ID_RIGHT_LED, 1);
-		board_led_set_battery();
-		return;
-	}
-
-	color = state ? LED_WHITE : LED_OFF;
-
-	led_auto_control(EC_LED_ID_LEFT_LED, 0);
-	led_auto_control(EC_LED_ID_RIGHT_LED, 0);
-
-	side_led_set_color(0, color);
-	side_led_set_color(1, color);
-}
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/src/usb_pd_policy.c b/zephyr/projects/herobrine/herobrine_npcx9/src/usb_pd_policy.c
deleted file mode 100644
index 7ca2688aef..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/src/usb_pd_policy.c
+++ /dev/null
@@ -1,262 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "charge_manager.h"
-#include "chipset.h"
-#include "console.h"
-#include "gpio.h"
-#include "system.h"
-#include "usb_mux.h"
-#include "usbc_ppc.h"
-#include "util.h"
-
-#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
-
-int pd_check_vconn_swap(int port)
-{
-	/* In G3, do not allow vconn swap since PP5000 rail is off */
-	return gpio_get_level(GPIO_EN_PP5000);
-}
-
-static uint8_t vbus_en[CONFIG_USB_PD_PORT_MAX_COUNT];
-#if CONFIG_USB_PD_PORT_MAX_COUNT == 1
-static uint8_t vbus_rp[CONFIG_USB_PD_PORT_MAX_COUNT] = {TYPEC_RP_1A5};
-#else
-static uint8_t vbus_rp[CONFIG_USB_PD_PORT_MAX_COUNT] = {TYPEC_RP_1A5,
-							TYPEC_RP_1A5};
-#endif
-
-static void board_vbus_update_source_current(int port)
-{
-	/* Both port are controlled by PPC SN5S330. */
-	ppc_set_vbus_source_current_limit(port, vbus_rp[port]);
-	ppc_vbus_source_enable(port, vbus_en[port]);
-}
-
-void pd_power_supply_reset(int port)
-{
-	int prev_en;
-
-	prev_en = vbus_en[port];
-
-	/* Disable VBUS */
-	vbus_en[port] = 0;
-	board_vbus_update_source_current(port);
-
-	/* Enable discharge if we were previously sourcing 5V */
-	if (prev_en)
-		pd_set_vbus_discharge(port, 1);
-
-	/* notify host of power info change */
-	pd_send_host_event(PD_EVENT_POWER_CHANGE);
-}
-
-int pd_set_power_supply_ready(int port)
-{
-	/* Disable charging */
-	board_vbus_sink_enable(port, 0);
-
-	pd_set_vbus_discharge(port, 0);
-
-	/* Provide VBUS */
-	vbus_en[port] = 1;
-	board_vbus_update_source_current(port);
-
-	/* notify host of power info change */
-	pd_send_host_event(PD_EVENT_POWER_CHANGE);
-
-	return EC_SUCCESS; /* we are ready */
-}
-
-int board_vbus_source_enabled(int port)
-{
-	return vbus_en[port];
-}
-
-__override void typec_set_source_current_limit(int port, enum tcpc_rp_value rp)
-{
-	vbus_rp[port] = rp;
-	board_vbus_update_source_current(port);
-}
-
-int pd_snk_is_vbus_provided(int port)
-{
-	return tcpm_check_vbus_level(port, VBUS_PRESENT);
-}
-
-/* ----------------- Vendor Defined Messages ------------------ */
-#ifdef CONFIG_USB_PD_ALT_MODE_DFP
-__override int svdm_dp_config(int port, uint32_t *payload)
-{
-	int opos = pd_alt_mode(port, TCPCI_MSG_SOP, USB_SID_DISPLAYPORT);
-	uint8_t pin_mode = get_dp_pin_mode(port);
-
-	if (!pin_mode)
-		return 0;
-
-	/*
-	 * Defer setting the usb_mux until HPD goes high, svdm_dp_attention().
-	 * The AP only supports one DP phy. An external DP mux switches between
-	 * the two ports. Should switch those muxes when it is really used,
-	 * i.e. HPD high; otherwise, the real use case is preempted, like:
-	 *  (1) plug a dongle without monitor connected to port-0,
-	 *  (2) plug a dongle without monitor connected to port-1,
-	 *  (3) plug a monitor to the port-1 dongle.
-	 */
-
-	payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
-			 CMD_DP_CONFIG | VDO_OPOS(opos));
-	payload[1] = VDO_DP_CFG(pin_mode,      /* pin mode */
-				1,             /* DPv1.3 signaling */
-				2);            /* UFP connected */
-	return 2;
-};
-
-__override void svdm_dp_post_config(int port)
-{
-	dp_flags[port] |= DP_FLAGS_DP_ON;
-}
-
-/**
- * Is the port fine to be muxed its DisplayPort lines?
- *
- * Only one port can be muxed to DisplayPort at a time.
- *
- * @param port	Port number of TCPC.
- * @return	1 is fine; 0 is bad as other port is already muxed;
- */
-static int is_dp_muxable(int port)
-{
-	int i;
-
-	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++)
-		if (i != port) {
-			if (usb_mux_get(i) & USB_PD_MUX_DP_ENABLED)
-				return 0;
-		}
-
-	return 1;
-}
-
-__override int svdm_dp_attention(int port, uint32_t *payload)
-{
-	enum gpio_signal hpd = GPIO_DP_HOT_PLUG_DET;
-	int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]);
-	int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]);
-	int cur_lvl = gpio_get_level(hpd);
-	mux_state_t mux_state;
-
-	dp_status[port] = payload[1];
-
-	if (!is_dp_muxable(port)) {
-		/* TODO(waihong): Info user? */
-		CPRINTS("p%d: The other port is already muxed.", port);
-		return 0;
-	}
-
-	/*
-	 * Initial implementation to handle HPD. Only the first-plugged port
-	 * works, i.e. sending HPD signal to AP. The second-plugged port
-	 * will be ignored.
-	 *
-	 * TODO(waihong): Continue the above case, if the first-plugged port
-	 * is then unplugged, switch to the second-plugged port and signal AP?
-	 */
-	if (lvl) {
-		/*
-		 * Enable and switch the DP port selection mux to the
-		 * correct port.
-		 *
-		 * TODO(waihong): Better to move switching DP mux to
-		 * the usb_mux abstraction.
-		 */
-		gpio_set_level(GPIO_DP_MUX_SEL, port == 1);
-		gpio_set_level(GPIO_DP_MUX_OE_L, 0);
-
-		/* Connect the SBU lines in PPC chip. */
-		if (IS_ENABLED(CONFIG_USBC_PPC_SBU))
-			ppc_set_sbu(port, 1);
-
-		/*
-		 * Connect the USB SS/DP lines in TCPC chip.
-		 *
-		 * When mf_pref not true, still use the dock muxing
-		 * because of the board USB-C topology (limited to 2
-		 * lanes DP).
-		 */
-		usb_mux_set(port, USB_PD_MUX_DOCK,
-			    USB_SWITCH_CONNECT,
-			    polarity_rm_dts(pd_get_polarity(port)));
-	} else {
-		/* Disconnect the DP port selection mux. */
-		gpio_set_level(GPIO_DP_MUX_OE_L, 1);
-		gpio_set_level(GPIO_DP_MUX_SEL, 0);
-
-		/* Disconnect the SBU lines in PPC chip. */
-		if (IS_ENABLED(CONFIG_USBC_PPC_SBU))
-			ppc_set_sbu(port, 0);
-
-		/* Disconnect the DP but keep the USB SS lines in TCPC chip. */
-		usb_mux_set(port, USB_PD_MUX_USB_ENABLED,
-			    USB_SWITCH_CONNECT,
-			    polarity_rm_dts(pd_get_polarity(port)));
-	}
-
-	if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) &&
-	    (irq || lvl))
-		/*
-		 * Wake up the AP.  IRQ or level high indicates a DP sink is now
-		 * present.
-		 */
-		pd_notify_dp_alt_mode_entry(port);
-
-	/* Configure TCPC for the HPD event, for proper muxing */
-	mux_state = (lvl ? USB_PD_MUX_HPD_LVL : USB_PD_MUX_HPD_LVL_DEASSERTED) |
-		    (irq ? USB_PD_MUX_HPD_IRQ : USB_PD_MUX_HPD_IRQ_DEASSERTED);
-	usb_mux_hpd_update(port, mux_state);
-
-	/* Signal AP for the HPD event, through GPIO to AP */
-	if (irq & cur_lvl) {
-		uint64_t now = get_time().val;
-		/* Wait for the minimum spacing between IRQ_HPD if needed */
-		if (now < svdm_hpd_deadline[port])
-			usleep(svdm_hpd_deadline[port] - now);
-
-		/* Generate IRQ_HPD pulse */
-		gpio_set_level(hpd, 0);
-		usleep(HPD_DSTREAM_DEBOUNCE_IRQ);
-		gpio_set_level(hpd, 1);
-
-		/* Set the minimum time delay (2ms) for the next HPD IRQ */
-		svdm_hpd_deadline[port] = get_time().val +
-			HPD_USTREAM_DEBOUNCE_LVL;
-	} else if (irq & !lvl) {
-		CPRINTF("ERR:HPD:IRQ&LOW\n");
-		return 0;
-	} else {
-		gpio_set_level(hpd, lvl);
-		/* Set the minimum time delay (2ms) for the next HPD IRQ */
-		svdm_hpd_deadline[port] = get_time().val +
-			HPD_USTREAM_DEBOUNCE_LVL;
-	}
-
-	return 1;
-}
-
-__override void svdm_exit_dp_mode(int port)
-{
-	if (is_dp_muxable(port)) {
-		/* Disconnect the DP port selection mux. */
-		gpio_set_level(GPIO_DP_MUX_OE_L, 1);
-		gpio_set_level(GPIO_DP_MUX_SEL, 0);
-
-		/* Signal AP for the HPD low event */
-		usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED |
-					 USB_PD_MUX_HPD_IRQ_DEASSERTED);
-		gpio_set_level(GPIO_DP_HOT_PLUG_DET, 0);
-	}
-}
-#endif /* CONFIG_USB_PD_ALT_MODE_DFP */
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/src/usbc_config.c b/zephyr/projects/herobrine/herobrine_npcx9/src/usbc_config.c
deleted file mode 100644
index 20646c28c2..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/src/usbc_config.c
+++ /dev/null
@@ -1,365 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Herobrine board-specific USB-C configuration */
-
-#include "bc12/pi3usb9201_public.h"
-#include "charger.h"
-#include "charger/isl923x_public.h"
-#include "charge_manager.h"
-#include "charge_state.h"
-#include "common.h"
-#include "config.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "ppc/sn5s330_public.h"
-#include "system.h"
-#include "tcpm/ps8xxx_public.h"
-#include "tcpm/tcpci.h"
-#include "timer.h"
-#include "usb_pd.h"
-#include "usb_mux.h"
-#include "usbc_ocp.h"
-#include "usbc_ppc.h"
-
-#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
-
-
-/* GPIO Interrupt Handlers */
-void tcpc_alert_event(enum gpio_signal signal)
-{
-	int port = -1;
-
-	switch (signal) {
-	case GPIO_USB_C0_PD_INT_ODL:
-		port = 0;
-		break;
-	case GPIO_USB_C1_PD_INT_ODL:
-		port = 1;
-		break;
-	default:
-		return;
-	}
-
-	schedule_deferred_pd_interrupt(port);
-}
-
-void usb0_evt(enum gpio_signal signal)
-{
-	task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12);
-}
-
-void usb1_evt(enum gpio_signal signal)
-{
-	task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12);
-}
-
-static void usba_oc_deferred(void)
-{
-	/* Use next number after all USB-C ports to indicate the USB-A port */
-	board_overcurrent_event(CONFIG_USB_PD_PORT_MAX_COUNT,
-				!gpio_get_level(GPIO_USB_A0_OC_ODL));
-}
-DECLARE_DEFERRED(usba_oc_deferred);
-
-void usba_oc_interrupt(enum gpio_signal signal)
-{
-	hook_call_deferred(&usba_oc_deferred_data, 0);
-}
-
-void ppc_interrupt(enum gpio_signal signal)
-{
-	switch (signal) {
-	case GPIO_USB_C0_SWCTL_INT_ODL:
-		sn5s330_interrupt(0);
-		break;
-	case GPIO_USB_C1_SWCTL_INT_ODL:
-		sn5s330_interrupt(1);
-		break;
-	default:
-		break;
-	}
-}
-
-const struct charger_config_t chg_chips[] = {
-	{
-		.i2c_port = I2C_PORT_CHARGER,
-		.i2c_addr_flags = ISL923X_ADDR_FLAGS,
-		.drv = &isl923x_drv,
-	},
-};
-
-int charger_profile_override(struct charge_state_data *curr)
-{
-	int usb_mv;
-	int port;
-
-	if (curr->state != ST_CHARGE)
-		return 0;
-
-	/* Lower the max requested voltage to 5V when battery is full. */
-	if (chipset_in_state(CHIPSET_STATE_ANY_OFF) &&
-	    !(curr->batt.flags & BATT_FLAG_BAD_STATUS) &&
-	    !(curr->batt.flags & BATT_FLAG_WANT_CHARGE) &&
-	    (curr->batt.status & STATUS_FULLY_CHARGED))
-		usb_mv = 5000;
-	else
-		usb_mv = PD_MAX_VOLTAGE_MV;
-
-	if (pd_get_max_voltage() != usb_mv) {
-		CPRINTS("VBUS limited to %dmV", usb_mv);
-		for (port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; port++)
-			pd_set_external_voltage_limit(port, usb_mv);
-	}
-
-	return 0;
-}
-
-enum ec_status charger_profile_override_get_param(uint32_t param,
-						  uint32_t *value)
-{
-	return EC_RES_INVALID_PARAM;
-}
-
-enum ec_status charger_profile_override_set_param(uint32_t param,
-						  uint32_t value)
-{
-	return EC_RES_INVALID_PARAM;
-}/* Power Path Controller */
-struct ppc_config_t ppc_chips[] = {
-	{
-		.i2c_port = I2C_PORT_TCPC0,
-		.i2c_addr_flags = SN5S330_ADDR0_FLAGS,
-		.drv = &sn5s330_drv
-	},
-	{
-		.i2c_port = I2C_PORT_TCPC1,
-		.i2c_addr_flags = SN5S330_ADDR0_FLAGS,
-		.drv = &sn5s330_drv
-	},
-};
-unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
-
-/* TCPC mux configuration */
-const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = {
-	{
-		.bus_type = EC_BUS_TYPE_I2C,
-		.i2c_info = {
-			.port = I2C_PORT_TCPC0,
-			.addr_flags = PS8751_I2C_ADDR1_FLAGS,
-		},
-		.drv = &ps8xxx_tcpm_drv,
-	},
-	{
-		.bus_type = EC_BUS_TYPE_I2C,
-		.i2c_info = {
-			.port = I2C_PORT_TCPC1,
-			.addr_flags = PS8751_I2C_ADDR1_FLAGS,
-		},
-		.drv = &ps8xxx_tcpm_drv,
-	},
-};
-
-/*
- * Port-0/1 USB mux driver.
- *
- * The USB mux is handled by TCPC chip and the HPD update is through a GPIO
- * to AP. But the TCPC chip is also needed to know the HPD status; otherwise,
- * the mux misbehaves.
- */
-const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {
-	{
-		.usb_port = 0,
-		.driver = &tcpci_tcpm_usb_mux_driver,
-		.hpd_update = &ps8xxx_tcpc_update_hpd_status,
-	},
-	{
-		.usb_port = 1,
-		.driver = &tcpci_tcpm_usb_mux_driver,
-		.hpd_update = &ps8xxx_tcpc_update_hpd_status,
-	}
-};
-
-const int usb_port_enable[USB_PORT_COUNT] = {
-	GPIO_EN_USB_A_5V,
-};
-
-/* BC1.2 */
-const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = {
-	{
-		.i2c_port = I2C_PORT_POWER,
-		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
-	},
-	{
-		.i2c_port = I2C_PORT_EEPROM,
-		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
-	},
-};
-
-/* Initialize board USC-C things */
-static void board_init_usbc(void)
-{
-	/* Enable BC1.2 interrupts */
-	gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_L);
-	gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L);
-
-	/* Enable USB-A overcurrent interrupt */
-	gpio_enable_interrupt(GPIO_USB_A0_OC_ODL);
-}
-DECLARE_HOOK(HOOK_INIT, board_init_usbc, HOOK_PRIO_DEFAULT);
-
-void board_tcpc_init(void)
-{
-	/* Only reset TCPC if not sysjump */
-	if (!system_jumped_late()) {
-		/* TODO(crosbug.com/p/61098): How long do we need to wait? */
-		board_reset_pd_mcu();
-	}
-
-	/* Enable PPC interrupts */
-	gpio_enable_interrupt(GPIO_USB_C0_SWCTL_INT_ODL);
-
-	/* Enable TCPC interrupts */
-	gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL);
-	gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL);
-
-	/*
-	 * Initialize HPD to low; after sysjump SOC needs to see
-	 * HPD pulse to enable video path
-	 */
-	for (int port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; ++port)
-		usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED |
-					 USB_PD_MUX_HPD_IRQ_DEASSERTED);
-}
-DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1);
-
-void board_reset_pd_mcu(void)
-{
-	cprints(CC_USB, "Resetting TCPCs...");
-	cflush();
-
-	gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
-	gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
-	msleep(PS8XXX_RESET_DELAY_MS);
-	gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
-	gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
-	msleep(PS8805_FW_INIT_DELAY_MS);
-}
-
-void board_set_tcpc_power_mode(int port, int mode)
-{
-	/* Ignore the "mode" to turn the chip on.  We can only do a reset. */
-	if (mode)
-		return;
-
-	board_reset_pd_mcu();
-}
-
-int board_vbus_sink_enable(int port, int enable)
-{
-	/* Both ports are controlled by PPC SN5S330 */
-	return ppc_vbus_sink_enable(port, enable);
-}
-
-int board_is_sourcing_vbus(int port)
-{
-	/* Both ports are controlled by PPC SN5S330 */
-	return ppc_is_sourcing_vbus(port);
-}
-
-void board_overcurrent_event(int port, int is_overcurrented)
-{
-	/* TODO(b/120231371): Notify AP */
-	CPRINTS("p%d: overcurrent!", port);
-}
-
-int board_set_active_charge_port(int port)
-{
-	int is_real_port = (port >= 0 &&
-			    port < CONFIG_USB_PD_PORT_MAX_COUNT);
-	int i;
-
-	if (!is_real_port && port != CHARGE_PORT_NONE)
-		return EC_ERROR_INVAL;
-
-	if (port == CHARGE_PORT_NONE) {
-		CPRINTS("Disabling all charging port");
-
-		/* Disable all ports. */
-		for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) {
-			/*
-			 * Do not return early if one fails otherwise we can
-			 * get into a boot loop assertion failure.
-			 */
-			if (board_vbus_sink_enable(i, 0))
-				CPRINTS("Disabling p%d sink path failed.", i);
-		}
-
-		return EC_SUCCESS;
-	}
-
-	/* Check if the port is sourcing VBUS. */
-	if (board_is_sourcing_vbus(port)) {
-		CPRINTS("Skip enable p%d", port);
-		return EC_ERROR_INVAL;
-	}
-
-
-	CPRINTS("New charge port: p%d", port);
-
-	/*
-	 * Turn off the other ports' sink path FETs, before enabling the
-	 * requested charge port.
-	 */
-	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) {
-		if (i == port)
-			continue;
-
-		if (board_vbus_sink_enable(i, 0))
-			CPRINTS("p%d: sink path disable failed.", i);
-	}
-
-	/* Enable requested charge port. */
-	if (board_vbus_sink_enable(port, 1)) {
-		CPRINTS("p%d: sink path enable failed.", port);
-		return EC_ERROR_UNKNOWN;
-	}
-
-	return EC_SUCCESS;
-}
-
-void board_set_charge_limit(int port, int supplier, int charge_ma,
-			    int max_ma, int charge_mv)
-{
-	/*
-	 * Ignore lower charge ceiling on PD transition if our battery is
-	 * critical, as we may brownout.
-	 */
-	if (supplier == CHARGE_SUPPLIER_PD &&
-	    charge_ma < 1500 &&
-	    charge_get_percent() < CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON) {
-		CPRINTS("Using max ilim %d", max_ma);
-		charge_ma = max_ma;
-	}
-
-	charge_set_input_current_limit(MAX(charge_ma,
-					   CONFIG_CHARGER_INPUT_CURRENT),
-				       charge_mv);
-}
-
-uint16_t tcpc_get_alert_status(void)
-{
-	uint16_t status = 0;
-
-	if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL))
-		if (gpio_get_level(GPIO_USB_C0_PD_RST_L))
-			status |= PD_STATUS_TCPC_ALERT_0;
-	if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL))
-		if (gpio_get_level(GPIO_USB_C1_PD_RST_L))
-			status |= PD_STATUS_TCPC_ALERT_1;
-
-	return status;
-}
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/switchcap.dts b/zephyr/projects/herobrine/herobrine_npcx9/switchcap.dts
deleted file mode 100644
index b246274a7a..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/switchcap.dts
+++ /dev/null
@@ -1,12 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/ {
-	switchcap {
-		compatible = "switchcap-gpio";
-		enable-pin = <&gpio_switchcap_on>;
-		power-good-pin = <&gpio_switchcap_pg>;
-	};
-};
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/zmake.yaml b/zephyr/projects/herobrine/herobrine_npcx9/zmake.yaml
deleted file mode 100644
index 775ab65ead..0000000000
--- a/zephyr/projects/herobrine/herobrine_npcx9/zmake.yaml
+++ /dev/null
@@ -1,17 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-board: herobrine_npcx9
-dts-overlays:
-  - gpio.dts
-  - battery.dts
-  - i2c.dts
-  - motionsense.dts
-  - switchcap.dts
-supported-toolchains:
-  - coreboot-sdk
-  - zephyr
-supported-zephyr-versions:
-  - v2.6
-output-type: npcx