Merge remote-tracking branch cros/main into factory-brya-14909.124.B-main

Generated by: util/update_release_branch.py --baseboard brya --relevant_paths_file
baseboard/brya/relevant-paths.txt factory-brya-14909.124.B-main

Relevant changes:

git log --oneline 19d4d68ffa..aa40b859b3 -- baseboard/brya board/agah
board/anahera board/banshee board/brya board/crota board/felwinter
board/gimble board/kano board/mithrax board/osiris board/primus
board/redrix board/taeko board/taniks board/vell board/volmar
driver/bc12/pi3usb9201_public.* driver/charger/bq25710.*
driver/ppc/nx20p348x.* driver/ppc/syv682x_public.*
driver/retimer/bb_retimer_public.* driver/tcpm/nct38xx.*
driver/tcpm/ps8xxx_public.* driver/tcpm/tcpci.* include/power/alderlake*
include/intel_x86.h power/alderlake* power/intel_x86.c
util/getversion.sh

e6da633c38 driver: Sort header files
234a87ae2d tcpci: Add FRS enable to driver structure
a56be59ccd tcpm_header: add test for tcpm_dump_registers
57b3256963 Rename CONFIG_CHARGER_INPUT_CURRENT to _CHARGER_DEFAULT_CURRENT_LIMIT
e420c8ff9a marasov: Modify TypeC and TypeA configuration.
43b53e0045 Add default implementation of board_set_charge_limit
b75dc90677 Add CONFIG_CHARGER_MIN_INPUT_CURRENT_LIMIT
f1b563c350 baseboard: Sort header files
7d01b1e58d driver/retimer/ps8818.h: Add I2C ADDR FLAGS 0x30, 0x58, 0x70
ec31407993 Add CONFIG_CHARGER_INPUT_CURRENT_DERATE_PCT
8f89f69a5b crota: disable lid angle sensor for clamshell

BRANCH=None
BUG=b:260630630 b:163093572 b:259002141 b:255184961 b:259354679
BUG=b:247100970 b:254328661
TEST=`emerge-brya chromeos-ec`

Force-Relevant-Builds: all
Change-Id: I0ecfa0e6af68631283c7a9e8f1afb9d827176c62
Signed-off-by: YH Lin <yueherngl@google.com>

13 files changed, 0 insertions, 1562 deletions

diff --git a/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt b/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt
deleted file mode 100644
index c6729af776..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-# Copyright 2022 The ChromiumOS Authors
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-zephyr_library_sources("src/mtlrvp.c")
-zephyr_library_sources("src/board_power.c")
diff --git a/zephyr/projects/intelrvp/mtlrvp/ioex.dts b/zephyr/projects/intelrvp/mtlrvp/ioex.dts
deleted file mode 100644
index 7d2f4b5820..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/ioex.dts
+++ /dev/null
@@ -1,71 +0,0 @@
-/* Copyright 2022 The ChromiumOS Authors
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/ {
-	/* IOEX_KBD_GPIO IT8801 */
-	ioex-kbd-gpio {
-		compatible = "cros,ioex-chip";
-		i2c-port = <&i2c_charger>;
-		i2c-addr = <0x39>;
-		drv = "it8801_ioexpander_drv";
-		flags = <0x00>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		ioex_it8801_port0: it8801_port@0 {
-			compatible = "cros,ioex-port";
-			reg = <0>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpios = <8>;
-		};
-
-		ioex_it8801_port1: it8801_port@1 {
-			compatible = "cros,ioex-port";
-			reg = <1>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpios = <8>;
-		};
-	};
-	/* IOEX_C2_CCGXXF */
-	ioex-c2 {
-		compatible = "cros,ioex-chip";
-		i2c-port = <&typec_aic2>;
-		i2c-addr = <0x0B>;
-		drv = "ccgxxf_ioexpander_drv";
-		flags = <0x00>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		ioex_c2_port0: ioex-c2-port@0 {
-			compatible = "cros,ioex-port";
-			reg = <0>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpios = <8>;
-		};
-		ioex_c2_port1: ioex-c2-port@1 {
-			compatible = "cros,ioex-port";
-			reg = <1>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpios = <8>;
-		};
-		ioex_c2_port2: ioex-c2-port@2 {
-			compatible = "cros,ioex-port";
-			reg = <2>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpios = <8>;
-		};
-		ioex_c2_port3: ioex-c2-port@3 {
-			compatible = "cros,ioex-port";
-			reg = <3>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpios = <8>;
-		};
-	};
-};
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts
deleted file mode 100644
index cf85dd3413..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts
+++ /dev/null
@@ -1,36 +0,0 @@
-/* Copyright 2022 The ChromiumOS Authors
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/ {
-	fans {
-		compatible = "cros-ec,fans";
-
-		fan_0 {
-			pwms = <&pwm3 0 PWM_KHZ(30) PWM_POLARITY_NORMAL>;
-			rpm_min = <3200>;
-			rpm_start = <2200>;
-			rpm_max = <6600>;
-			tach = <&tach2>;
-			pgood_gpio = <&all_sys_pwrgd>;
-			enable_gpio = <&gpio_fan_control>;
-		};
-	};
-};
-
-/* Tachemeter for fan speed measurement */
-&tach2 {
-	status = "okay";
-	pinctrl-0 = <&ta2_1_in_gp73>; /* TA2 input on GPIO73 */
-	pinctrl-names = "default";
-	port = <NPCX_TACH_PORT_A>; /* port-A is selected */
-	sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */
-	pulses-per-round = <2>; /* number of pulses per round of encoder */
-};
-
-&pwm3 {
-	status = "okay";
-	pinctrl-0 = <&pwm3_gp80>;
-	pinctrl-names = "default";
-};
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts
deleted file mode 100644
index 77b4cf0573..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts
+++ /dev/null
@@ -1,366 +0,0 @@
-/* Copyright 2022 The ChromiumOS Authors
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/ {
-	aliases {
-		gpio-wp = &gpio_wp;
-	};
-
-	named-gpios {
-		compatible = "named-gpios";
-
-		ioex_kbd_intr_n: ioex-kbd-intr-n {
-			gpios = <&gpio0 0 GPIO_INPUT>;
-			enum-name = "GPIO_KB_DISCRETE_INT";
-		};
-		all_sys_pwrgd: all-sys-pwrgd {
-			gpios = <&gpio7 0 GPIO_INPUT>;
-			enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD";
-		};
-		rsmrst_pwrgd: rsmrst-pwrgd {
-			gpios = <&gpio6 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
-			enum-name = "GPIO_PG_EC_RSMRST_ODL";
-		};
-		pch_slp_s0_n: pch-slp-s0-n-ec {
-			gpios = <&gpioa 1 GPIO_INPUT>;
-			enum-name = "GPIO_PCH_SLP_S0_L"; /* 1.8V */
-		};
-		pm-slp-s3-n-ec {
-			gpios = <&gpiob 0 GPIO_INPUT>; /* 1.8V */
-			enum-name = "GPIO_PCH_SLP_S3_L";
-		};
-		pm-slp-s4-n-ec {
-			gpios = <&gpioa 5 GPIO_INPUT>; /* 1.8V */
-		};
-		volume-up {
-			gpios = <&gpio6 1 (GPIO_INPUT | GPIO_PULL_UP)>;
-			enum-name = "GPIO_VOLUME_UP_L";
-		};
-		vol-dn-ec-r {
-			gpios = <&gpio0 3 (GPIO_INPUT | GPIO_PULL_UP)>;
-			enum-name = "GPIO_VOLUME_DOWN_L";
-		};
-		smc_lid: smc-lid {
-			gpios = <&gpio0 1 (GPIO_INPUT | GPIO_PULL_UP)>;
-			enum-name = "GPIO_LID_OPEN";
-		};
-		smc_onoff_n: smc-onoff-n {
-			gpios = <&gpiod 2 GPIO_INPUT>;
-			enum-name = "GPIO_POWER_BUTTON_L";
-		};
-		gpio_wp: wp-l {
-			gpios = <&gpiod 5 GPIO_INPUT>;
-		};
-		std_adp_prsnt: std-adp-prsnt {
-			gpios = <&gpioc 6 GPIO_INPUT>;
-			enum-name = "GPIO_DC_JACK_PRESENT";
-		};
-		bc_acok: bc-acok-ec {
-			gpios = <&gpio0 2 GPIO_INPUT>;
-			enum-name = "GPIO_AC_PRESENT";
-		};
-		usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 {
-			gpios = <&gpio4 0 GPIO_INPUT>;
-		};
-		/* NOTE: Netname is USBC_TCPC_PPC_ALRT_P0 */
-		usb_c0_c1_tcpc_rst_odl: usb-c0-c1-tcpc-rst-odl {
-			gpios = <&gpiod 0 GPIO_ODR_HIGH>;
-		};
-		/* NOTE: Netname is USBC_TCPC_ALRT_P1 */
-		usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 {
-			gpios = <&gpiod 1 GPIO_INPUT>;
-		};
-		usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 {
-			gpios = <&gpioe 4 GPIO_INPUT>;
-		};
-		usbc_tcpc_alrt_p2: usbc-tcpc-alrt-p2 {
-			gpios = <&gpio9 1 GPIO_INPUT>;
-		};
-		/* NOTE: Netname is USBC_TCPC_PPC_ALRT_P3 */
-		usbc_tcpc_alrt_p3: usbc-tcpc-alrt-p3 {
-			gpios = <&gpiof 3 GPIO_INPUT>;
-		};
-		gpio_ec_pch_wake_odl: pch-wake-n {
-			gpios = <&gpio7 4 GPIO_ODR_HIGH>;
-		};
-		espi-rst-n {
-			gpios = <&gpio5 4 GPIO_INPUT>; /* 1.8V */
-		};
-		plt-rst-l {
-			gpios = <&gpioa 2 GPIO_INPUT>; /* 1.8V */
-		};
-		slate-mode-indication {
-			gpios = <&gpio9 4 GPIO_INPUT>; /* 1.8V */
-		};
-		prochot-ec {
-			gpios = <&gpio6 0 GPIO_INPUT>;
-			enum-name = "GPIO_CPU_PROCHOT";
-		};
-		sys_rst_odl: sys-rst-odl-ec {
-			gpios = <&gpioc 5 GPIO_ODR_HIGH>;
-			enum-name = "GPIO_SYS_RESET_L";
-		};
-		ec_pch_rsmrst_l: pm-rsmrst-r-n {
-			gpios = <&gpioa 4 GPIO_OUTPUT_LOW>; /* 1.8V */
-			enum-name = "GPIO_PCH_RSMRST_L";
-		};
-		pm-pwrbtn-n-ec {
-			gpios = <&gpiod 4 GPIO_ODR_HIGH>;
-			enum-name = "GPIO_PCH_PWRBTN_L";
-		};
-		ec_spi_oe_mecc: ec-spi-oe-mecc-r {
-			gpios = <&gpioa 7 GPIO_OUTPUT_LOW>; /* 1.8V */
-		};
-		en_pp3300_a: ec-ds3-r {
-			gpios = <&gpioc 4 GPIO_OUTPUT_LOW>;
-			enum-name = "GPIO_EN_PP3300_A";
-			alias = "GPIO_TEMP_SENSOR_POWER";
-		};
-		ec_pch_pwrok_od: pch-pwrok-ec-r {
-			gpios = <&gpiod 3 GPIO_ODR_LOW>;
-			enum-name = "GPIO_PCH_PWROK";
-		};
-		sys_pwrok_ec: sys-pwrok-ec {
-			gpios = <&gpiof 5 GPIO_ODR_LOW>;
-			enum-name = "GPIO_PCH_SYS_PWROK";
-		};
-		bat-det-ec {
-			gpios = <&gpio7 6 GPIO_INPUT>;
-			enum-name = "GPIO_BATT_PRES_ODL";
-		};
-		edp-bklt-en {
-			gpios = <&gpioe 1 GPIO_OUTPUT_HIGH>;
-		};
-		/* TODO: move both LEDs to PWM */
-		led-1-l-ec {
-			gpios = <&gpiob 6 GPIO_OUTPUT_HIGH>;
-		};
-		led-2-l-ec {
-			gpios = <&gpiob 7 GPIO_OUTPUT_HIGH>;
-		};
-		gpio_fan_control: therm-sen-mecc-r {
-			gpios = <&gpioc 0 GPIO_OUTPUT_LOW>;
-		};
-		/* NOTE: Netname is USBC_TCPC_ALRT_P3 */
-		ccd_mode_odl: ccd-mode-odl {
-			gpios = <&gpio9 2 GPIO_INPUT>;
-			enum-name = "GPIO_CCD_MODE_ODL";
-		};
-		smb-bs-clk {
-			gpios = <&gpiob 3 GPIO_INPUT>;
-		};
-		smb-bs-data {
-			gpios = <&gpiob 2 GPIO_INPUT>;
-		};
-		usbc-tcpc-i2c-clk-aic1 {
-			gpios = <&gpiob 5 GPIO_INPUT>;
-		};
-		usbc-tcpc-i2c-data-aic1 {
-			gpios = <&gpiob 4 GPIO_INPUT>;
-		};
-		usbc-tcpc-i2c-clk-aic2 {
-			gpios = <&gpio9 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
-		};
-		usbc-tcpc-i2c-data-aic2 {
-			gpios = <&gpio8 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
-		};
-		/* Unused 1.8V pins */
-		i3c-1-sda-r {
-			gpios = <&gpio5 0 GPIO_INPUT>;
-		};
-		i3c-1-scl-r {
-			gpios = <&gpio5 6 GPIO_INPUT>;
-		};
-		espi-alert0-n-r {
-			gpios = <&gpio5 7 GPIO_INPUT>;
-		};
-		tp-gpio95 {
-			gpios = <&gpio9 5 GPIO_INPUT>;
-		};
-		cpu-c10-gate {
-			gpios = <&gpio9 6 GPIO_INPUT>;
-		};
-		slp-s0-cs-n-ec {
-			gpios = <&gpio9 7 GPIO_INPUT>;
-		};
-		rtc-rst-n-r {
-			gpios = <&gpioa 0 GPIO_INPUT>;
-		};
-		tp-gpioa6 {
-			gpios = <&gpioa 6 GPIO_INPUT>;
-		};
-		sml1-clk-mecc {
-			gpios = <&gpio3 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
-		};
-		sml1-data-mecc {
-			gpios = <&gpio3 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
-		};
-		sml1-alert {
-			gpios = <&gpioc 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
-		};
-		smb-pch-alrt {
-			gpios = <&gpioa 3 GPIO_INPUT>;
-		};
-		smb-pch-data {
-			gpios = <&gpioc 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
-		};
-		smb-pch-clk {
-			gpios = <&gpioc 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
-		};
-		/* Unused 3.3V pins */
-		cpu-cat-err-mecc {
-			gpios = <&gpio3 4 GPIO_INPUT>;
-		};
-		tp-gpio37 {
-			gpios = <&gpio3 7 GPIO_INPUT>;
-		};
-		tp-vccpdsw-3p3-ec {
-			gpios = <&gpio4 5 GPIO_INPUT>;
-		};
-		mech-pwr-btn-in-odl {
-			gpios = <&gpio6 2 GPIO_INPUT>;
-		};
-		tp-gpio63 {
-			gpios = <&gpio6 3 GPIO_INPUT>;
-		};
-		tp-gpio67 {
-			gpios = <&gpio6 7 GPIO_INPUT>;
-		};
-		tp-gpio72 {
-			gpios = <&gpio7 2 GPIO_INPUT>;
-		};
-		tp-gpio75 {
-			gpios = <&gpio7 5 GPIO_INPUT>;
-		};
-		ec-peci-ec {
-			gpios = <&gpio8 1 GPIO_INPUT>;
-		};
-		tp-gpiob1 {
-			gpios = <&gpiob 1 GPIO_INPUT>;
-		};
-		std-adpt-cntrl-GPIO_r {
-			gpios = <&gpioc 3 GPIO_INPUT>;
-		};
-		ec-packet-mode-ec {
-			gpios = <&gpioe 2 GPIO_INPUT>;
-		};
-		tp-gpioe3 {
-			gpios = <&gpioe 3 GPIO_INPUT>;
-		};
-		boot-stall-r {
-			gpios = <&gpioe 5 GPIO_INPUT>;
-		};
-		tp-gpiof0 {
-			gpios = <&gpiof 0 GPIO_INPUT>;
-		};
-		tp-gpiof1 {
-			gpios = <&gpiof 1 GPIO_INPUT>;
-		};
-		usbc_tcpc_ppc_alrt_p2: usbc-tcpc-ppc-alrt-p2 {
-			gpios = <&gpiof 2 GPIO_INPUT>;
-		};
-		tp-gpiof4 {
-			gpios = <&gpiof 4 GPIO_INPUT>;
-		};
-
-		/* KBD IOEX configuration */
-		srtc-rst {
-			gpios = <&ioex_it8801_port0 3 GPIO_OUTPUT_LOW>;
-		};
-		ec-h1-packet-mode {
-			gpios = <&ioex_it8801_port0 4 GPIO_OUTPUT_LOW>;
-			enum-name = "GPIO_PACKET_MODE_EN";
-		};
-		rtc-rst {
-			gpios = <&ioex_it8801_port0 6 GPIO_OUTPUT_LOW>;
-		};
-		ec-entering-rw {
-			gpios = <&ioex_it8801_port0 7 GPIO_OUTPUT_LOW>;
-			enum-name = "GPIO_ENTERING_RW";
-		};
-		ioex-sys-rst-odl-ec {
-			gpios = <&ioex_it8801_port1 0 GPIO_INPUT>;
-		};
-		ioex-slate-mode-indication {
-			gpios = <&ioex_it8801_port1 2 GPIO_INPUT>;
-		};
-
-		/* USB C IOEX configuration */
-		usb_c0_hb_retimer_ls_en: usb-c0-hbr-ls-en {
-			gpios = <&ioex_c0 2 GPIO_OUTPUT_LOW>;
-			enum-name = "IOEX_USB_C0_HBR_LS_EN";
-			no-auto-init;
-		};
-		usb_c0_hb_retimer_rst: usb-c0-hbr-rst {
-			gpios = <&ioex_c0 3 GPIO_OUTPUT_LOW>;
-			enum-name = "IOEX_USB_C0_HBR_RST";
-			no-auto-init;
-		};
-		usb_c1_hb_retimer_ls_en: usb-c1-hbr-ls-en {
-			gpios = <&ioex_c1 2 GPIO_OUTPUT_LOW>;
-			enum-name = "IOEX_USB_C1_HBR_LS_EN";
-			no-auto-init;
-		};
-		usb_c1_hb_retimer_rst: usb-c1-hbr-rst {
-			gpios = <&ioex_c1 3 GPIO_OUTPUT_LOW>;
-			enum-name = "IOEX_USB_C1_HBR_RST";
-			no-auto-init;
-		};
-		usb-c0-mux-oe-n {
-			gpios = <&ioex_c0 4 GPIO_OUTPUT_LOW>;
-			no-auto-init;
-		};
-		usb-c0-mux-sbu-sel-0 {
-			gpios = <&ioex_c0 6 GPIO_OUTPUT_HIGH>;
-			enum-name = "IOEX_USB_C0_MUX_SBU_SEL_0";
-			no-auto-init;
-		};
-		usb-c0-mux-sbu-sel-1 {
-			gpios = <&ioex_c1 4 GPIO_OUTPUT_LOW>;
-			enum-name = "IOEX_USB_C0_MUX_SBU_SEL_1";
-			no-auto-init;
-		};
-		usb-c0-c1-prochot-n {
-			gpios = <&ioex_c1 6 GPIO_INPUT>;
-			no-auto-init;
-		};
-		dg-bssb-sbu-sel {
-			gpios = <&ioex_c2_port1 4 GPIO_INPUT>;
-			no-auto-init;
-		};
-		usb_c2_hb_retimer_rst: usb-c2-hbr-rst {
-			gpios = <&ioex_c2_port1 1 (GPIO_ODR_LOW | \
-				GPIO_VOLTAGE_1P8)>;
-			enum-name = "IOEX_USB_C2_HBR_RST";
-			no-auto-init;
-		};
-		usb_c2_hb_retimer_ls_en: usb-c2-hbr-ls-en {
-			gpios = <&ioex_c2_port2 0 (GPIO_ODR_LOW | \
-				GPIO_VOLTAGE_1P8)>;
-			enum-name = "IOEX_USB_C2_HBR_LS_EN";
-			no-auto-init;
-		};
-		usb_c3_hb_retimer_rst: usb-c3-hbr-rst {
-			gpios = <&ioex_c2_port1 3 (GPIO_ODR_LOW | \
-				GPIO_VOLTAGE_1P8)>;
-			enum-name = "IOEX_USB_C3_HBR_RST";
-			no-auto-init;
-		};
-		usb_c3_hb_retimer_ls_en: usb-c3-hbr-ls-en {
-			gpios = <&ioex_c2_port3 3 (GPIO_ODR_LOW | \
-				GPIO_VOLTAGE_1P8)>;
-			enum-name = "IOEX_USB_C3_HBR_LS_EN";
-			no-auto-init;
-		};
-		usb-c2-c3-prochot-n {
-			gpios = <&ioex_c2_port0 0 GPIO_INPUT>;
-			no-auto-init;
-		};
-		/* unimplemented GPIOs */
-		en-pp5000 {
-			enum-name = "GPIO_EN_PP5000";
-		};
-	};
-};
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts
deleted file mode 100644
index b120f6c05e..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts
+++ /dev/null
@@ -1,60 +0,0 @@
-/* Copyright 2022 The ChromiumOS Authors
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-/ {
-	gpio-interrupts {
-		compatible = "cros-ec,gpio-interrupts";
-
-		int_lid_open: lid_open {
-			irq-pin = <&smc_lid>;
-			flags = <GPIO_INT_EDGE_BOTH>;
-			handler = "lid_interrupt";
-		};
-		int_power_button: power_button {
-			irq-pin = <&smc_onoff_n>;
-			flags = <GPIO_INT_EDGE_BOTH>;
-			handler = "power_button_interrupt";
-		};
-		int_ac_present: ac_present {
-			irq-pin = <&bc_acok>;
-			flags = <GPIO_INT_EDGE_BOTH>;
-			handler = "extpower_interrupt";
-		};
-		int_ioex_kbd_intr_n: ioex_kbd_intr_n {
-			irq-pin = <&ioex_kbd_intr_n>;
-			flags = <GPIO_INT_EDGE_FALLING>;
-			handler = "io_expander_it8801_interrupt";
-		};
-		int_usb_c0_c1_tcpc: usb_c0_tcpc {
-			irq-pin = <&usbc_tcpc_alrt_p0>;
-			flags = <GPIO_INT_EDGE_FALLING>;
-			handler = "tcpc_alert_event";
-		};
-		int_usb_c0_ppc: usb_c0_ppc {
-			irq-pin = <&usbc_tcpc_ppc_alrt_p0>;
-			flags = <GPIO_INT_EDGE_FALLING>;
-			handler = "ppc_interrupt";
-		};
-		int_usb_c1_ppc: usb_c1_ppc {
-			irq-pin = <&usbc_tcpc_ppc_alrt_p1>;
-			flags = <GPIO_INT_EDGE_FALLING>;
-			handler = "ppc_interrupt";
-		};
-		int_usb_c2_tcpc: usb_c2_tcpc {
-			irq-pin = <&usbc_tcpc_alrt_p2>;
-			flags = <GPIO_INT_EDGE_FALLING>;
-			handler = "tcpc_alert_event";
-		};
-		int_usb_c3_tcpc: usb_c3_tcpc {
-			irq-pin = <&usbc_tcpc_alrt_p3>;
-			flags = <GPIO_INT_EDGE_FALLING>;
-			handler = "tcpc_alert_event";
-		};
-		int_ccd_mode: ccd_mode {
-			irq-pin = <&ccd_mode_odl>;
-			flags = <GPIO_INT_EDGE_BOTH>;
-			handler = "board_connect_c0_sbu";
-		};
-	};
-};
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/keyboard.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/keyboard.dts
deleted file mode 100644
index 81d6e82f48..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/keyboard.dts
+++ /dev/null
@@ -1,59 +0,0 @@
-/* Copyright 2022 The ChromiumOS Authors
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/ {
-	cros-keyscan {
-		compatible = "cros-keyscan";
-
-		output-settle = <35>;
-		debounce-down = <5000>;
-		debounce-up = <40000>;
-		poll-timeout = <100000>;
-
-		actual-key-mask = <
-			0x14	/* C0 */
-			0xff	/* C1 */
-			0xff	/* C2 */
-			0xff	/* C3 */
-			0xff	/* C4 */
-			0xf5	/* C5 */
-			0xff	/* C6 */
-			0xa4	/* C7 */
-			0xff	/* C8 */
-			0xfe	/* C9 */
-			0x55	/* C10 */
-			0xfa	/* C11 */
-			0xca	/* C12 */
-			>;
-	};
-};
-
-&cros_kb_raw {
-	status = "okay";
-	/* No KSO2 (it's inverted and implemented by GPIO) */
-	pinctrl-0 = <
-		&ksi0_gp31
-		&ksi1_gp30
-		&ksi2_gp27
-		&ksi3_gp26
-		&ksi4_gp25
-		&ksi5_gp24
-		&ksi6_gp23
-		&ksi7_gp22
-		&kso00_gp21
-		&kso01_gp20
-		&kso03_gp16
-		&kso04_gp15
-		&kso05_gp14
-		&kso06_gp13
-		&kso07_gp12
-		&kso08_gp11
-		&kso09_gp10
-		&kso10_gp07
-		&kso11_gp06
-		&kso12_gp05
-	>;
-	pinctrl-names = "default";
-};
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts
deleted file mode 100644
index 86a46e3e7a..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts
+++ /dev/null
@@ -1,273 +0,0 @@
-/* Copyright 2022 The ChromiumOS Authors
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
- #include <dt-bindings/usb_pd_tcpm.h>
-
-/ {
-	chosen {
-		cros,rtc = &mtc;
-	};
-
-	hibernate-wake-pins {
-		compatible = "cros-ec,hibernate-wake-pins";
-		wakeup-irqs = <
-			&int_ac_present
-			&int_lid_open
-			&int_power_button
-		>;
-	};
-
-	named-i2c-ports {
-		compatible = "named-i2c-ports";
-
-		i2c_charger: charger {
-			i2c-port = <&i2c7_0>;
-			enum-names = "I2C_PORT_CHARGER",
-				"I2C_PORT_BATTERY",
-				"I2C_PORT_EEPROM",
-				"I2C_PORT_KB_DISCRETE",
-				"I2C_PORT_PORT80";
-		};
-		typec_aic1: typec-aic1{
-			i2c-port = <&i2c0_0>;
-			enum-names = "I2C_PORT_TYPEC_AIC_1";
-		};
-		typec_aic2: typec-aic2{
-			i2c-port = <&i2c1_0>;
-			enum-names = "I2C_PORT_TYPEC_AIC_2";
-		};
-	};
-
-	named-adc-channels {
-		compatible = "named-adc-channels";
-
-		adc_ambient: ambient {
-			enum-name = "ADC_TEMP_SENSOR_1";
-			io-channels = <&adc0 3>;
-		};
-		adc_ddr: ddr {
-			enum-name = "ADC_TEMP_SENSOR_2";
-			io-channels = <&adc0 4>;
-		};
-		adc_skin: skin {
-			enum-name = "ADC_TEMP_SENSOR_3";
-			io-channels = <&adc0 2>;
-		};
-		adc_vr: vr {
-			enum-name = "ADC_TEMP_SENSOR_4";
-			io-channels = <&adc0 1>;
-		};
-	};
-};
-
-/* charger */
-&i2c7_0 {
-	label = "I2C_CHARGER";
-	status = "okay";
-	clock-frequency = <I2C_BITRATE_STANDARD>;
-	pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>;
-	pinctrl-names = "default";
-
-	pca95xx: pca95xx@22 {
-		compatible = "nxp,pca95xx";
-		label = "PCA95XX";
-		reg = <0x22>;
-		gpio-controller;
-		#gpio-cells = <2>;
-		ngpios = <16>;
-	};
-
-	rvp_board_id: rvp-board-id {
-		compatible = "intel,rvp-board-id";
-
-		/*
-		 * BOM ID [2]   : IOEX[0]
-		 * BOM ID [1:0] : IOEX[15:14]
-		 */
-		bom-gpios = <&pca95xx 0 0>, <&pca95xx 15 0>, <&pca95xx 14 0>;
-
-		/*
-		 * FAB ID [1:0] : IOEX[2:1]
-		 */
-		fab-gpios = <&pca95xx 2 0>, <&pca95xx 1 0>;
-
-		/*
-		 * BOARD ID[5:0] : IOEX[13:8]
-		 */
-		board-gpios = <&pca95xx 13 0>, <&pca95xx 12 0>, <&pca95xx 11 0>,
-			      <&pca95xx 10 0>, <&pca95xx 9 0>, <&pca95xx 8 0>;
-	};
-
-	kb_discrete: ite-it8801@39 {
-		compatible = "ite,it8801";
-		reg = <0x39>;
-	};
-
-	seven_seg_display: max695x-seven-seg-display@38 {
-		compatible = "maxim,seven-seg-display";
-		reg = <0x38>;
-		label = "MAX695X_SEVEN_SEG_DISPLAY";
-	};
-
-	charger: isl9241@9 {
-		compatible = "intersil,isl9241";
-		status = "okay";
-		reg = <0x9>;
-	};
-
-	cbi_eeprom: eeprom@50 {
-		compatible = "atmel,at24";
-		reg = <0x50>;
-		size = <2048>;
-		pagesize = <16>;
-		address-width = <8>;
-		timeout = <5>;
-	};
-};
-
-/* host interface */
-&espi0 {
-	status = "okay";
-	pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>;
-	pinctrl-names = "default";
-};
-
-&i2c_ctrl7 {
-	status = "okay";
-};
-
-/* typec_aic1 */
-&i2c0_0 {
-	label = "I2C_USB_C0_C1_TCPC";
-	status = "okay";
-	clock-frequency = <I2C_BITRATE_FAST>;
-	pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>;
-	pinctrl-names = "default";
-
-	tcpc_port0: nct38xx@73 {
-		compatible = "nuvoton,nct38xx";
-		reg = <0x73>;
-		gpio-dev = <&nct38xx_c0>;
-		tcpc-flags = <(
-			TCPC_FLAGS_TCPCI_REV2_0 |
-			TCPC_FLAGS_NO_DEBUG_ACC_CONTROL)>;
-	};
-
-	nct38xx_c0: nct38xx_c0@73 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nuvoton,nct38xx-gpio";
-		reg = <0x73>;
-		label = "NCT38XX_C0";
-
-		ioex_c0:gpio@0 {
-			compatible = "nuvoton,nct38xx-gpio-port";
-			reg = <0x0>;
-			label = "NCT38XX_C0_GPIO0";
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpios = <8>;
-			pin_mask = <0xdc>;
-			pinmux_mask = <0xff>;
-		};
-	};
-
-	tcpc_port1: nct38xx@77 {
-		compatible = "nuvoton,nct38xx";
-		reg = <0x77>;
-		gpio-dev = <&nct38xx_c1>;
-		tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>;
-	};
-
-	nct38xx_c1: nct38xx_c1@77 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nuvoton,nct38xx-gpio";
-		reg = <0x77>;
-		label = "NCT38XX_C1";
-
-		ioex_c1:gpio@0 {
-			compatible = "nuvoton,nct38xx-gpio-port";
-			reg = <0x0>;
-			label = "NCT38XX_C1_GPIO0";
-			gpio-controller;
-			#gpio-cells = <2>;
-			ngpios = <8>;
-			pin_mask = <0xdc>;
-			pinmux_mask = <0xff>;
-		};
-	};
-
-	nct38xx_alert_0 {
-		compatible = "nuvoton,nct38xx-gpio-alert";
-		irq-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
-		nct38xx-dev = <&nct38xx_c0 &nct38xx_c1>;
-		label = "NCT38XX_ALERT_1";
-	};
-
-	usb_c0_hb_retimer: jhl8040r-c0@56 {
-		compatible = "intel,jhl8040r";
-		reg = <0x56>;
-		reset-pin = <&usb_c0_hb_retimer_rst>;
-		ls-en-pin = <&usb_c0_hb_retimer_ls_en>;
-	};
-
-	usb_c1_hb_retimer: jhl8040r-c1@57 {
-		compatible = "intel,jhl8040r";
-		reg = <0x57>;
-		reset-pin = <&usb_c1_hb_retimer_rst>;
-		ls-en-pin = <&usb_c1_hb_retimer_ls_en>;
-	};
-};
-
-&i2c_ctrl0 {
-	status = "okay";
-};
-
-/* typec_aic2 */
-&i2c1_0 {
-	label = "I2C_USB_C2_C3_TCPC";
-	status = "okay";
-	clock-frequency = <I2C_BITRATE_FAST>;
-	pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>;
-	pinctrl-names = "default";
-
-	tcpc_port2: ccgxxf@b {
-		compatible = "cypress,ccgxxf";
-		reg = <0xb>;
-	};
-
-	tcpc_port3: ccgxxf@1b {
-		compatible = "cypress,ccgxxf";
-		reg = <0x1b>;
-	};
-
-	usb_c2_hb_retimer: jhl8040r-c2@58 {
-		compatible = "intel,jhl8040r";
-		reg = <0x58>;
-		reset-pin = <&usb_c2_hb_retimer_rst>;
-		ls-en-pin = <&usb_c2_hb_retimer_ls_en>;
-	};
-
-	usb_c3_hb_retimer: jhl8040r-c3@59 {
-		compatible = "intel,jhl8040r";
-		reg = <0x59>;
-		reset-pin = <&usb_c3_hb_retimer_rst>;
-		ls-en-pin = <&usb_c3_hb_retimer_ls_en>;
-	};
-};
-
-&i2c_ctrl1 {
-	status = "okay";
-};
-
-&adc0 {
-	status = "okay";
-	pinctrl-0 = <&adc0_chan1_gp44
-		     &adc0_chan2_gp43
-		     &adc0_chan3_gp42
-		     &adc0_chan4_gp41>;
-	pinctrl-names = "default";
-};
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts
deleted file mode 100644
index 3c270d296f..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts
+++ /dev/null
@@ -1,125 +0,0 @@
-/* Copyright 2022 The ChromiumOS Authors
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/ {
-	chosen {
-		intel-ap-pwrseq,espi = &espi0;
-	};
-
-	common-pwrseq {
-		compatible = "intel,ap-pwrseq";
-
-		sys-pwrok-delay = <3>;
-		all-sys-pwrgd-timeout = <20>;
-		sys-reset-delay = <60>;
-	};
-
-	pwr-en-pp3300-s5 {
-		compatible = "intel,ap-pwrseq-gpio";
-		dbg-label = "PP3300_S5 enable output to LS";
-		enum-name = "PWR_EN_PP3300_A";
-		gpios = <&gpioc 4 0>;
-		output;
-	};
-	pwr-pg-ec-rsmrst-od {
-		compatible = "intel,ap-pwrseq-gpio";
-		dbg-label = "RSMRST power good from regulator";
-		enum-name = "PWR_RSMRST";
-		gpios = <&gpio6 6 0>;
-		interrupt-flags = <GPIO_INT_EDGE_BOTH>;
-	};
-	pwr-ec-pch-rsmrst-odl {
-		compatible = "intel,ap-pwrseq-gpio";
-		dbg-label = "RSMRST output to PCH";
-		enum-name = "PWR_EC_PCH_RSMRST";
-		gpios = <&gpioa 4 0>;
-		output;
-	};
-	pwr-slp-s0-l {
-		compatible = "intel,ap-pwrseq-gpio";
-		dbg-label = "SLP_S0_L input from PCH";
-		enum-name = "PWR_SLP_S0";
-		gpios = <&gpioa 1 GPIO_ACTIVE_LOW>;
-		interrupt-flags = <GPIO_INT_EDGE_BOTH>;
-	};
-	pwr-pch-pwrok {
-		compatible = "intel,ap-pwrseq-gpio";
-		dbg-label = "PCH_PWROK output to PCH";
-		enum-name = "PWR_PCH_PWROK";
-		gpios = <&gpiod 3 GPIO_OPEN_DRAIN>;
-		output;
-	};
-	pwr-ec-pch-sys-pwrok {
-		compatible = "intel,ap-pwrseq-gpio";
-		dbg-label = "SYS_PWROK output to PCH";
-		enum-name = "PWR_EC_PCH_SYS_PWROK";
-		gpios = <&gpiof 5 GPIO_OPEN_DRAIN>;
-		output;
-	};
-	pwr-sys-rst-l {
-		compatible = "intel,ap-pwrseq-gpio";
-		dbg-label = "SYS_RESET# output to PCH";
-		enum-name = "PWR_SYS_RST";
-		gpios = <&gpioc 5 (GPIO_ACTIVE_LOW|GPIO_OPEN_DRAIN)>;
-		output;
-	};
-	pwr-slp-s3 {
-		compatible = "intel,ap-pwrseq-vw";
-		dbg-label = "SLP_S3 virtual wire input from PCH";
-		enum-name = "PWR_SLP_S3";
-		virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S3";
-		vw-invert;
-	};
-	pwr-slp-s4 {
-		compatible = "intel,ap-pwrseq-vw";
-		dbg-label = "SLP_S4 virtual wire input from PCH";
-		enum-name = "PWR_SLP_S4";
-		virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S4";
-		vw-invert;
-	};
-	pwr-slp-s5 {
-		compatible = "intel,ap-pwrseq-vw";
-		dbg-label = "SLP_S5 virtual wire input from PCH";
-		enum-name = "PWR_SLP_S5";
-		virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S5";
-		vw-invert;
-	};
-	pwr-all-sys-pwrgd {
-		compatible = "intel,ap-pwrseq-gpio";
-		dbg-label = "all power good";
-		enum-name = "PWR_ALL_SYS_PWRGD";
-		gpios = <&gpio7 0 0>;
-		interrupt-flags = <GPIO_INT_EDGE_BOTH>;
-	};
-};
-
-/*
- * Because the power signals directly reference the GPIOs,
- * the correspinding named-gpios need to have no-auto-init set.
- */
-&en_pp3300_a {
-	no-auto-init;
-};
-&rsmrst_pwrgd {
-	no-auto-init;
-};
-&ec_pch_rsmrst_l {
-	no-auto-init;
-};
-&pch_slp_s0_n {
-	no-auto-init;
-};
-&ec_pch_pwrok_od {
-	no-auto-init;
-};
-&sys_pwrok_ec {
-	no-auto-init;
-};
-&sys_rst_odl {
-	no-auto-init;
-};
-&all_sys_pwrgd {
-	no-auto-init;
-};
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf
deleted file mode 100644
index 45b101a7ac..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf
+++ /dev/null
@@ -1,18 +0,0 @@
-# Copyright 2022 The ChromiumOS Authors
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-CONFIG_BOARD_MTLRVP_NPCX=y
-CONFIG_CROS_FLASH_NPCX=y
-CONFIG_CROS_SYSTEM_NPCX=y
-CONFIG_SYSCON=y
-
-# PWM
-CONFIG_PWM=y
-CONFIG_PWM_SHELL=n
-
-# Fan
-CONFIG_TACH_NPCX=y
-
-#RTC
-CONFIG_PLATFORM_EC_RTC=y
diff --git a/zephyr/projects/intelrvp/mtlrvp/prj.conf b/zephyr/projects/intelrvp/mtlrvp/prj.conf
deleted file mode 100644
index 1a521d4c89..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/prj.conf
+++ /dev/null
@@ -1,80 +0,0 @@
-# Copyright 2022 The ChromiumOS Authors
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-# Power Sequencing
-CONFIG_AP_X86_INTEL_MTL=y
-CONFIG_X86_NON_DSX_PWRSEQ_MTL=y
-CONFIG_PLATFORM_EC_POWERSEQ_SLP_S3_L_OVERRIDE=n
-CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n
-
-# Battery
-CONFIG_PLATFORM_EC_BATTERY_TYPE_NO_AUTO_DETECT=y
-CONFIG_PLATFORM_EC_BATTERY_V2=y
-
-# CBI
-CONFIG_EEPROM=y
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_SHELL=n
-CONFIG_PLATFORM_EC_CBI_EEPROM=y
-CONFIG_PLATFORM_EC_BYPASS_CBI_EEPROM_WP_CHECK=y
-CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y
-
-# Disable BC1.2
-CONFIG_PLATFORM_EC_USB_CHARGER=n
-
-# Charger
-CONFIG_PLATFORM_EC_CHARGER=y
-CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y
-CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=5
-CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=10
-CONFIG_PLATFORM_EC_CHARGE_RAMP_HW=n
-CONFIG_PLATFORM_EC_CHARGER_ISL9241=y
-CONFIG_PLATFORM_EC_DEDICATED_CHARGE_PORT=y
-
-# IOEX
-CONFIG_PLATFORM_EC_IOEX_CROS_DRV=y
-CONFIG_PLATFORM_EC_IOEX_CCGXXF=y
-CONFIG_GPIO_PCA95XX=y
-CONFIG_GPIO_NCT38XX=y
-CONFIG_PLATFORM_EC_IOEX_IT8801=y
-
-#Keyboard from I/O expander
-CONFIG_PLATFORM_EC_KEYBOARD_DISCRETE=y
-CONFIG_CROS_KB_RAW_NPCX=n
-
-# Temperature sensors
-CONFIG_PLATFORM_EC_TEMP_SENSOR=y
-CONFIG_PLATFORM_EC_THERMISTOR=y
-CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=y
-
-# USB CONFIG
-CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y
-CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y
-CONFIG_PLATFORM_EC_USB_MUX_TASK=y
-CONFIG_PLATFORM_EC_USBC_PPC_SN5S330=y
-CONFIG_PLATFORM_EC_USBC_PPC=y
-CONFIG_PLATFORM_EC_USB_PD_PPC=y
-CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC=y
-CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y
-CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y
-CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_TCPC=y
-CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y
-CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y
-CONFIG_PLATFORM_EC_USB_PD_TCPM_CCGXXF=y
-CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX=y
-CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX=y
-CONFIG_PLATFORM_EC_USB_PD_TRY_SRC=y
-CONFIG_PLATFORM_EC_USB_PD_TCPM_SBU=y
-CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE=y
-CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_HB=y
-CONFIG_PLATFORM_EC_USBC_VCONN=y
-CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=y
-CONFIG_PLATFORM_EC_USB_PD_USB32_DRD=y
-CONFIG_PLATFORM_EC_USB_PD_USB4=y
-CONFIG_PLATFORM_EC_USB_PD_INT_SHARED=y
-CONFIG_PLATFORM_EC_USB_PD_PORT_0_SHARED=y
-CONFIG_PLATFORM_EC_USB_PD_PORT_1_SHARED=y
-
-# 7-Segment Display
-CONFIG_PLATFORM_EC_MAX695X_SEVEN_SEGMENT_DISPLAY=y
diff --git a/zephyr/projects/intelrvp/mtlrvp/src/board_power.c b/zephyr/projects/intelrvp/mtlrvp/src/board_power.c
deleted file mode 100644
index 301402bf0f..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/src/board_power.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* Copyright 2022 The ChromiumOS Authors
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include <zephyr/sys/atomic.h>
-#include <zephyr/logging/log.h>
-#include <zephyr/drivers/gpio.h>
-
-#include <ap_power/ap_power.h>
-#include <ap_power/ap_power_events.h>
-#include <ap_power/ap_power_interface.h>
-#include <ap_power_override_functions.h>
-#include <power_signals.h>
-#include <x86_power_signals.h>
-
-#include "gpio_signal.h"
-#include "gpio/gpio.h"
-
-LOG_MODULE_DECLARE(ap_pwrseq, LOG_LEVEL_INF);
-
-#if CONFIG_X86_NON_DSX_PWRSEQ_MTL
-#define X86_NON_DSX_MTL_FORCE_SHUTDOWN_TO_MS 50
-
-void board_ap_power_force_shutdown(void)
-{
-	int timeout_ms = X86_NON_DSX_MTL_FORCE_SHUTDOWN_TO_MS;
-
-	/* Turn off PCH_RMSRST to meet tPCH12 */
-	power_signal_set(PWR_EC_PCH_RSMRST, 0);
-
-	/* Turn off PRIM load switch. */
-	power_signal_set(PWR_EN_PP3300_A, 0);
-
-	/* Wait RSMRST to be off. */
-	while (power_signal_get(PWR_RSMRST) && (timeout_ms > 0)) {
-		k_msleep(1);
-		timeout_ms--;
-	};
-
-	if (power_signal_get(PWR_RSMRST))
-		LOG_WRN("RSMRST_ODL didn't go low!  Assuming G3.");
-}
-
-void board_ap_power_action_g3_s5(void)
-{
-	/* Turn on the PP3300_PRIM rail. */
-	power_signal_set(PWR_EN_PP3300_A, 1);
-
-	if (!power_wait_signals_timeout(
-		    IN_PGOOD_ALL_CORE,
-		    AP_PWRSEQ_DT_VALUE(wait_signal_timeout))) {
-		ap_power_ev_send_callbacks(AP_POWER_PRE_INIT);
-	}
-}
-
-bool board_ap_power_check_power_rails_enabled(void)
-{
-	return power_signal_get(PWR_EN_PP3300_A);
-}
-#endif /* CONFIG_X86_NON_DSX_PWRSEQ_MTL */
diff --git a/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c b/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c
deleted file mode 100644
index 9d96a08712..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c
+++ /dev/null
@@ -1,331 +0,0 @@
-/* Copyright 2022 The ChromiumOS Authors
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "battery.h"
-#include "battery_fuel_gauge.h"
-#include "charger.h"
-#include "common.h"
-#include "console.h"
-#include "driver/retimer/bb_retimer_public.h"
-#include "driver/tcpm/ccgxxf.h"
-#include "driver/tcpm/nct38xx.h"
-#include "driver/tcpm/tcpci.h"
-#include "extpower.h"
-#include "gpio.h"
-#include "gpio/gpio_int.h"
-#include "hooks.h"
-#include "i2c.h"
-#include "intelrvp.h"
-#include "intel_rvp_board_id.h"
-#include "ioexpander.h"
-#include "isl9241.h"
-#include "keyboard_raw.h"
-#include "power/meteorlake.h"
-#include "sn5s330.h"
-#include "system.h"
-#include "task.h"
-#include "tusb1064.h"
-#include "usb_mux.h"
-#include "usbc_ppc.h"
-#include "util.h"
-
-#define CPRINTF(format, args...) cprintf(CC_COMMAND, format, ##args)
-#define CPRINTS(format, args...) cprints(CC_COMMAND, format, ##args)
-
-/*******************************************************************/
-/* USB-C Configuration Start */
-
-/* PPC */
-#define I2C_ADDR_SN5S330_P0 0x40
-#define I2C_ADDR_SN5S330_P1 0x41
-
-/* IOEX ports */
-enum ioex_port {
-	IOEX_KBD = 0,
-#if defined(HAS_TASK_PD_C2)
-	IOEX_C2_CCGXXF,
-#endif
-	IOEX_COUNT
-};
-
-/* USB-C ports */
-enum usbc_port {
-	USBC_PORT_C0 = 0,
-	USBC_PORT_C1,
-#if defined(HAS_TASK_PD_C2)
-	USBC_PORT_C2,
-	USBC_PORT_C3,
-#endif
-	USBC_PORT_COUNT
-};
-BUILD_ASSERT(USBC_PORT_COUNT == CONFIG_USB_PD_PORT_MAX_COUNT);
-
-/* USB-C PPC configuration */
-struct ppc_config_t ppc_chips[] = {
-	[USBC_PORT_C0] = {
-		.i2c_port = I2C_PORT_TYPEC_AIC_1,
-		.i2c_addr_flags = I2C_ADDR_SN5S330_P0,
-		.drv = &sn5s330_drv,
-	},
-	[USBC_PORT_C1] = {
-		.i2c_port = I2C_PORT_TYPEC_AIC_1,
-		.i2c_addr_flags = I2C_ADDR_SN5S330_P1,
-		.drv = &sn5s330_drv,
-	},
-};
-unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
-
-/* TCPC AIC GPIO Configuration */
-const struct tcpc_aic_gpio_config_t tcpc_aic_gpios[] = {
-	[USBC_PORT_C0] = {
-		.tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p0)),
-		.ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p0)),
-		.ppc_intr_handler = sn5s330_interrupt,
-	},
-	[USBC_PORT_C1] = {
-		.tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p0)),
-		.ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p1)),
-		.ppc_intr_handler = sn5s330_interrupt,
-	},
-#if defined(HAS_TASK_PD_C2)
-	[USBC_PORT_C2] = {
-		.tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p2)),
-		/* No PPC alert for CCGXXF */
-	},
-	[USBC_PORT_C3] = {
-		.tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p3)),
-		/* No PPC alert for CCGXXF */
-	},
-#endif
-};
-BUILD_ASSERT(ARRAY_SIZE(tcpc_aic_gpios) == CONFIG_USB_PD_PORT_MAX_COUNT);
-
-static void board_connect_c0_sbu_deferred(void)
-{
-	enum pd_power_role prole;
-
-	if (gpio_get_level(GPIO_CCD_MODE_ODL)) {
-		CPRINTS("Default AUX line connected");
-		/* Default set the SBU lines to AUX mode */
-		ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_1, 0);
-		ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_0, 1);
-	} else {
-		prole = pd_get_power_role(USBC_PORT_C0);
-		CPRINTS("%s debug device is attached",
-			prole == PD_ROLE_SINK ? "Servo V4C/SuzyQ" : "Intel");
-
-		if (prole == PD_ROLE_SINK) {
-			/* Set the SBU lines to Google CCD mode */
-			ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_1, 1);
-			ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_0, 1);
-		} else {
-			/* Set the SBU lines to Intel CCD mode */
-			ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_1, 0);
-			ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_0, 0);
-		}
-	}
-}
-DECLARE_DEFERRED(board_connect_c0_sbu_deferred);
-
-void board_overcurrent_event(int port, int is_overcurrented)
-{
-	/*
-	 * TODO: Meteorlake PCH does not use Physical GPIO for over current
-	 * error, hence Send 'Over Current Virtual Wire' eSPI signal.
-	 */
-}
-
-void board_reset_pd_mcu(void)
-{
-	/* Reset NCT38XX TCPC */
-	gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(usb_c0_c1_tcpc_rst_odl), 0);
-	msleep(NCT38XX_RESET_HOLD_DELAY_MS);
-	gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(usb_c0_c1_tcpc_rst_odl), 1);
-	nct38xx_reset_notify(0);
-	nct38xx_reset_notify(1);
-
-	if (NCT3807_RESET_POST_DELAY_MS != 0) {
-		msleep(NCT3807_RESET_POST_DELAY_MS);
-	}
-
-	/* NCT38XX chip uses gpio ioex */
-	gpio_reset_port(DEVICE_DT_GET(DT_NODELABEL(ioex_c0)));
-	gpio_reset_port(DEVICE_DT_GET(DT_NODELABEL(ioex_c1)));
-
-#if defined(HAS_TASK_PD_C2)
-	/* Reset the ccgxxf ports only resetting 1 is required */
-	ccgxxf_reset(USBC_PORT_C2);
-
-	/* CCGXXF has ioex on port 2 */
-	ioex_init(IOEX_C2_CCGXXF);
-#endif
-}
-
-void board_connect_c0_sbu(enum gpio_signal signal)
-{
-	hook_call_deferred(&board_connect_c0_sbu_deferred_data, 0);
-}
-
-/******************************************************************************/
-/* KSO mapping for discrete keyboard */
-__override const uint8_t it8801_kso_mapping[] = {
-	0, 1, 20, 3, 4, 5, 6, 11, 12, 13, 14, 15, 16,
-};
-BUILD_ASSERT(ARRAY_SIZE(it8801_kso_mapping) == KEYBOARD_COLS_MAX);
-
-/* PWROK signal configuration */
-/*
- * On MTLRVP, SYS_PWROK_EC is an output controlled by EC and uses ALL_SYS_PWRGD
- * as input.
- */
-const struct intel_x86_pwrok_signal pwrok_signal_assert_list[] = {
-	{
-		.gpio = GPIO_PCH_SYS_PWROK,
-		.delay_ms = 3,
-	},
-};
-const int pwrok_signal_assert_count = ARRAY_SIZE(pwrok_signal_assert_list);
-
-const struct intel_x86_pwrok_signal pwrok_signal_deassert_list[] = {
-	{
-		.gpio = GPIO_PCH_SYS_PWROK,
-	},
-};
-const int pwrok_signal_deassert_count = ARRAY_SIZE(pwrok_signal_deassert_list);
-
-/*
- * Returns board information (board id[7:0] and Fab id[15:8]) on success
- * -1 on error.
- */
-__override int board_get_version(void)
-{
-	/* Cache the MTLRVP board ID */
-	static int mtlrvp_board_id;
-
-	int i;
-	int rv = EC_ERROR_UNKNOWN;
-	int fab_id, board_id, bom_id;
-
-	/* Board ID is already read */
-	if (mtlrvp_board_id)
-		return mtlrvp_board_id;
-
-	/*
-	 * IOExpander that has Board ID information is on DSW-VAL rail on
-	 * ADL RVP. On cold boot cycles, DSW-VAL rail is taking time to settle.
-	 * This loop retries to ensure rail is settled and read is successful
-	 */
-	for (i = 0; i < RVP_VERSION_READ_RETRY_CNT; i++) {
-		rv = gpio_pin_get_dt(&bom_id_config[0]);
-
-		if (rv >= 0)
-			break;
-
-		k_msleep(1);
-	}
-
-	/* return -1 if failed to read board id */
-	if (rv)
-		return -1;
-
-	/*
-	 * BOM ID [2]   : IOEX[0]
-	 * BOM ID [1:0] : IOEX[15:14]
-	 */
-	bom_id = gpio_pin_get_dt(&bom_id_config[0]) << 2;
-	bom_id |= gpio_pin_get_dt(&bom_id_config[1]) << 1;
-	bom_id |= gpio_pin_get_dt(&bom_id_config[2]);
-	/*
-	 * FAB ID [1:0] : IOEX[2:1] + 1
-	 */
-	fab_id = gpio_pin_get_dt(&fab_id_config[0]) << 1;
-	fab_id |= gpio_pin_get_dt(&fab_id_config[1]);
-	fab_id += 1;
-
-	/*
-	 * BOARD ID[5:0] : IOEX[13:8]
-	 */
-	board_id = gpio_pin_get_dt(&board_id_config[0]) << 5;
-	board_id |= gpio_pin_get_dt(&board_id_config[1]) << 4;
-	board_id |= gpio_pin_get_dt(&board_id_config[2]) << 3;
-	board_id |= gpio_pin_get_dt(&board_id_config[3]) << 2;
-	board_id |= gpio_pin_get_dt(&board_id_config[4]) << 1;
-	board_id |= gpio_pin_get_dt(&board_id_config[5]);
-
-	CPRINTF("BID:0x%x, FID:0x%x, BOM:0x%x", board_id, fab_id, bom_id);
-
-	mtlrvp_board_id = board_id | (fab_id << 8);
-	return mtlrvp_board_id;
-}
-
-static void board_int_init(void)
-{
-	/* Enable PPC interrupts. */
-	gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_ppc));
-	gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_ppc));
-
-	/* Enable TCPC interrupts. */
-	gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_c1_tcpc));
-#if defined(HAS_TASK_PD_C2)
-	gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c2_tcpc));
-	gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c3_tcpc));
-#endif
-
-	/* Enable CCD Mode interrupt */
-	gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_ccd_mode));
-}
-
-static int board_pre_task_peripheral_init(const struct device *unused)
-{
-	ARG_UNUSED(unused);
-
-	/* Only reset tcpc/pd if not sysjump */
-	if (!system_jumped_late()) {
-		/* Initialize tcpc and all ioex */
-		board_reset_pd_mcu();
-	}
-
-	/* Initialize all interrupts */
-	board_int_init();
-
-	/* Make sure SBU are routed to CCD or AUX based on CCD status at init */
-	board_connect_c0_sbu_deferred();
-
-	return 0;
-}
-SYS_INIT(board_pre_task_peripheral_init, APPLICATION,
-	 CONFIG_APPLICATION_INIT_PRIORITY);
-
-/*
- * Since MTLRVP has both PPC and TCPC ports override to check if the port
- * is a PPC or non PPC port
- */
-__override bool pd_check_vbus_level(int port, enum vbus_level level)
-{
-	if (!board_port_has_ppc(port)) {
-		return tcpm_check_vbus_level(port, level);
-	} else if (level == VBUS_PRESENT) {
-		return pd_snk_is_vbus_provided(port);
-	} else {
-		return !pd_snk_is_vbus_provided(port);
-	}
-}
-
-__override bool board_port_has_ppc(int port)
-{
-	bool ppc_port;
-
-	switch (port) {
-	case USBC_PORT_C0:
-	case USBC_PORT_C1:
-		ppc_port = true;
-		break;
-	default:
-		ppc_port = false;
-		break;
-	}
-
-	return ppc_port;
-}
diff --git a/zephyr/projects/intelrvp/mtlrvp/usbc.dts b/zephyr/projects/intelrvp/mtlrvp/usbc.dts
deleted file mode 100644
index e4f3bdc465..0000000000
--- a/zephyr/projects/intelrvp/mtlrvp/usbc.dts
+++ /dev/null
@@ -1,76 +0,0 @@
-/* Copyright 2022 The ChromiumOS Authors
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/ {
-	usbc {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		usbc_port0: port0@0 {
-			compatible = "named-usbc-port";
-			reg = <0>;
-			tcpc = <&tcpc_port0>;
-			chg = <&charger>;
-			usb-mux-chain-0 {
-				compatible = "cros-ec,usb-mux-chain";
-				usb-muxes = <&usb_c0_hb_retimer
-					     &virtual_mux_c0>;
-			};
-		};
-		port0-muxes {
-			virtual_mux_c0: virtual-mux-c0 {
-				compatible = "cros-ec,usbc-mux-virtual";
-			};
-		};
-
-		usbc_port1: port1@1 {
-			compatible = "named-usbc-port";
-			reg = <1>;
-			tcpc = <&tcpc_port1>;
-			usb-mux-chain-1 {
-				compatible = "cros-ec,usb-mux-chain";
-				usb-muxes = <&usb_c1_hb_retimer
-					     &virtual_mux_c1>;
-			};
-		};
-		port1-muxes {
-			virtual_mux_c1: virtual-mux-c1 {
-				compatible = "cros-ec,usbc-mux-virtual";
-			};
-		};
-
-		usbc_port2: port2@2 {
-			compatible = "named-usbc-port";
-			reg = <2>;
-			tcpc = <&tcpc_port2>;
-			usb-mux-chain-2 {
-				compatible = "cros-ec,usb-mux-chain";
-				usb-muxes = <&usb_c2_hb_retimer
-					     &virtual_mux_c2>;
-			};
-		};
-		port2-muxes {
-			virtual_mux_c2: virtual-mux-c2 {
-				compatible = "cros-ec,usbc-mux-virtual";
-			};
-		};
-
-		usbc_port3: port3@3 {
-			compatible = "named-usbc-port";
-			reg = <3>;
-			tcpc = <&tcpc_port3>;
-			usb-mux-chain-3 {
-				compatible = "cros-ec,usb-mux-chain";
-				usb-muxes = <&usb_c3_hb_retimer
-					     &virtual_mux_c3>;
-			};
-		};
-		port3-muxes {
-			virtual_mux_c3: virtual-mux-c3 {
-				compatible = "cros-ec,usbc-mux-virtual";
-			};
-		};
-	};
-};