diff options
author | Mulin Chao <mlchao@nuvoton.com> | 2022-05-12 23:52:27 -0700 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-05-23 21:47:32 +0000 |
commit | 0cee977903d8633acfa94badedaf7ff40a9d921d (patch) | |
tree | 8f6fa0fdc1a629579c8974a30e1bdbb0dfc72c25 /zephyr/projects/intelrvp/mtlrvp | |
parent | c5d9eafd9d9ed6403223782f1eb4f3c7c059841e (diff) | |
download | chrome-ec-0cee977903d8633acfa94badedaf7ff40a9d921d.tar.gz |
zephyr: adlrvp: mtlrvp: Add support for pinctrl driver
In order to support 'Road from pinmux to pinctrl' on zephyr community.
Nuvoton has summbited the PR for npcx ec pin-muxing and pad's property
configuration. Hence, this CL collects the necessary changes for
aldrvp and mtlrvp projects.
BUG=b:232543902
BRANCH=none
TEST=zmake build adlrvp_npcx --clobber,
zmake build mtlrvpp_npcx --clobber
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Change-Id: I7d1989c56fe30511039dfba8d20bad113b2001ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3647378
Reviewed-by: Tristan Honscheid <honscheid@google.com>
Tested-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'zephyr/projects/intelrvp/mtlrvp')
-rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts | 6 | ||||
-rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts | 22 |
2 files changed, 26 insertions, 2 deletions
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts index ebb9b198e2..99c2cf10d0 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts @@ -23,7 +23,8 @@ /* Tachemeter for fan speed measurement */ &tach2 { status = "okay"; - pinctrl-0 = <&alt3_ta2_sl1>; /* Use TA2 as input pin */ + pinctrl-0 = <&ta2_1_in_gp73>; /* TA2 input on GPIO73 */ + pinctrl-names = "default"; port = <NPCX_TACH_PORT_A>; /* port-A is selected */ sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */ pulses-per-round = <2>; /* number of pulses per round of encoder */ @@ -31,5 +32,6 @@ &pwm3 { status = "okay"; + pinctrl-0 = <&pwm3_gp80>; + pinctrl-names = "default"; }; - diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts index 67a1482b46..8ff2efd460 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts @@ -80,6 +80,8 @@ &i2c7_0 { status = "okay"; clock-frequency = <I2C_BITRATE_STANDARD>; + pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>; + pinctrl-names = "default"; pca95xx: pca95xx@22 { compatible = "nxp,pca95xx"; @@ -124,6 +126,13 @@ }; }; +/* host interface */ +&espi0 { + status = "okay"; + pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; + pinctrl-names = "default"; +}; + &i2c_ctrl7 { status = "okay"; }; @@ -132,6 +141,8 @@ &i2c0_0 { status = "okay"; clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; + pinctrl-names = "default"; }; &i2c_ctrl0 { @@ -142,8 +153,19 @@ &i2c2_0 { status = "okay"; clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; + pinctrl-names = "default"; }; &i2c_ctrl2 { status = "okay"; }; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_chan1_gp44 + &adc0_chan2_gp43 + &adc0_chan3_gp42 + &adc0_chan4_gp41>; + pinctrl-names = "default"; +}; |