diff options
| author | Keith Short <keithshort@chromium.org> | 2022-10-20 11:35:45 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-11-04 22:51:13 +0000 |
| commit | 13c68a3e7a85119367ddbcd130518163e4dcd619 (patch) | |
| tree | 08736bb29c15afc4ca68f1958f6c34ec248640f3 /zephyr/projects/intelrvp | |
| parent | fba4956a5c7c7df15822a721310bc46b93ded47c (diff) | |
| download | chrome-ec-13c68a3e7a85119367ddbcd130518163e4dcd619.tar.gz | |
zephyr: rename projects folder to program
Renme the projects folder to program for consistency with the name
scheme used by the boxster configuration.
BUG=b:254097139
BRANCH=none
TEST=zmake compare-builds -a
TEST=twister
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ib56a57f1e5942e6dd0460e3be81722896eed72af
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3968444
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'zephyr/projects/intelrvp')
50 files changed, 0 insertions, 4993 deletions
diff --git a/zephyr/projects/intelrvp/BUILD.py b/zephyr/projects/intelrvp/BUILD.py deleted file mode 100644 index f129b3d2d2..0000000000 --- a/zephyr/projects/intelrvp/BUILD.py +++ /dev/null @@ -1,98 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Define zmake projects for intelrvp.""" - -# intelrvp has adlrvp_npcx, adlrvpp_ite, adlrvpp_mchp etc - - -def register_intelrvp_project( - project_name, - chip="npcx9m3f", - extra_dts_overlays=(), - extra_kconfig_files=(), -): - """Register a variant of intelrvp.""" - register_func = register_binman_project - if chip.startswith("mec1727"): - register_func = register_mchp_project - elif chip.startswith("npcx"): - register_func = register_npcx_project - - kconfig_files = [here / "prj.conf"] - dts_overlays = [] - if project_name.startswith("adlrvp"): - kconfig_files.append(here / "adlrvp/prj.conf") - dts_overlays.append(here / "adlrvp/battery.dts") - dts_overlays.append(here / "adlrvp/ioex.dts") - if project_name.startswith("mtlrvp"): - kconfig_files.append(here / "mtlrvp/prj.conf") - dts_overlays.append(here / "adlrvp/battery.dts") - kconfig_files.extend(extra_kconfig_files) - dts_overlays.extend(extra_dts_overlays) - - register_func( - project_name=project_name, - zephyr_board=chip, - dts_overlays=dts_overlays, - kconfig_files=kconfig_files, - ) - - -register_intelrvp_project( - project_name="adlrvp_mchp", - chip="mec1727", - extra_dts_overlays=[ - here / "adlrvp/adlrvp_mchp/adlrvp_mchp.dts", - here / "adlrvp/adlrvp_mchp/gpio.dts", - here / "adlrvp/adlrvp_mchp/interrupts.dts", - here / "adlrvp/adlrvp_mchp/keyboard.dts", - here / "adlrvp/adlrvp_mchp/usbc.dts", - ], - extra_kconfig_files=[ - here / "legacy_ec_pwrseq.conf", - here / "adlrvp/adlrvp_mchp/prj.conf", - ], -) - - -register_intelrvp_project( - project_name="adlrvp_npcx", - chip="npcx9m7f", - extra_dts_overlays=[ - here / "adlrvp/adlrvp_npcx/adlrvp_npcx.dts", - here / "adlrvp/adlrvp_npcx/fan.dts", - here / "adlrvp/adlrvp_npcx/gpio.dts", - here / "adlrvp/adlrvp_npcx/interrupts.dts", - here / "adlrvp/adlrvp_npcx/keyboard.dts", - here / "adlrvp/adlrvp_npcx/temp_sensor.dts", - here / "adlrvp/adlrvp_npcx/usbc.dts", - here / "adlrvp/adlrvp_npcx/pwm_leds.dts", - ], - extra_kconfig_files=[ - here / "legacy_ec_pwrseq.conf", - here / "adlrvp/adlrvp_npcx/prj.conf", - ], -) - - -register_intelrvp_project( - project_name="mtlrvpp_npcx", - chip="npcx9m3f", - extra_dts_overlays=[ - here / "mtlrvp/mtlrvpp_npcx/fan.dts", - here / "mtlrvp/mtlrvpp_npcx/gpio.dts", - here / "mtlrvp/mtlrvpp_npcx/keyboard.dts", - here / "mtlrvp/mtlrvpp_npcx/interrupts.dts", - here / "mtlrvp/ioex.dts", - here / "mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts", - here / "mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts", - here / "adlrvp/adlrvp_npcx/temp_sensor.dts", - here / "mtlrvp/usbc.dts", - ], - extra_kconfig_files=[ - here / "zephyr_ap_pwrseq.conf", - here / "mtlrvp/mtlrvpp_npcx/prj.conf", - ], -) diff --git a/zephyr/projects/intelrvp/CMakeLists.txt b/zephyr/projects/intelrvp/CMakeLists.txt deleted file mode 100644 index 039627dec6..0000000000 --- a/zephyr/projects/intelrvp/CMakeLists.txt +++ /dev/null @@ -1,32 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -cmake_minimum_required(VERSION 3.13.1) - -find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") -project(intelrvp) - -cros_ec_library_include_directories(include) -cros_ec_library_include_directories("${PLATFORM_EC}/driver/charger") -cros_ec_library_include_directories("${PLATFORM_EC}/driver/ppc") -cros_ec_library_include_directories("${PLATFORM_EC}/driver/tcpm") -cros_ec_library_include_directories("${PLATFORM_EC}/driver/usb_mux") -zephyr_library_sources("src/intel_rvp_board_id.c") - -if((DEFINED CONFIG_BOARD_ADLRVP_MCHP) OR (DEFINED CONFIG_BOARD_ADLRVP_NPCX)) - add_subdirectory(adlrvp) - zephyr_library_sources("src/intelrvp.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "${PLATFORM_EC}/baseboard/intelrvp/usb_pd_policy_mecc_1_0.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "${PLATFORM_EC}/baseboard/intelrvp/chg_usb_pd_mecc_1_0.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "${PLATFORM_EC}/baseboard/intelrvp/chg_usb_pd.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_PWM "src/intel_rvp_led.c") -endif() - -if(DEFINED CONFIG_BOARD_MTLRVP_NPCX) - add_subdirectory(mtlrvp) - zephyr_library_sources("src/intelrvp.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/usb_pd_policy_mecc_1_1.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/chg_usb_pd_mecc_1_1.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/chg_usb_pd.c") -endif() diff --git a/zephyr/projects/intelrvp/Kconfig b/zephyr/projects/intelrvp/Kconfig deleted file mode 100644 index 605f57c054..0000000000 --- a/zephyr/projects/intelrvp/Kconfig +++ /dev/null @@ -1,26 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -config BOARD_ADLRVP_MCHP - bool "Intel ADLRVP_MCHP board" - depends on SOC_MEC172X_NSZ - help - Build Intel ADLRVP_MCHP reference board. This board has Intel ADL RVP - SoC with MEC1727 EC. - -config BOARD_ADLRVP_NPCX - bool "Intel ADLRVP_NPCX board" - depends on SOC_NPCX9M7F - help - Build Intel ADLRVP_NPCX reference board. This board has Intel ADL RVP - SoC with NPCX9M37F EC. - -config BOARD_MTLRVP_NPCX - bool "Intel MTLRVP_NPCX board" - depends on SOC_NPCX9M3F - help - Build Intel MTLRVP_NPCX reference board. This board is Intel MTL RVP - SOC with NPCX_NPCX9M3F - -source "Kconfig.zephyr" diff --git a/zephyr/projects/intelrvp/adlrvp/CMakeLists.txt b/zephyr/projects/intelrvp/adlrvp/CMakeLists.txt deleted file mode 100644 index 71dee29552..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/CMakeLists.txt +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -cros_ec_library_include_directories("include") -zephyr_library_sources("src/adlrvp.c") diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/adlrvp_mchp.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/adlrvp_mchp.dts deleted file mode 100644 index 527a62e776..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/adlrvp_mchp.dts +++ /dev/null @@ -1,201 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - hibernate-wake-pins { - compatible = "cros-ec,hibernate-wake-pins"; - wakeup-irqs = < - &int_ac_present - &int_lid_open - &int_power_button - >; - }; - - named-i2c-ports { - compatible = "named-i2c-ports"; - - i2c_charger: charger { - i2c-port = <&i2c_smb_0>; - enum-names = "I2C_PORT_BATTERY", - "I2C_PORT_CHARGER", - "I2C_PORT_EEPROM", - "I2C_PORT_PORT80"; - }; - typec_0: typec-0 { - i2c-port = <&i2c_smb_1>; - enum-names = "I2C_PORT_TYPEC_0"; - }; - typec_1: typec-1 { - i2c-port = <&i2c_smb_2>; - enum-names = "I2C_PORT_TYPEC_1"; - }; - typec_2: typec-2 { - i2c-port = <&i2c_smb_3>; - enum-names = "I2C_PORT_TYPEC_2"; - }; - typec_3: typec-3 { - i2c-port = <&i2c_smb_4>; - enum-names = "I2C_PORT_TYPEC_3"; - }; - }; -}; - -/* charger */ -&i2c_smb_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_STANDARD>; - port_sel = <0>; - pinctrl-0 = <&i2c00_scl_gpio004 &i2c00_sda_gpio003>; - pinctrl-names = "default"; - - pca95xx: pca95xx@22 { - compatible = "nxp,pca95xx"; - label = "PCA95XX"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - - rvp_board_id: rvp-board-id { - compatible = "intel,rvp-board-id"; - - /* - * BOM ID [2] : IOEX[0] - * BOM ID [1:0] : IOEX[15:14] - */ - bom-gpios = <&pca95xx 0 0>, <&pca95xx 15 0>, <&pca95xx 14 0>; - - /* - * FAB ID [1:0] : IOEX[2:1] - */ - fab-gpios = <&pca95xx 2 0>, <&pca95xx 1 0>; - - /* - * BOARD ID[5:0] : IOEX[13:8] - */ - board-gpios = <&pca95xx 13 0>, <&pca95xx 12 0>, <&pca95xx 11 0>, - <&pca95xx 10 0>, <&pca95xx 9 0>, <&pca95xx 8 0>; - }; - - seven_seg_display: max695x-seven-seg-display@38 { - compatible = "maxim,seven-seg-display"; - reg = <0x38>; - label = "MAX695X_SEVEN_SEG_DISPLAY"; - }; - - charger: isl9241@9 { - compatible = "intersil,isl9241"; - status = "okay"; - reg = <0x9>; - }; - - cbi_eeprom: eeprom@50 { - compatible = "atmel,at24"; - reg = <0x50>; - size = <2048>; - pagesize = <16>; - address-width = <8>; - timeout = <5>; - }; -}; - -/* typec_0 */ -&i2c_smb_1 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - port_sel = <6>; - pinctrl-0 = <&i2c06_scl_gpio140 &i2c06_sda_gpio132>; - pinctrl-names = "default"; - - tcpc_port0: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c0_soc_side_bb_retimer: jhl8040r-c0-soc-side@54 { - compatible = "intel,jhl8040r"; - reg = <0x54>; - reset-pin = <&usb_c0_bb_retimer_rst>; - ls-en-pin = <&usb_c0_bb_retimer_ls_en>; - }; - - usb_c0_bb_retimer: jhl8040r-c0@56 { - compatible = "intel,jhl8040r"; - reg = <0x56>; - reset-pin = <&usb_c0_bb_retimer_rst>; - ls-en-pin = <&usb_c0_bb_retimer_ls_en>; - }; -}; - -/* typec_1 */ -&i2c_smb_2 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - port_sel = <3>; - pinctrl-0 = <&i2c03_scl_gpio010 &i2c03_sda_gpio007>; - pinctrl-names = "default"; - - tcpc_port1: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c1_soc_side_bb_retimer: jhl8040r-c1-soc-side@55 { - compatible = "intel,jhl8040r"; - reg = <0x55>; - reset-pin = <&usb_c1_bb_retimer_rst>; - ls-en-pin = <&usb_c1_bb_retimer_ls_en>; - }; - - usb_c1_bb_retimer: jhl8040r-c1@57 { - compatible = "intel,jhl8040r"; - reg = <0x57>; - reset-pin = <&usb_c1_bb_retimer_rst>; - ls-en-pin = <&usb_c1_bb_retimer_ls_en>; - }; -}; - -/* typec_2 */ -&i2c_smb_3 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - port_sel = <7>; - pinctrl-0 = <&i2c07_scl_gpio013 &i2c07_sda_gpio012>; - pinctrl-names = "default"; - - tcpc_port2: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c2_bb_retimer: jhl8040r-c2@58 { - compatible = "intel,jhl8040r"; - reg = <0x58>; - reset-pin = <&usb_c2_bb_retimer_rst>; - ls-en-pin = <&usb_c2_bb_retimer_ls_en>; - }; -}; - -/* typec_3 */ -&i2c_smb_4 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - port_sel = <2>; - pinctrl-0 = <&i2c02_scl_gpio155 &i2c02_sda_gpio154>; - pinctrl-names = "default"; - - tcpc_port3: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c3_bb_retimer: jhl8040r-c3@59 { - compatible = "intel,jhl8040r"; - reg = <0x59>; - reset-pin = <&usb_c3_bb_retimer_rst>; - ls-en-pin = <&usb_c3_bb_retimer_ls_en>; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/bb_retimer.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/bb_retimer.dts deleted file mode 100644 index 1c760120f1..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/bb_retimer.dts +++ /dev/null @@ -1,28 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -&i2c_smb_1 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - - usb_c0_bb_retimer: jhl8040r@56 { - compatible = "intel,jhl8040r"; - reg = <0x56>; - label = "USB_C0_BB_RETIMER"; - reset-pin = <&usb_c0_bb_retimer_rst>; - }; -}; - -&i2c_smb_2 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - - usb_c1_bb_retimer: jhl8040r@57 { - compatible = "intel,jhl8040r"; - reg = <0x57>; - label = "USB_C1_BB_RETIMER"; - reset-pin = <&usb_c1_bb_retimer_rst>; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/gpio.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/gpio.dts deleted file mode 100644 index d526fdcb3b..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/gpio.dts +++ /dev/null @@ -1,299 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - aliases { - gpio-wp = &gpio_wp; - gpio-kbd-kso2 = &gpio_ec_kso_02_inv; - }; - - named-gpios { - compatible = "named-gpios"; - - all_sys_pwrgd: all-sys-pwrgd { - gpios = <&gpio_040_076 15 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD"; - }; /* GPIO057 */ - rsmrst_pwrgd: rsmrst-pwrgd { - gpios = <&gpio_200_236 17 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_RSMRST_ODL"; - }; /* GPIO221 */ - pch_slp_s0_n: pch-slp-s0-n { - gpios = <&gpio_240_276 3 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S0_L"; - }; /* GPIO243 */ - vccpdsw_3p3: vccpdsw-3p3 { - gpios = <&gpio_200_236 1 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_DSW_PWROK"; - }; /* GPIO201 */ - pm_slp_sus_ec_n: pm-slp-sus-ec-n { - gpios = <&gpio_200_236 23 GPIO_INPUT>; - enum-name = "GPIO_SLP_SUS_L"; - }; /* GPIO227 */ - pm_slp_s3_n: pm-slp-s3-n { - gpios = <&gpio_140_176 17 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S3_L"; - }; /* GPIO161 */ - pm_slp_s4_n: pm-slp-s4-n { - gpios = <&gpio_140_176 18 GPIO_INPUT>; - }; /* GPIO162 */ - volume_up { - gpios = <&gpio_000_036 30 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_UP_L"; - }; /* GPIO036 */ - vol_dn_ec { - gpios = <&gpio_240_276 12 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_DOWN_L"; - }; /* GPIO254 */ - smc_lid: smc-lid { - gpios = <&gpio_200_236 22 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_LID_OPEN"; - }; /* GPIO226 */ - mech_pwr_btn_odl: mech-pwr-btn-odl { - gpios = <&gpio_100_136 13 GPIO_INPUT>; - enum-name = "GPIO_POWER_BUTTON_L"; - }; /* GPIO115 */ - std_adp_prsnt: std-adp-prsnt { - gpios = <&gpio_040_076 3 GPIO_INPUT>; - enum-name= "GPIO_DC_JACK_PRESENT"; - }; /* GPIO043 */ - bc_acok: bc-acok { - gpios = <&gpio_140_176 14 GPIO_INPUT>; - enum-name = "GPIO_AC_PRESENT"; - }; /* GPIO156 */ - usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { - gpios = <&gpio_140_176 3 GPIO_INPUT>; - }; /* GPIO143 */ - usbc_tcpc_alrt_p1: usbc-tcpc-alrt-p1 { - gpios = <&gpio_240_276 1 GPIO_INPUT>; - }; /* GPIO241 */ - usbc_tcpc_alrt_p2: usbc-tcpc-alrt-p2 { - gpios = <&gpio_100_136 24 GPIO_INPUT>; - }; /* GPIO130 */ - usbc_tcpc_alrt_p3: usbc-tcpc-alrt-p3 { - gpios = <&gpio_240_276 2 GPIO_INPUT>; - }; /* GPIO242 */ - usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 { - gpios = <&gpio_240_276 0 GPIO_INPUT>; - }; /* GPIO240 */ - usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 { - gpios = <&gpio_100_136 1 GPIO_INPUT>; - }; /* GPIO101 */ - usbc_tcpc_ppc_alrt_p2: usbc-tcpc-ppc-alrt-p2 { - gpios = <&gpio_140_176 4 GPIO_INPUT>; - }; /* GPIO144 */ - usbc_tcpc_ppc_alrt_p3: usbc-tcpc-ppc-alrt-p3 { - gpios = <&gpio_140_176 2 GPIO_INPUT>; - }; /* GPIO142 */ - gpio_ec_pch_wake_odl: smc-wake-sci-n-mecc { - gpios = <&gpio_040_076 9 GPIO_ODR_HIGH>; - }; /* GPIO051 */ - ec_pch_mkbp_int_odl { - gpios = <&gpio_100_136 23 GPIO_ODR_HIGH>; - }; /* GPIO127 */ - lpc_espi_rst_n { - gpios = <&gpio_040_076 17 GPIO_INPUT>; - }; /* GPIO061 NANA */ - plt_rst_l { - gpios = <&gpio_040_076 10 GPIO_INPUT>; - }; /* GPIO052 NANA */ - slate_mode_indication { - gpios = <&gpio_200_236 18 GPIO_INPUT>; - }; /* GPIO222 */ - prochot_ec_n { - gpios = <&gpio_000_036 2 GPIO_INPUT>; - enum-name = "GPIO_CPU_PROCHOT"; - }; /* GPIO002 ???? */ - sys_rst_odl { - gpios = <&gpio_040_076 16 GPIO_ODR_HIGH>; - enum-name = "GPIO_SYS_RESET_L"; - }; /* GPIO060 */ - pm_rsmrst_n { - gpios = <&gpio_040_076 12 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_RSMRST_L"; - }; /* GPIO054 */ - pm_pwrbtn_n { - gpios = <&gpio_000_036 14 GPIO_ODR_HIGH>; - enum-name = "GPIO_PCH_PWRBTN_L"; - }; /* GPIO016 */ - ec_spi_oe_mecc: ec-spi-oe-mecc { - gpios = <&gpio_040_076 2 GPIO_OUTPUT_LOW>; - }; /* GPIO042 */ - ec_ds3 { - gpios = <&gpio_000_036 21 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_EN_PP3300_A"; - }; /* GPIO025 */ - pch_pwrok_ec { - gpios = <&gpio_100_136 6 GPIO_INPUT>; - enum-name = "GPIO_PCH_PWROK"; - }; /* GPIO106 */ - sys_pwrok { - gpios = <&gpio_200_236 2 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_SYS_PWROK"; - }; /* GPIO202 */ - ec_dsw_pwrok { - gpios = <&gpio_000_036 28 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_DSW_PWROK"; - }; /* GPIO034 */ - gpio_wp: ec-flash-wp-odl { - gpios = <&gpio_000_036 12 GPIO_INPUT>; - }; /* GPIO014 */ - ec_h1_packet_mode { - gpios = <&gpio_000_036 29 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PACKET_MODE_EN"; - }; /* GPIO035 */ - ec_entering_rw { - gpios = <&gpio_100_136 2 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_ENTERING_RW"; - }; /* GPIO102 */ - ccd_mode_odl: ccd-mode-odl { - gpios = <&gpio_140_176 29 GPIO_INPUT>; - enum-name = "GPIO_CCD_MODE_ODL"; - }; /* GPIO175 */ - bat_det { - gpios = <&gpio_200_236 6 GPIO_INPUT>; - enum-name = "GPIO_BATT_PRES_ODL"; - }; /* GPIO206 */ - edp_bklt_en_mecc { - gpios = <&gpio_000_036 18 GPIO_OUTPUT_HIGH>; - }; /* GPIO022 */ - led_1_l { - gpios = <&gpio_140_176 15 GPIO_OUTPUT_HIGH>; - }; /* GPIO157 */ - led_2_l { - gpios = <&gpio_140_176 11 GPIO_OUTPUT_HIGH>; - }; /* GPIO153 */ - therm_sen_mecc { - gpios = <&gpio_140_176 1 GPIO_OUTPUT_LOW>; - }; /* GPIO141 */ - smb_bs_clk { - gpios = <&gpio_000_036 4 GPIO_INPUT>; - }; /* GPIO004 */ - smb_bs_data { - gpios = <&gpio_000_036 3 GPIO_INPUT>; - }; /* GPIO003 */ - usbc_tcpc_i2c_clk_p0 { - gpios = <&gpio_140_176 0 GPIO_INPUT>; - }; /* GPIO140 */ - usbc_tcpc_i2c_data_p0 { - gpios = <&gpio_100_136 26 GPIO_INPUT>; - }; /* GPIO132 */ - usbc_tcpc_i2c_clk_p2 { - gpios = <&gpio_000_036 8 GPIO_INPUT>; - }; /* GPIO010 */ - usbc_tcpc_i2c_data_p2 { - gpios = <&gpio_000_036 7 GPIO_INPUT>; - }; /* GPIO007 */ - usbc_tcpc_i2c_clk_p1 { - gpios = <&gpio_000_036 11 GPIO_INPUT>; - }; /* GPIO013 */ - usbc_tcpc_i2c_data_p1 { - gpios = <&gpio_000_036 10 GPIO_INPUT>; - }; /* GPIO012 */ - usbc_tcpc_i2c_clk_p3 { - gpios = <&gpio_140_176 13 GPIO_INPUT>; - }; /* GPIO155 */ - usbc_tcpc_i2c_data_p3 { - gpios = <&gpio_140_176 12 GPIO_INPUT>; - }; /* GPIO154 */ - sml1_clk_mecc { - gpios = <&gpio_100_136 25 GPIO_INPUT>; - }; /* GPIO131 */ - cpu_cat_err_mecc { - gpios = <&gpio_000_036 0 GPIO_INPUT>; - }; /* GPIO000 */ - espi_alert0_n { - gpios = <&gpio_040_076 19 GPIO_INPUT>; - }; /* GPIO063 NANA */ - batt_disable_ec { - gpios = <&gpio_040_076 23 GPIO_INPUT>; - }; /* GPIO067 */ - cpu_c10_gate_mecc { - gpios = <&gpio_000_036 19 GPIO_INPUT>; - }; /* GPIO023 */ - smc_sdown_mecc { - gpios = <&gpio_240_276 13 GPIO_INPUT>; - }; /* GPIO255 */ - std_adpt_cntrl_gpio { - gpios = <&gpio_240_276 4 GPIO_INPUT>; - }; /* GPIO244 */ - smc_onoff_n { - gpios = <&gpio_100_136 12 GPIO_INPUT>; - }; /* GPIO114 */ - suswarn { - gpios = <&gpio_000_036 20 GPIO_INPUT>; - }; /* GPIO024 */ - me_g3_to_m3_ec { - gpios = <&gpio_000_036 27 GPIO_INPUT>; - }; /* GPIO033 */ - gpio_ec_kso_02_inv: ec-kso-02-inv { - gpios = <&gpio_040_076 6 (GPIO_OUTPUT_LOW - | GPIO_ACTIVE_LOW)>; - }; /* GPIO046 */ - - usb_c0_bb_retimer_rst: usb-c0-bb-retimer-rst { - gpios = <&ioex_c0_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_BB_RETIMER_RST"; - }; - usb_c0_bb_retimer_ls_en: usb-c0-bb-retimer-ls-en { - gpios = <&ioex_c0_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_BB_RETIMER_LS_EN"; - }; - usb-c0-usb-mux-cntrl-1 { - gpios = <&ioex_c0_port 4 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_USB_MUX_CNTRL_1"; - }; - usb-c0-usb-mux-cntrl-0 { - gpios = <&ioex_c0_port 5 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_USB_MUX_CNTRL_0"; - }; - usb_c1_bb_retimer_rst: usb-c1-bb-retimer-rst { - gpios = <&ioex_c1_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_BB_RETIMER_RST"; - }; - usb_c1_bb_retimer_ls_en: usb-c1-bb-retimer-ls-en { - gpios = <&ioex_c1_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_BB_RETIMER_LS_EN"; - }; - usb-c1-hpd { - gpios = <&ioex_c1_port 2 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_HPD"; - }; - usb-c0-c1-oc { - gpios = <&ioex_c1_port 8 GPIO_OUTPUT_HIGH>; - enum-name = "IOEX_USB_C0_C1_OC"; - }; - usb_c2_bb_retimer_rst: usb-c2-bb-retimer-rst { - gpios = <&ioex_c2_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C2_BB_RETIMER_RST"; - }; - usb_c2_bb_retimer_ls_en: usb-c2-bb-retimer-ls-en { - gpios = <&ioex_c2_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C2_BB_RETIMER_LS_EN"; - }; - usb-c2-usb-mux-cntrl-1 { - gpios = <&ioex_c2_port 4 GPIO_OUTPUT_LOW>; - }; - usb-c2-usb-mux-cntrl-0 { - gpios = <&ioex_c2_port 5 GPIO_OUTPUT_LOW>; - }; - usb_c3_bb_retimer_rst: usb-c3-bb-retimer-rst { - gpios = <&ioex_c3_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C3_BB_RETIMER_RST"; - }; - usb_c3_bb_retimer_ls_en: usb-c3-bb-retimer-ls-en { - gpios = <&ioex_c3_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C3_BB_RETIMER_LS_EN"; - }; - usb-c2-c3-oc { - gpios = <&ioex_c3_port 8 GPIO_OUTPUT_HIGH>; - enum-name = "IOEX_USB_C2_C3_OC"; - }; - /* unimplemented GPIOs */ - en-pp5000 { - enum-name = "GPIO_EN_PP5000"; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/interrupts.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/interrupts.dts deleted file mode 100644 index 17986fe2c7..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/interrupts.dts +++ /dev/null @@ -1,80 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/ { - gpio-interrupts { - compatible = "cros-ec,gpio-interrupts"; - - int_lid_open: lid-open { - irq-pin = <&smc_lid>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "lid_interrupt"; - }; - int_power_button: power-button { - irq-pin = <&mech_pwr_btn_odl>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_button_interrupt"; - }; - int_ac_present: ac-present { - irq-pin = <&bc_acok>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "extpower_interrupt"; - }; - int_slp_s0: slp-s0 { - irq-pin = <&pch_slp_s0_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_slp_sus: slp-sus { - irq-pin = <&pm_slp_sus_ec_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_pg_dsw_pwrok: pg-dsw-pwrok { - irq-pin = <&vccpdsw_3p3>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_rsmrst_pwrgd: rsmrst-pwrgd { - irq-pin = <&rsmrst_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_all_sys_pwrgd: all-sys-pwrgd { - irq-pin = <&all_sys_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { - irq-pin = <&usbc_tcpc_alrt_p0>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_alrt_p1: usbc-tcpc-alrt-p1 { - irq-pin = <&usbc_tcpc_alrt_p1>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 { - irq-pin = <&usbc_tcpc_ppc_alrt_p0>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 { - irq-pin = <&usbc_tcpc_ppc_alrt_p1>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_std_adp_prsnt: std-adp-prsnt { - irq-pin = <&std_adp_prsnt>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "board_dc_jack_interrupt"; - }; - int_ccd_mode_odl: ccd-mode-odl { - irq-pin = <&ccd_mode_odl>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "board_connect_c0_sbu"; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/keyboard.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/keyboard.dts deleted file mode 100644 index b3577e6afd..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/keyboard.dts +++ /dev/null @@ -1,31 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - cros-keyscan { - compatible = "cros-keyscan"; - - output-settle = <80>; - debounce-down = <9000>; - debounce-up = <30000>; - poll-timeout = <100000>; - - actual-key-mask = < - 0x14 /* C0 */ - 0xff /* C1 */ - 0xff /* C2 */ - 0xff /* C3 */ - 0xff /* C4 */ - 0xf5 /* C5 */ - 0xff /* C6 */ - 0xa4 /* C7 */ - 0xff /* C8 */ - 0xfe /* C9 */ - 0x55 /* C10 */ - 0xfa /* C11 */ - 0xca /* C12 */ - >; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/prj.conf b/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/prj.conf deleted file mode 100644 index 083530c858..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/prj.conf +++ /dev/null @@ -1,84 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -CONFIG_BOARD_ADLRVP_MCHP=y -CONFIG_CROS_FLASH_XEC=y -CONFIG_CROS_SYSTEM_XEC=y -CONFIG_CROS_KB_RAW_XEC=y - -# For MCHP ESPI Drivers -CONFIG_ESPI_PERIPHERAL_EC_HOST_CMD=y -CONFIG_ESPI_PERIPHERAL_ACPI_SHM_REGION=y -CONFIG_ESPI_PERIPHERAL_CUSTOM_OPCODE=y -CONFIG_ESPI_PERIPHERAL_XEC_EMI0=y -CONFIG_ESPI_PERIPHERAL_ACPI_EC_IBF_EVT_DATA=y -CONFIG_ESPI_PERIPHERAL_KBC_OBE_CBK=y -CONFIG_ESPI_PERIPHERAL_KBC_IBF_EVT_DATA=y - -# Invoke SoC Python script to create zephyr.mchp.bin which -# is zephyr.bin processed for Boot-ROM loading. -CONFIG_MCHP_MEC_UNSIGNED_HEADER=y -CONFIG_MCHP_MEC_HEADER_FLASH_SIZE_256K=y - -# Support Zephyr SPI NOR driver to work with MCHP SPI driver -CONFIG_SPI_NOR=y -CONFIG_SPI_XEC_QMSPI_FULL_DUPLEX=y - -# Sensors - MCHP TACH driver under sensor -CONFIG_SENSOR=n -CONFIG_SENSOR_SHELL=n - -# Debug option -# Enable flash console commands -CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y - - -## TODO - support following features next -# Fan -CONFIG_PLATFORM_EC_FAN=n - -# RTC -CONFIG_PLATFORM_EC_RTC=n - -# PWM -CONFIG_PWM=n -CONFIG_PWM_SHELL=n - -## INTEL RVP -# Host command -CONFIG_PLATFORM_EC_HOSTCMD_AP_RESET=n - -# Power Sequencing -CONFIG_PLATFORM_EC_THROTTLE_AP=n - -## ADL RVP -# CBI -CONFIG_EEPROM=n -CONFIG_EEPROM_AT24=n -CONFIG_EEPROM_SHELL=n -CONFIG_PLATFORM_EC_CBI_EEPROM=n - -# LED -CONFIG_PLATFORM_EC_LED_COMMON=n -CONFIG_PLATFORM_EC_LED_PWM=n -CONFIG_PLATFORM_EC_LED_PWM_TASK_DISABLED=n - -# Temperature sensors -CONFIG_PLATFORM_EC_TEMP_SENSOR=n -CONFIG_PLATFORM_EC_THERMISTOR=n -CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=n - -# Charger -CONFIG_PLATFORM_EC_DEDICATED_CHARGE_PORT=y - -# H1 issues second reset -CONFIG_PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON=n - -# 7-Segment Display -CONFIG_PLATFORM_EC_MAX695X_SEVEN_SEGMENT_DISPLAY=n - -# Debug options -# Enable flash console commands -CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y -CONFIG_WDT_DISABLE_AT_BOOT=y diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/usbc.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/usbc.dts deleted file mode 100644 index 471a1f52e9..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_mchp/usbc.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - usbc { - #address-cells = <1>; - #size-cells = <0>; - usbc_port0: port0@0 { - compatible = "named-usbc-port"; - reg = <0>; - tcpc = <&tcpc_port0>; - chg = <&charger>; - usb_mux_chain_0: usb-mux-chain-0 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c0_bb_retimer - &virtual_mux_c0>; - }; - usb_mux_alt_chain_0: usb-mux-alt-chain-0 { - compatible = "cros-ec,usb-mux-chain"; - alternative-chain; - usb-muxes = <&usb_c0_bb_retimer - &usb_c0_soc_side_bb_retimer - &virtual_mux_c0>; - }; - }; - port0-muxes { - virtual_mux_c0: virtual-mux-c0 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - usbc_port1: port1@1 { - compatible = "named-usbc-port"; - reg = <1>; - tcpc = <&tcpc_port1>; - usb_mux_chain_1: usb-mux-chain-1 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c1_bb_retimer - &virtual_mux_c1>; - }; - usb_mux_alt_chain_1: usb-mux-alt-chain-1 { - compatible = "cros-ec,usb-mux-chain"; - alternative-chain; - usb-muxes = <&usb_c1_bb_retimer - &usb_c1_soc_side_bb_retimer - &virtual_mux_c1>; - }; - }; - port1-muxes { - virtual_mux_c1: virtual-mux-c1 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - port2@2 { - compatible = "named-usbc-port"; - reg = <2>; - tcpc = <&tcpc_port2>; - usb_mux_chain_2: usb-mux-chain-2 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c2_bb_retimer - &virtual_mux_c2>; - }; - }; - port2-muxes { - virtual_mux_c2: virtual-mux-c2 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - port3@3 { - compatible = "named-usbc-port"; - reg = <3>; - tcpc = <&tcpc_port3>; - usb_mux_chain_3: usb-mux-chain-3 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c3_bb_retimer - &virtual_mux_c3>; - }; - }; - port3-muxes { - virtual_mux_c3: virtual-mux-c3 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts deleted file mode 100644 index 79723beabd..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts +++ /dev/null @@ -1,258 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - chosen { - cros,rtc = &mtc; - }; - - hibernate-wake-pins { - compatible = "cros-ec,hibernate-wake-pins"; - wakeup-irqs = < - &int_ac_present - &int_lid_open - &int_power_button - >; - }; - - named-i2c-ports { - compatible = "named-i2c-ports"; - - i2c_charger: charger { - i2c-port = <&i2c7_0>; - enum-names = "I2C_PORT_BATTERY", - "I2C_PORT_CHARGER", - "I2C_PORT_EEPROM", - "I2C_PORT_PORT80"; - }; - typec_0: typec-0 { - i2c-port = <&i2c0_0>; - enum-names = "I2C_PORT_TYPEC_0"; - }; - typec_1: typec-1 { - i2c-port = <&i2c2_0>; - enum-names = "I2C_PORT_TYPEC_1"; - }; - typec_2: typec-2 { - i2c-port = <&i2c1_0>; - enum-names = "I2C_PORT_TYPEC_2"; - }; - typec_3: typec-3 { - i2c-port = <&i2c3_0>; - enum-names = "I2C_PORT_TYPEC_3"; - }; - }; - - named-adc-channels { - compatible = "named-adc-channels"; - - adc_ambient: ambient { - enum-name = "ADC_TEMP_SENSOR_1"; - io-channels = <&adc0 3>; - }; - adc_ddr: ddr { - enum-name = "ADC_TEMP_SENSOR_2"; - io-channels = <&adc0 4>; - }; - adc_skin: skin { - enum-name = "ADC_TEMP_SENSOR_3"; - io-channels = <&adc0 2>; - }; - adc_vr: vr { - enum-name = "ADC_TEMP_SENSOR_4"; - io-channels = <&adc0 1>; - }; - }; - -}; - -/* host interface */ -&espi0 { - status = "okay"; - pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; - pinctrl-names = "default"; -}; - -/* charger */ -&i2c7_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_STANDARD>; - pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>; - pinctrl-names = "default"; - - pca95xx: pca95xx@22 { - compatible = "nxp,pca95xx"; - label = "PCA95XX"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - - rvp_board_id: rvp-board-id { - compatible = "intel,rvp-board-id"; - - /* - * BOM ID [2] : IOEX[0] - * BOM ID [1:0] : IOEX[15:14] - */ - bom-gpios = <&pca95xx 0 0>, <&pca95xx 15 0>, <&pca95xx 14 0>; - - /* - * FAB ID [1:0] : IOEX[2:1] - */ - fab-gpios = <&pca95xx 2 0>, <&pca95xx 1 0>; - - /* - * BOARD ID[5:0] : IOEX[13:8] - */ - board-gpios = <&pca95xx 13 0>, <&pca95xx 12 0>, <&pca95xx 11 0>, - <&pca95xx 10 0>, <&pca95xx 9 0>, <&pca95xx 8 0>; - }; - - seven_seg_display: max695x-seven-seg-display@38 { - compatible = "maxim,seven-seg-display"; - reg = <0x38>; - label = "MAX695X_SEVEN_SEG_DISPLAY"; - }; - - charger: isl9241@9 { - compatible = "intersil,isl9241"; - status = "okay"; - reg = <0x9>; - }; - - cbi_eeprom: eeprom@50 { - compatible = "atmel,at24"; - reg = <0x50>; - size = <2048>; - pagesize = <16>; - address-width = <8>; - timeout = <5>; - }; -}; - -&i2c_ctrl7 { - status = "okay"; -}; - -/* typec_0 */ -&i2c0_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; - pinctrl-names = "default"; - - tcpc_port0: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c0_soc_side_bb_retimer: jhl8040r-c0-soc-side@54 { - compatible = "intel,jhl8040r"; - reg = <0x54>; - reset-pin = <&usb_c0_bb_retimer_rst>; - ls-en-pin = <&usb_c0_bb_retimer_ls_en>; - }; - - usb_c0_bb_retimer: jhl8040r-c0@56 { - compatible = "intel,jhl8040r"; - reg = <0x56>; - reset-pin = <&usb_c0_bb_retimer_rst>; - ls-en-pin = <&usb_c0_bb_retimer_ls_en>; - }; -}; - -&i2c_ctrl0 { - status = "okay"; -}; - -/* typec_1 */ -&i2c2_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; - pinctrl-names = "default"; - - tcpc_port1: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c1_soc_side_bb_retimer: jhl8040r-c1-soc-side@55 { - compatible = "intel,jhl8040r"; - reg = <0x55>; - reset-pin = <&usb_c1_bb_retimer_rst>; - ls-en-pin = <&usb_c1_bb_retimer_ls_en>; - }; - - usb_c1_bb_retimer: jhl8040r-c1@57 { - compatible = "intel,jhl8040r"; - reg = <0x57>; - reset-pin = <&usb_c1_bb_retimer_rst>; - ls-en-pin = <&usb_c1_bb_retimer_ls_en>; - }; -}; - -&i2c_ctrl2 { - status = "okay"; -}; - -/* typec_2 */ -&i2c1_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; - pinctrl-names = "default"; - - tcpc_port2: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c2_bb_retimer: jhl8040r-c2@58 { - compatible = "intel,jhl8040r"; - reg = <0x58>; - reset-pin = <&usb_c2_bb_retimer_rst>; - ls-en-pin = <&usb_c2_bb_retimer_ls_en>; - }; -}; - -&i2c_ctrl1 { - status = "okay"; -}; - -/* typec_3 */ -&i2c3_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; - pinctrl-names = "default"; - - tcpc_port3: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c3_bb_retimer: jhl8040r-c3@59 { - compatible = "intel,jhl8040r"; - reg = <0x59>; - reset-pin = <&usb_c3_bb_retimer_rst>; - ls-en-pin = <&usb_c3_bb_retimer_ls_en>; - }; -}; - -&i2c_ctrl3 { - status = "okay"; -}; - -&adc0 { - status = "okay"; - pinctrl-0 = <&adc0_chan1_gp44 - &adc0_chan2_gp43 - &adc0_chan3_gp42 - &adc0_chan4_gp41>; - pinctrl-names = "default"; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/fan.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/fan.dts deleted file mode 100644 index 8babe53903..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/fan.dts +++ /dev/null @@ -1,36 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - fans { - compatible = "cros-ec,fans"; - - fan_0 { - pwms = <&pwm3 0 PWM_KHZ(30) PWM_POLARITY_NORMAL>; - rpm_min = <3000>; - rpm_start = <3000>; - rpm_max = <10000>; - tach = <&tach2>; - pgood_gpio = <&all_sys_pwrgd>; - enable_gpio = <&gpio_fan_control>; - }; - }; -}; - -/* Tachemeter for fan speed measurement */ -&tach2 { - status = "okay"; - pinctrl-0 = <&ta2_2_in_gpa6>; - pinctrl-names = "default"; - port = <NPCX_TACH_PORT_A>; /* port-A is selected */ - sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */ - pulses-per-round = <2>; /* number of pulses per round of encoder */ -}; - -&pwm3 { - status = "okay"; - pinctrl-0 = <&pwm3_gp80>; - pinctrl-names = "default"; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/gpio.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/gpio.dts deleted file mode 100644 index 1d38fc877c..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/gpio.dts +++ /dev/null @@ -1,344 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - aliases { - gpio-wp = &gpio_wp; - gpio-kbd-kso2 = &gpio_ec_kso_02_inv; - }; - - named-gpios { - compatible = "named-gpios"; - - all_sys_pwrgd: all-sys-pwrgd { - gpios = <&gpio7 0 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD"; - }; - rsmrst_pwrgd: rsmrst-pwrgd { - gpios = <&gpio3 7 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_RSMRST_ODL"; - }; - pch_slp_s0_n: pch-slp-s0-n { - gpios = <&gpioa 1 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S0_L"; - }; - vccpdsw_3p3: vccpdsw-3p3 { - gpios = <&gpio4 5 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_DSW_PWROK"; - }; - pm_slp_sus_ec_n: pm-slp-sus-ec-n { - gpios = <&gpio8 6 GPIO_INPUT>; - enum-name = "GPIO_SLP_SUS_L"; - }; - pm-slp-s3-n { - gpios = <&gpiob 0 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S3_L"; - }; - pm-slp-s4-n { - gpios = <&gpioa 5 GPIO_INPUT>; - }; - volume-up { - gpios = <&gpio6 1 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_UP_L"; - }; - vol-dn-ec { - gpios = <&gpio0 3 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_DOWN_L"; - }; - smc_lid: smc-lid { - gpios = <&gpio0 1 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_LID_OPEN"; - }; - mech_pwr_btn_odl: mech-pwr-btn-odl { - gpios = <&gpio0 0 GPIO_INPUT>; - enum-name = "GPIO_POWER_BUTTON_L"; - }; - std_adp_prsnt: std-adp-prsnt { - gpios = <&gpio0 2 GPIO_INPUT>; - enum-name= "GPIO_DC_JACK_PRESENT"; - }; - bc_acok: bc-acok { - gpios = <&gpioc 6 GPIO_INPUT>; - enum-name = "GPIO_AC_PRESENT"; - }; - usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { - gpios = <&gpio4 0 GPIO_INPUT>; - }; - usbc_tcpc_alrt_p1: usbc-tcpc-alrt-p1 { - gpios = <&gpio6 2 GPIO_INPUT>; - }; - usbc_tcpc_alrt_p2: usbc-tcpc-alrt-p2 { - gpios = <&gpio6 3 GPIO_INPUT>; - }; - usbc_tcpc_alrt_p3: usbc-tcpc-alrt-p3 { - gpios = <&gpio6 7 GPIO_INPUT>; - }; - usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 { - gpios = <&gpiof 0 GPIO_INPUT>; - }; - usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 { - gpios = <&gpiof 1 GPIO_INPUT>; - }; - usbc_tcpc_ppc_alrt_p2: usbc-tcpc-ppc-alrt-p2 { - gpios = <&gpiof 2 GPIO_INPUT>; - }; - usbc_tcpc_ppc_alrt_p3: usbc-tcpc-ppc-alrt-p3 { - gpios = <&gpiof 3 GPIO_INPUT>; - }; - gpio_ec_pch_wake_odl: smc-wake-sci-n-mecc { - gpios = <&gpioa 4 GPIO_ODR_HIGH>; - }; - ec-pch-mkbp-int-odl { - gpios = <&gpiof 5 GPIO_ODR_HIGH>; - }; - lpc-espi-rst-n { - gpios = <&gpio5 4 GPIO_INPUT>; - }; - plt-rst-l { - gpios = <&gpioa 2 GPIO_INPUT>; - }; - slate-mode-indication { - gpios = <&gpioe 5 GPIO_INPUT>; - }; - prochot-ec-n { - gpios = <&gpioa 7 GPIO_INPUT>; - enum-name = "GPIO_CPU_PROCHOT"; - }; - sys-rst-odl { - gpios = <&gpioc 5 GPIO_ODR_HIGH>; - enum-name = "GPIO_SYS_RESET_L"; - }; - pm-rsmrst-n { - gpios = <&gpiod 3 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_RSMRST_L"; - }; - pm-pwrbtn-n { - gpios = <&gpio9 7 GPIO_ODR_HIGH>; - enum-name = "GPIO_PCH_PWRBTN_L"; - }; - ec_spi_oe_mecc: ec-spi-oe-mecc { - gpios = <&gpio6 0 GPIO_OUTPUT_LOW>; - }; - ec-ds3 { - gpios = <&gpioc 4 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_EN_PP3300_A"; - alias = "GPIO_TEMP_SENSOR_POWER"; - }; - pch-pwrok-ec { - gpios = <&gpioa 0 GPIO_INPUT>; - enum-name = "GPIO_PCH_PWROK"; - }; - sys-pwrok { - gpios = <&gpio9 3 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_SYS_PWROK"; - }; - ec-dsw-pwrok { - gpios = <&gpio9 5 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_DSW_PWROK"; - }; - gpio_wp: ec-flash-wp-odl { - gpios = <&gpio9 4 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; - }; - ec-h1-packet-mode { - gpios = <&gpioe 2 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PACKET_MODE_EN"; - }; - ec-entering-rw { - gpios = <&gpiod 4 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_ENTERING_RW"; - }; - ccd_mode_odl: ccd-mode-odl { - gpios = <&gpiof 4 GPIO_INPUT>; - enum-name = "GPIO_CCD_MODE_ODL"; - }; - bat-det { - gpios = <&gpio7 6 GPIO_INPUT>; - enum-name = "GPIO_BATT_PRES_ODL"; - }; - edp-bklt-en-mecc { - gpios = <&gpioe 1 GPIO_OUTPUT_HIGH>; - }; - led_red_l: led-1-l { - gpios = <&gpiob 6 GPIO_OUTPUT_HIGH>; - }; - led_white_l: led-2-l { - gpios = <&gpiob 7 GPIO_OUTPUT_HIGH>; - }; - gpio_fan_control: therm-sen-mecc { - gpios = <&gpioc 0 GPIO_OUTPUT_LOW>; - }; - smb-bs-clk { - gpios = <&gpiob 3 GPIO_INPUT>; - }; - smb-bs-data { - gpios = <&gpiob 2 GPIO_INPUT>; - }; - usbc-tcpc-i2c-clk-p0 { - gpios = <&gpiob 5 GPIO_INPUT>; - }; - usbc-tcpc-i2c-data-p0 { - gpios = <&gpiob 4 GPIO_INPUT>; - }; - usbc-tcpc-i2c-clk-p2 { - gpios = <&gpio9 2 GPIO_INPUT>; - }; - usbc-tcpc-i2c-data-p2 { - gpios = <&gpio9 1 GPIO_INPUT>; - }; - usbc-tcpc-i2c-clk-p1 { - gpios = <&gpio9 0 GPIO_INPUT>; - }; - usbc-tcpc-i2c-data-p1 { - gpios = <&gpio8 7 GPIO_INPUT>; - }; - usbc-tcpc-i2c-clk-p3 { - gpios = <&gpiod 1 GPIO_INPUT>; - }; - usbc-tcpc-i2c-data-p3 { - gpios = <&gpiod 0 GPIO_INPUT>; - }; - sml1-clk-mecc { - gpios = <&gpio3 3 GPIO_INPUT>; - }; - sml1-data-mecc { - gpios = <&gpio3 6 GPIO_INPUT>; - }; - smb-pch-clk { - gpios = <&gpioc 2 GPIO_INPUT>; - }; - smb-pch-data { - gpios = <&gpioc 1 GPIO_INPUT>; - }; - i3c-0-scl { - gpios = <&gpioe 4 GPIO_INPUT>; - }; - i3c-0-sda { - gpios = <&gpioe 3 GPIO_INPUT>; - }; - cpu-cat-err-mecc { - gpios = <&gpio3 4 GPIO_INPUT>; - }; - tp29 { - gpios = <&gpio5 0 GPIO_INPUT>; - }; - tp28 { - gpios = <&gpio5 6 GPIO_INPUT>; - }; - espi-alert0-n { - gpios = <&gpio5 7 GPIO_INPUT>; - }; - batt-disable-ec { - gpios = <&gpio6 6 GPIO_INPUT>; - }; - tp33 { - gpios = <&gpio7 2 GPIO_INPUT>; - }; - tp26 { - gpios = <&gpio7 3 GPIO_INPUT>; - }; - slp-s0-cs-n { - gpios = <&gpio7 4 GPIO_INPUT>; - }; - ec-peci { - gpios = <&gpio8 1 GPIO_INPUT>; - }; - cpu-c10-gate-mecc { - gpios = <&gpio9 6 GPIO_INPUT>; - }; - smb-pch-alrt { - gpios = <&gpioa 3 GPIO_INPUT>; - }; - smc-sdown-mecc { - gpios = <&gpiob 1 GPIO_INPUT>; - }; - std-adpt-cntrl-gpio { - gpios = <&gpioc 3 GPIO_INPUT>; - }; - sml1-alert { - gpios = <&gpioc 7 GPIO_INPUT>; - }; - smc-onoff-n { - gpios = <&gpiod 2 GPIO_INPUT>; - }; - suswarn { - gpios = <&gpiod 5 GPIO_INPUT>; - }; - tp-gpiod6-ec { - gpios = <&gpiod 6 GPIO_INPUT>; - }; - tp-gpiod7-ec { - gpios = <&gpiod 7 GPIO_INPUT>; - }; - me-g3-to-m3-ec { - gpios = <&gpioe 0 GPIO_INPUT>; - }; - gpio_ec_kso_02_inv: ec-kso-02-inv { - gpios = <&gpio1 7 (GPIO_OUTPUT_LOW | GPIO_ACTIVE_LOW)>; - }; - - usb_c0_bb_retimer_rst: usb-c0-bb-retimer-rst { - gpios = <&ioex_c0_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_BB_RETIMER_RST"; - }; - usb_c0_bb_retimer_ls_en: usb-c0-bb-retimer-ls-en { - gpios = <&ioex_c0_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_BB_RETIMER_LS_EN"; - }; - usb-c0-usb-mux-cntrl-1 { - gpios = <&ioex_c0_port 4 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_USB_MUX_CNTRL_1"; - }; - usb-c0-usb-mux-cntrl-0 { - gpios = <&ioex_c0_port 5 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_USB_MUX_CNTRL_0"; - }; - usb_c1_bb_retimer_rst: usb-c1-bb-retimer-rst { - gpios = <&ioex_c1_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_BB_RETIMER_RST"; - }; - usb_c1_bb_retimer_ls_en: usb-c1-bb-retimer-ls-en { - gpios = <&ioex_c1_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_BB_RETIMER_LS_EN"; - }; - usb-c1-hpd { - gpios = <&ioex_c1_port 2 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_HPD"; - }; - usb-c0-c1-oc { - gpios = <&ioex_c1_port 8 GPIO_OUTPUT_HIGH>; - enum-name = "IOEX_USB_C0_C1_OC"; - }; - usb_c2_bb_retimer_rst: usb-c2-bb-retimer-rst { - gpios = <&ioex_c2_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C2_BB_RETIMER_RST"; - }; - usb_c2_bb_retimer_ls_en: usb-c2-bb-retimer-ls-en { - gpios = <&ioex_c2_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C2_BB_RETIMER_LS_EN"; - }; - usb-c2-usb-mux-cntrl-1 { - gpios = <&ioex_c2_port 4 GPIO_OUTPUT_LOW>; - }; - usb-c2-usb-mux-cntrl-0 { - gpios = <&ioex_c2_port 5 GPIO_OUTPUT_LOW>; - }; - usb_c3_bb_retimer_rst: usb-c3-bb-retimer-rst { - gpios = <&ioex_c3_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C3_BB_RETIMER_RST"; - }; - usb_c3_bb_retimer_ls_en: usb-c3-bb-retimer-ls-en { - gpios = <&ioex_c3_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C3_BB_RETIMER_LS_EN"; - }; - usb-c2-c3-oc { - gpios = <&ioex_c3_port 8 GPIO_OUTPUT_HIGH>; - enum-name = "IOEX_USB_C2_C3_OC"; - }; - /* unimplemented GPIOs */ - en-pp5000 { - enum-name = "GPIO_EN_PP5000"; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/interrupts.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/interrupts.dts deleted file mode 100644 index d7bb40fad2..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/interrupts.dts +++ /dev/null @@ -1,100 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/ { - gpio-interrupts { - compatible = "cros-ec,gpio-interrupts"; - - int_lid_open: lid-open { - irq-pin = <&smc_lid>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "lid_interrupt"; - }; - int_power_button: power-button { - irq-pin = <&mech_pwr_btn_odl>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_button_interrupt"; - }; - int_ac_present: ac-present { - irq-pin = <&bc_acok>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "extpower_interrupt"; - }; - int_slp_s0: slp-s0 { - irq-pin = <&pch_slp_s0_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_slp_sus: slp-sus { - irq-pin = <&pm_slp_sus_ec_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_pg_dsw_pwrok: pg-dsw-pwrok { - irq-pin = <&vccpdsw_3p3>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_rsmrst_pwrgd: rsmrst-pwrgd { - irq-pin = <&rsmrst_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_all_sys_pwrgd: all-sys-pwrgd { - irq-pin = <&all_sys_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { - irq-pin = <&usbc_tcpc_alrt_p0>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_alrt_p1: usbc-tcpc-alrt-p1 { - irq-pin = <&usbc_tcpc_alrt_p1>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_alrt_p2: usbc-tcpc-alrt-p2 { - irq-pin = <&usbc_tcpc_alrt_p2>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_alrt_p3: usbc-tcpc-alrt-p3 { - irq-pin = <&usbc_tcpc_alrt_p3>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 { - irq-pin = <&usbc_tcpc_ppc_alrt_p0>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 { - irq-pin = <&usbc_tcpc_ppc_alrt_p1>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_usbc_tcpc_ppc_alrt_p2: usbc-tcpc-ppc-alrt-p2 { - irq-pin = <&usbc_tcpc_ppc_alrt_p2>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_usbc_tcpc_ppc_alrt_p3: usbc-tcpc-ppc-alrt-p3 { - irq-pin = <&usbc_tcpc_ppc_alrt_p3>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_std_adp_prsnt: std-adp-prsnt { - irq-pin = <&std_adp_prsnt>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "board_dc_jack_interrupt"; - }; - int_ccd_mode_odl: ccd-mode-odl { - irq-pin = <&ccd_mode_odl>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "board_connect_c0_sbu"; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/keyboard.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/keyboard.dts deleted file mode 100644 index 81d6e82f48..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/keyboard.dts +++ /dev/null @@ -1,59 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - cros-keyscan { - compatible = "cros-keyscan"; - - output-settle = <35>; - debounce-down = <5000>; - debounce-up = <40000>; - poll-timeout = <100000>; - - actual-key-mask = < - 0x14 /* C0 */ - 0xff /* C1 */ - 0xff /* C2 */ - 0xff /* C3 */ - 0xff /* C4 */ - 0xf5 /* C5 */ - 0xff /* C6 */ - 0xa4 /* C7 */ - 0xff /* C8 */ - 0xfe /* C9 */ - 0x55 /* C10 */ - 0xfa /* C11 */ - 0xca /* C12 */ - >; - }; -}; - -&cros_kb_raw { - status = "okay"; - /* No KSO2 (it's inverted and implemented by GPIO) */ - pinctrl-0 = < - &ksi0_gp31 - &ksi1_gp30 - &ksi2_gp27 - &ksi3_gp26 - &ksi4_gp25 - &ksi5_gp24 - &ksi6_gp23 - &ksi7_gp22 - &kso00_gp21 - &kso01_gp20 - &kso03_gp16 - &kso04_gp15 - &kso05_gp14 - &kso06_gp13 - &kso07_gp12 - &kso08_gp11 - &kso09_gp10 - &kso10_gp07 - &kso11_gp06 - &kso12_gp05 - >; - pinctrl-names = "default"; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/prj.conf b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/prj.conf deleted file mode 100644 index 2c98fd9330..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/prj.conf +++ /dev/null @@ -1,24 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -CONFIG_BOARD_ADLRVP_NPCX=y -CONFIG_CROS_FLASH_NPCX=y -CONFIG_CROS_SYSTEM_NPCX=y -CONFIG_SYSCON=y - -# Charger -CONFIG_PLATFORM_EC_DEDICATED_CHARGE_PORT=y - -# FAN -CONFIG_TACH_NPCX=y - -# Keyboard -CONFIG_CROS_KB_RAW_NPCX=y - -# PWM -CONFIG_PWM=y -CONFIG_PWM_SHELL=n - -# RTC -CONFIG_PLATFORM_EC_RTC=y diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/pwm_leds.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/pwm_leds.dts deleted file mode 100644 index eb1576dbff..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/pwm_leds.dts +++ /dev/null @@ -1,57 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - pwmleds { - compatible = "pwm-leds"; - pwm_led0: pwm_led_0 { - pwms = <&pwm4 0 PWM_HZ(4800) PWM_POLARITY_INVERTED>; - }; - pwm_led1: pwm_led_1 { - pwms = <&pwm5 0 PWM_HZ(4800) PWM_POLARITY_INVERTED>; - }; - }; - - cros-pwmleds { - compatible = "cros-ec,pwm-leds"; - - leds = <&pwm_led0 &pwm_led1>; - - color-map-green = <100>; - - /* brightness-range = <red green blue yellow white amber> */ - brightness-range = <0 100 0 0 0 0>; - - - #address-cells = <1>; - #size-cells = <0>; - - pwm_led_0@0 { - reg = <0>; - ec-led-name = "EC_LED_ID_BATTERY_LED"; - }; - - pwm_led_1@1 { - reg = <1>; - ec-led-name = "EC_LED_ID_POWER_LED"; - }; - }; -}; - -/* LED1 */ -&pwm4 { - status = "okay"; - clock-bus = "NPCX_CLOCK_BUS_LFCLK"; - pinctrl-0 = <&pwm4_gpb6>; - pinctrl-names = "default"; -}; - -/* LED2 */ -&pwm5 { - status = "okay"; - clock-bus = "NPCX_CLOCK_BUS_LFCLK"; - pinctrl-0 = <&pwm5_gpb7>; - pinctrl-names = "default"; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/temp_sensor.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/temp_sensor.dts deleted file mode 100644 index 93ecaa02f6..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/temp_sensor.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <cros/thermistor/thermistor.dtsi> - -/ { - temp_ambient: ambient { - compatible = "cros-ec,temp-sensor-thermistor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - adc = <&adc_ambient>; - }; - temp_ddr: ddr { - compatible = "cros-ec,temp-sensor-thermistor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - adc = <&adc_ddr>; - }; - temp_skin: skin { - compatible = "cros-ec,temp-sensor-thermistor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - adc = <&adc_skin>; - }; - temp_vr: vr { - compatible = "cros-ec,temp-sensor-thermistor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - adc = <&adc_vr>; - }; - - named-temp-sensors { - compatible = "cros-ec,temp-sensors"; - ambient { - temp_fan_off = <15>; - temp_fan_max = <50>; - temp_host_high = <75>; - temp_host_halt = <80>; - temp_host_release_high = <65>; - sensor = <&temp_ambient>; - }; - - /* - * TDB: battery temp read api is not using thermistor and - * zephyr shim layer doesn't support to configure custom read - * function. - * - * battery { - * compatible = "cros-ec,temp-sensor-thermistor", - * "cros-ec,temp-sensor"; - * thermistor = < >; - * enum-name = ""; - * temp_fan_off = <15>; - * temp_fan_max = <50>; - * temp_host_high = <75>; - * temp_host_halt = <80>; - * temp_host_release_high = <65>; - * adc = <&adc_battery>; - * }; - */ - - ddr { - temp_fan_off = <15>; - temp_fan_max = <50>; - temp_host_high = <75>; - temp_host_halt = <80>; - temp_host_release_high = <65>; - sensor = <&temp_ddr>; - }; - skin { - temp_fan_off = <15>; - temp_fan_max = <50>; - temp_host_high = <75>; - temp_host_halt = <80>; - temp_host_release_high = <65>; - sensor = <&temp_skin>; - }; - vr { - temp_fan_off = <15>; - temp_fan_max = <50>; - temp_host_high = <75>; - temp_host_halt = <80>; - temp_host_release_high = <65>; - sensor = <&temp_vr>; - }; - }; -}; - -&thermistor_3V0_22K6_47K_4050B { - status = "okay"; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts deleted file mode 100644 index 471a1f52e9..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - usbc { - #address-cells = <1>; - #size-cells = <0>; - usbc_port0: port0@0 { - compatible = "named-usbc-port"; - reg = <0>; - tcpc = <&tcpc_port0>; - chg = <&charger>; - usb_mux_chain_0: usb-mux-chain-0 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c0_bb_retimer - &virtual_mux_c0>; - }; - usb_mux_alt_chain_0: usb-mux-alt-chain-0 { - compatible = "cros-ec,usb-mux-chain"; - alternative-chain; - usb-muxes = <&usb_c0_bb_retimer - &usb_c0_soc_side_bb_retimer - &virtual_mux_c0>; - }; - }; - port0-muxes { - virtual_mux_c0: virtual-mux-c0 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - usbc_port1: port1@1 { - compatible = "named-usbc-port"; - reg = <1>; - tcpc = <&tcpc_port1>; - usb_mux_chain_1: usb-mux-chain-1 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c1_bb_retimer - &virtual_mux_c1>; - }; - usb_mux_alt_chain_1: usb-mux-alt-chain-1 { - compatible = "cros-ec,usb-mux-chain"; - alternative-chain; - usb-muxes = <&usb_c1_bb_retimer - &usb_c1_soc_side_bb_retimer - &virtual_mux_c1>; - }; - }; - port1-muxes { - virtual_mux_c1: virtual-mux-c1 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - port2@2 { - compatible = "named-usbc-port"; - reg = <2>; - tcpc = <&tcpc_port2>; - usb_mux_chain_2: usb-mux-chain-2 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c2_bb_retimer - &virtual_mux_c2>; - }; - }; - port2-muxes { - virtual_mux_c2: virtual-mux-c2 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - port3@3 { - compatible = "named-usbc-port"; - reg = <3>; - tcpc = <&tcpc_port3>; - usb_mux_chain_3: usb-mux-chain-3 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c3_bb_retimer - &virtual_mux_c3>; - }; - }; - port3-muxes { - virtual_mux_c3: virtual-mux-c3 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/battery.dts b/zephyr/projects/intelrvp/adlrvp/battery.dts deleted file mode 100644 index 1de4111791..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/battery.dts +++ /dev/null @@ -1,20 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - aliases { - getac-3s = &default_battery; - getac-2s = &getac_smp_hhp_408_2s; - }; - - batteries { - default_battery: getac-smp-hhp-408-3s { - compatible = "getac,bq40z50-R3-S3", "battery-smart"; - }; - getac_smp_hhp_408_2s: getac-smp-hhp-408-2s { - compatible = "getac,bq40z50-R3-S2", "battery-smart"; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/include/adlrvp_zephyr.h b/zephyr/projects/intelrvp/adlrvp/include/adlrvp_zephyr.h deleted file mode 100644 index 135fd4ef4f..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/include/adlrvp_zephyr.h +++ /dev/null @@ -1,58 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel ADL-RVP specific configuration */ - -#ifndef __ADLRVP_BOARD_H -#define __ADLRVP_BOARD_H - -#include "config.h" - -#define I2C_ADDR_FUSB302_TCPC_AIC 0x22 -#define I2C_ADDR_SN5S330_TCPC_AIC_PPC 0x40 - -#define I2C_ADDR_PCA9675_TCPC_AIC_IOEX 0x21 - -/* SOC side BB retimers (dual retimer config) */ -#define I2C_PORT0_BB_RETIMER_SOC_ADDR 0x54 -#if defined(HAS_TASK_PD_C1) -#define I2C_PORT1_BB_RETIMER_SOC_ADDR 0x55 -#endif - -#define ADLM_LP4_RVP1_SKU_BOARD_ID 0x01 -#define ADLM_LP5_RVP2_SKU_BOARD_ID 0x02 -#define ADLM_LP5_RVP3_SKU_BOARD_ID 0x03 -#define ADLN_LP5_ERB_SKU_BOARD_ID 0x06 -#define ADLN_LP5_RVP_SKU_BOARD_ID 0x07 -#define ADLP_DDR5_RVP_SKU_BOARD_ID 0x12 -#define ADLP_LP5_T4_RVP_SKU_BOARD_ID 0x13 -#define ADL_RVP_BOARD_ID(id) ((id)&0x3F) - -#define CONFIG_BATTERY_TYPE_NO_AUTO_DETECT - -enum adlrvp_charge_ports { - TYPE_C_PORT_0, -#if defined(HAS_TASK_PD_C1) - TYPE_C_PORT_1, -#endif -#if defined(HAS_TASK_PD_C2) - TYPE_C_PORT_2, -#endif -#if defined(HAS_TASK_PD_C3) - TYPE_C_PORT_3, -#endif -}; - -enum ioex_port { - IOEX_C0_PCA9675, - IOEX_C1_PCA9675, -#if defined(HAS_TASK_PD_C2) - IOEX_C2_PCA9675, - IOEX_C3_PCA9675, -#endif - IOEX_PORT_COUNT -}; - -#endif /* __ADLRVP_BOARD_H */ diff --git a/zephyr/projects/intelrvp/adlrvp/ioex.dts b/zephyr/projects/intelrvp/adlrvp/ioex.dts deleted file mode 100644 index 3e2227dacb..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/ioex.dts +++ /dev/null @@ -1,78 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - /* IOEX_C0_PCA9675 */ - ioex-c0 { - compatible = "cros,ioex-chip"; - i2c-port = <&typec_0>; - i2c-addr = <0x21>; - drv = "pca9675_ioexpander_drv"; - flags = <0x00>; - #address-cells = <1>; - #size-cells = <0>; - ioex_c0_port: ioex-c0-port@0 { - compatible = "cros,ioex-port"; - reg = <0>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - }; - - /* IOEX_C1_PCA9675 */ - ioex-c1 { - compatible = "cros,ioex-chip"; - i2c-port = <&typec_1>; - i2c-addr = <0x21>; - drv = "pca9675_ioexpander_drv"; - flags = <0x00>; - #address-cells = <1>; - #size-cells = <0>; - ioex_c1_port: ioex-c1-port@0 { - compatible = "cros,ioex-port"; - reg = <0>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - }; - - /* IOEX_C2_PCA9675 */ - ioex-c2 { - compatible = "cros,ioex-chip"; - i2c-port = <&typec_2>; - i2c-addr = <0x21>; - drv = "pca9675_ioexpander_drv"; - flags = <0x00>; - #address-cells = <1>; - #size-cells = <0>; - ioex_c2_port: ioex-c2-port@0 { - compatible = "cros,ioex-port"; - reg = <0>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - }; - - /* IOEX_C3_PCA9675 */ - ioex-c3 { - compatible = "cros,ioex-chip"; - i2c-port = <&typec_3>; - i2c-addr = <0x21>; - drv = "pca9675_ioexpander_drv"; - flags = <0x00>; - #address-cells = <1>; - #size-cells = <0>; - ioex_c3_port: ioex-c3-port@0 { - compatible = "cros,ioex-port"; - reg = <0>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/prj.conf b/zephyr/projects/intelrvp/adlrvp/prj.conf deleted file mode 100644 index 4bcee4a953..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/prj.conf +++ /dev/null @@ -1,76 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# Power Sequencing -CONFIG_AP_X86_INTEL_TGL=y -CONFIG_PLATFORM_EC_POWERSEQ_SLP_S3_L_OVERRIDE=n -CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n -CONFIG_PLATFORM_EC_POWERSEQ_ICELAKE=y - -# Battery -CONFIG_PLATFORM_EC_BATTERY_TYPE_NO_AUTO_DETECT=y -CONFIG_PLATFORM_EC_BATTERY_V2=y - -# BC1.2 -CONFIG_PLATFORM_EC_USB_CHARGER=n - -# CBI -CONFIG_EEPROM=y -CONFIG_EEPROM_AT24=y -CONFIG_EEPROM_SHELL=n -CONFIG_PLATFORM_EC_CBI_EEPROM=y - -# Charger -CONFIG_PLATFORM_EC_CHARGER=y -CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y -CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=5 -CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=10 -CONFIG_PLATFORM_EC_CHARGE_RAMP_HW=n -CONFIG_PLATFORM_EC_CHARGER_BQ25720=y -CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_CUSTOM=y -CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_DV=70 -CONFIG_PLATFORM_EC_CHARGER_ISL9241=y -CONFIG_PLATFORM_EC_CHARGER_RUNTIME_CONFIG=y - -# LED -CONFIG_PLATFORM_EC_LED_COMMON=y -CONFIG_PLATFORM_EC_LED_PWM=y -CONFIG_PLATFORM_EC_LED_PWM_TASK_DISABLED=y - -# Temperature sensors -CONFIG_PLATFORM_EC_TEMP_SENSOR=y -CONFIG_PLATFORM_EC_THERMISTOR=y -CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=y - -# USB-C and PD -CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y -CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE=n -CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_TCPC=y -CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n -CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB_RUNTIME_CONFIG=n -CONFIG_PLATFORM_EC_USB_MUX_TUSB1044=y -CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y -CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y -CONFIG_PLATFORM_EC_USB_PD_REV30=y -CONFIG_PLATFORM_EC_USB_PD_USB32_DRD=y -CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=y -CONFIG_PLATFORM_EC_USB_PD_USB4=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_FUSB302=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC=y -CONFIG_PLATFORM_EC_USBC_PPC_SN5S330=y -CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB=y - -# IOEX -CONFIG_PLATFORM_EC_IOEX_CROS_DRV=y -CONFIG_PLATFORM_EC_IOEX_PCA9675=y -CONFIG_GPIO_PCA95XX=y - -# 7-Segment Display -CONFIG_PLATFORM_EC_MAX695X_SEVEN_SEGMENT_DISPLAY=y - -# eSPI -CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US=150 diff --git a/zephyr/projects/intelrvp/adlrvp/src/adlrvp.c b/zephyr/projects/intelrvp/adlrvp/src/adlrvp.c deleted file mode 100644 index ce5196c60d..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/src/adlrvp.c +++ /dev/null @@ -1,430 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* TODO: b/218904113: Convert to using Zephyr GPIOs */ -#include "gpio_signal.h" -#include "adlrvp_zephyr.h" -#include "common.h" -#include "console.h" -#include "intelrvp.h" -#include "intel_rvp_board_id.h" -#include "battery_fuel_gauge.h" -#include "charger.h" -#include "battery.h" -#include "bq25710.h" -#include "driver/retimer/bb_retimer_public.h" -#include "extpower.h" -#include "hooks.h" -#include "ioexpander.h" -#include "isl9241.h" -#include "power/icelake.h" -#include "sn5s330.h" -#include "system.h" -#include "task.h" -#include "tusb1064.h" -#include "usb_mux.h" -#include "usbc/usb_muxes.h" -#include "usbc_ppc.h" -#include "util.h" - -#define CPRINTF(format, args...) cprintf(CC_COMMAND, format, ##args) -#define CPRINTS(format, args...) cprints(CC_COMMAND, format, ##args) - -/* TCPC AIC GPIO Configuration */ -const struct tcpc_aic_gpio_config_t tcpc_aic_gpios[] = { - [TYPE_C_PORT_0] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p0)), - .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p0)), - .ppc_intr_handler = sn5s330_interrupt, - }, -#if defined(HAS_TASK_PD_C1) - [TYPE_C_PORT_1] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p1)), - .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p1)), - .ppc_intr_handler = sn5s330_interrupt, - }, -#endif -#if defined(HAS_TASK_PD_C2) - [TYPE_C_PORT_2] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p2)), - .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p2)), - .ppc_intr_handler = sn5s330_interrupt, - }, -#endif -#if defined(HAS_TASK_PD_C3) - [TYPE_C_PORT_3] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p3)), - .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p3)), - .ppc_intr_handler = sn5s330_interrupt, - }, -#endif -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_aic_gpios) == CONFIG_USB_PD_PORT_MAX_COUNT); - -/* USB-C PPC configuration */ -struct ppc_config_t ppc_chips[] = { - [TYPE_C_PORT_0] = { - .i2c_port = I2C_PORT_TYPEC_0, - .i2c_addr_flags = I2C_ADDR_SN5S330_TCPC_AIC_PPC, - .drv = &sn5s330_drv, - }, -#if defined(HAS_TASK_PD_C1) - [TYPE_C_PORT_1] = { - .i2c_port = I2C_PORT_TYPEC_1, - .i2c_addr_flags = I2C_ADDR_SN5S330_TCPC_AIC_PPC, - .drv = &sn5s330_drv - }, -#endif -#if defined(HAS_TASK_PD_C2) - [TYPE_C_PORT_2] = { - .i2c_port = I2C_PORT_TYPEC_2, - .i2c_addr_flags = I2C_ADDR_SN5S330_TCPC_AIC_PPC, - .drv = &sn5s330_drv, - }, -#endif -#if defined(HAS_TASK_PD_C3) - [TYPE_C_PORT_3] = { - .i2c_port = I2C_PORT_TYPEC_3, - .i2c_addr_flags = I2C_ADDR_SN5S330_TCPC_AIC_PPC, - .drv = &sn5s330_drv, - }, -#endif -}; -BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == CONFIG_USB_PD_PORT_MAX_COUNT); -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/* Cache BB retimer power state */ -static bool cache_bb_enable[CONFIG_USB_PD_PORT_MAX_COUNT]; - -void board_overcurrent_event(int port, int is_overcurrented) -{ - /* Port 0 & 1 and 2 & 3 share same line for over current indication */ -#if defined(HAS_TASK_PD_C2) - enum ioex_signal oc_signal = port < TYPE_C_PORT_2 ? IOEX_USB_C0_C1_OC : - IOEX_USB_C2_C3_OC; -#else - enum ioex_signal oc_signal = IOEX_USB_C0_C1_OC; -#endif - - /* Overcurrent indication is active low signal */ - ioex_set_level(oc_signal, is_overcurrented ? 0 : 1); -} - -__override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) -{ - /* - * ADL-P-DDR5 RVP SKU has cascaded retimer topology. - * Ports with cascaded retimers share common load switch and reset pin - * hence no need to set the power state again if the 1st retimer's power - * status has already changed. - */ - if (cache_bb_enable[me->usb_port] == enable) - return EC_SUCCESS; - - cache_bb_enable[me->usb_port] = enable; - - /* Handle retimer's power domain.*/ - if (enable) { - ioex_set_level(bb_controls[me->usb_port].usb_ls_en_gpio, 1); - - /* - * minimum time from VCC to RESET_N de-assertion is 100us - * For boards that don't provide a load switch control, the - * retimer_init() function ensures power is up before calling - * this function. - */ - msleep(1); - ioex_set_level(bb_controls[me->usb_port].retimer_rst_gpio, 1); - - /* - * Allow 1ms time for the retimer to power up lc_domain - * which powers I2C controller within retimer - */ - msleep(1); - - } else { - ioex_set_level(bb_controls[me->usb_port].retimer_rst_gpio, 0); - msleep(1); - ioex_set_level(bb_controls[me->usb_port].usb_ls_en_gpio, 0); - } - return EC_SUCCESS; -} - -static void board_connect_c0_sbu_deferred(void) -{ - int ccd_intr_level = gpio_get_level(GPIO_CCD_MODE_ODL); - - if (ccd_intr_level) { - /* Default set the SBU lines to AUX mode on TCPC-AIC */ - ioex_set_level(IOEX_USB_C0_USB_MUX_CNTRL_1, 0); - ioex_set_level(IOEX_USB_C0_USB_MUX_CNTRL_0, 0); - } else { - /* Set the SBU lines to CCD mode on TCPC-AIC */ - ioex_set_level(IOEX_USB_C0_USB_MUX_CNTRL_1, 1); - ioex_set_level(IOEX_USB_C0_USB_MUX_CNTRL_0, 0); - } -} -DECLARE_DEFERRED(board_connect_c0_sbu_deferred); - -void board_connect_c0_sbu(enum gpio_signal s) -{ - hook_call_deferred(&board_connect_c0_sbu_deferred_data, 0); -} - -static void enable_h1_irq(void) -{ - gpio_enable_interrupt(GPIO_CCD_MODE_ODL); -} -DECLARE_HOOK(HOOK_INIT, enable_h1_irq, HOOK_PRIO_LAST); - -void set_charger_system_voltage(void) -{ - switch (ADL_RVP_BOARD_ID(board_get_version())) { - case ADLN_LP5_ERB_SKU_BOARD_ID: - case ADLN_LP5_RVP_SKU_BOARD_ID: - /* - * As per b:196184163 configure the PPVAR_SYS depend - * on AC or AC+battery - */ - if (extpower_is_present() && battery_is_present()) { - bq25710_set_min_system_voltage( - CHARGER_SOLO, battery_get_info()->voltage_min); - } else { - bq25710_set_min_system_voltage( - CHARGER_SOLO, battery_get_info()->voltage_max); - } - break; - - /* Add additional board SKUs */ - default: - break; - } -} -DECLARE_HOOK(HOOK_AC_CHANGE, set_charger_system_voltage, HOOK_PRIO_DEFAULT); - -static void configure_charger(void) -{ - switch (ADL_RVP_BOARD_ID(board_get_version())) { - case ADLN_LP5_ERB_SKU_BOARD_ID: - case ADLN_LP5_RVP_SKU_BOARD_ID: - /* charger chip BQ25720 support */ - chg_chips[0].i2c_addr_flags = BQ25710_SMBUS_ADDR1_FLAGS; - chg_chips[0].drv = &bq25710_drv; - set_charger_system_voltage(); - break; - - /* Add additional board SKUs */ - default: - break; - } -} - -static void configure_retimer_usbmux(void) -{ - struct usb_mux *mux; - - switch (ADL_RVP_BOARD_ID(board_get_version())) { - case ADLN_LP5_ERB_SKU_BOARD_ID: - case ADLN_LP5_RVP_SKU_BOARD_ID: - /* enable TUSB1044RNQR redriver on Port0 */ - mux = USB_MUX_POINTER(DT_NODELABEL(usb_mux_chain_0), 0); - mux->i2c_addr_flags = TUSB1064_I2C_ADDR14_FLAGS; - mux->driver = &tusb1064_usb_mux_driver; - mux->hpd_update = tusb1044_hpd_update; - -#if defined(HAS_TASK_PD_C1) - mux = USB_MUX_POINTER(DT_NODELABEL(usb_mux_chain_1), 0); - mux->driver = NULL; - mux->hpd_update = NULL; -#endif - break; - - case ADLP_LP5_T4_RVP_SKU_BOARD_ID: - /* No retimer on Port-2 */ -#if defined(HAS_TASK_PD_C2) - mux = USB_MUX_POINTER(DT_NODELABEL(usb_mux_chain_2), 0); - mux->driver = NULL; -#endif - break; - - case ADLP_DDR5_RVP_SKU_BOARD_ID: - /* - * ADL-P-DDR5 RVP has dual BB-retimers for port0 & port1. - * Change the default usb mux config on runtime to support - * dual retimer topology. - */ - USB_MUX_ENABLE_ALTERNATIVE(usb_mux_alt_chain_0); -#if defined(HAS_TASK_PD_C1) - USB_MUX_ENABLE_ALTERNATIVE(usb_mux_alt_chain_1); -#endif - break; - - /* Add additional board SKUs */ - - default: - break; - } -} - -static void configure_battery_type(void) -{ - int bat_cell_type; - - switch (ADL_RVP_BOARD_ID(board_get_version())) { - case ADLM_LP4_RVP1_SKU_BOARD_ID: - case ADLM_LP5_RVP2_SKU_BOARD_ID: - case ADLM_LP5_RVP3_SKU_BOARD_ID: - case ADLN_LP5_ERB_SKU_BOARD_ID: - case ADLN_LP5_RVP_SKU_BOARD_ID: - /* configure Battery to 2S based */ - bat_cell_type = BATTERY_TYPE(DT_ALIAS(getac_2s)); - break; - default: - /* configure Battery to 3S based */ - bat_cell_type = BATTERY_TYPE(DT_ALIAS(getac_3s)); - break; - } - - /* Set the fixed battery type */ - battery_set_fixed_battery_type(bat_cell_type); -} -/******************************************************************************/ -/* PWROK signal configuration */ -/* - * On ADLRVP, SYS_PWROK_EC is an output controlled by EC and uses ALL_SYS_PWRGD - * as input. - */ -const struct intel_x86_pwrok_signal pwrok_signal_assert_list[] = { - { - .gpio = GPIO_PCH_SYS_PWROK, - .delay_ms = 3, - }, -}; -const int pwrok_signal_assert_count = ARRAY_SIZE(pwrok_signal_assert_list); - -const struct intel_x86_pwrok_signal pwrok_signal_deassert_list[] = { - { - .gpio = GPIO_PCH_SYS_PWROK, - }, -}; -const int pwrok_signal_deassert_count = ARRAY_SIZE(pwrok_signal_deassert_list); - -/* - * Returns board information (board id[7:0] and Fab id[15:8]) on success - * -1 on error. - */ -__override int board_get_version(void) -{ - /* Cache the board ID */ - static int adlrvp_board_id; - - int i; - int rv = EC_ERROR_UNKNOWN; - - int fab_id, board_id, bom_id; - - /* Board ID is already read */ - if (adlrvp_board_id) - return adlrvp_board_id; - - /* - * IOExpander that has Board ID information is on DSW-VAL rail on - * ADL RVP. On cold boot cycles, DSW-VAL rail is taking time to settle. - * This loop retries to ensure rail is settled and read is successful - */ - for (i = 0; i < RVP_VERSION_READ_RETRY_CNT; i++) { - rv = gpio_pin_get_dt(&bom_id_config[0]); - - if (rv >= 0) - break; - - k_msleep(1); - } - - /* retrun -1 if failed to read board id */ - if (rv < 0) - return -1; - - /* - * BOM ID [2] : IOEX[0] - * BOM ID [1:0] : IOEX[15:14] - */ - bom_id = gpio_pin_get_dt(&bom_id_config[0]) << 2; - bom_id |= gpio_pin_get_dt(&bom_id_config[1]) << 1; - bom_id |= gpio_pin_get_dt(&bom_id_config[2]); - - /* - * FAB ID [1:0] : IOEX[2:1] + 1 - */ - fab_id = gpio_pin_get_dt(&fab_id_config[0]) << 1; - fab_id |= gpio_pin_get_dt(&fab_id_config[1]); - fab_id += 1; - - /* - * BOARD ID[5:0] : IOEX[13:8] - */ - board_id = gpio_pin_get_dt(&board_id_config[0]) << 5; - board_id |= gpio_pin_get_dt(&board_id_config[1]) << 4; - board_id |= gpio_pin_get_dt(&board_id_config[2]) << 3; - board_id |= gpio_pin_get_dt(&board_id_config[3]) << 2; - board_id |= gpio_pin_get_dt(&board_id_config[4]) << 1; - board_id |= gpio_pin_get_dt(&board_id_config[5]); - - CPRINTF("BID:0x%x, FID:0x%x, BOM:0x%x", board_id, fab_id, bom_id); - - adlrvp_board_id = board_id | (fab_id << 8); - return adlrvp_board_id; -} - -__override bool board_is_tbt_usb4_port(int port) -{ - bool tbt_usb4 = true; - - switch (ADL_RVP_BOARD_ID(board_get_version())) { - case ADLN_LP5_ERB_SKU_BOARD_ID: - case ADLN_LP5_RVP_SKU_BOARD_ID: - /* No retimer on both ports */ - tbt_usb4 = false; - break; - - case ADLP_LP5_T4_RVP_SKU_BOARD_ID: - /* No retimer on Port-2 hence no platform level AUX & LSx mux */ -#if defined(HAS_TASK_PD_C2) - if (port == TYPE_C_PORT_2) - tbt_usb4 = false; -#endif - break; - - /* Add additional board SKUs */ - default: - break; - } - - return tbt_usb4; -} - -static int board_pre_task_peripheral_init(const struct device *unused) -{ - ARG_UNUSED(unused); - - /* Initialized IOEX-0 to access IOEX-GPIOs needed pre-task */ - ioex_init(IOEX_C0_PCA9675); - - /* Make sure SBU are routed to CCD or AUX based on CCD status at init */ - board_connect_c0_sbu_deferred(); - - /* Configure battery type */ - configure_battery_type(); - - /* Reconfigure board specific charger drivers */ - configure_charger(); - - /* Configure board specific retimer & mux */ - configure_retimer_usbmux(); - - return 0; -} -SYS_INIT(board_pre_task_peripheral_init, APPLICATION, - CONFIG_APPLICATION_INIT_PRIORITY); diff --git a/zephyr/projects/intelrvp/include/intel_rvp_board_id.h b/zephyr/projects/intelrvp/include/intel_rvp_board_id.h deleted file mode 100644 index 7825b272e3..0000000000 --- a/zephyr/projects/intelrvp/include/intel_rvp_board_id.h +++ /dev/null @@ -1,17 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __INTEL_RVP_BOARD_ID_H -#define __INTEL_RVP_BOARD_ID_H - -#include <zephyr/drivers/gpio.h> - -extern const struct gpio_dt_spec bom_id_config[]; - -extern const struct gpio_dt_spec fab_id_config[]; - -extern const struct gpio_dt_spec board_id_config[]; - -#endif /* __INTEL_RVP_BOARD_ID_H */ diff --git a/zephyr/projects/intelrvp/include/intelrvp.h b/zephyr/projects/intelrvp/include/intelrvp.h deleted file mode 100644 index 9b6dc98485..0000000000 --- a/zephyr/projects/intelrvp/include/intelrvp.h +++ /dev/null @@ -1,35 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -#ifndef __INTELRVP_BOARD_H -#define __INTELRVP_BOARD_H - -#include "compiler.h" -#include "gpio_signal.h" -#include "stdbool.h" - -/* RVP ID read retry count */ -#define RVP_VERSION_READ_RETRY_CNT 2 - -#define DC_JACK_MAX_VOLTAGE_MV 19000 - -FORWARD_DECLARE_ENUM(tcpc_rp_value); - -struct tcpc_aic_gpio_config_t { - /* TCPC interrupt */ - enum gpio_signal tcpc_alert; - /* PPC interrupt */ - enum gpio_signal ppc_alert; - /* PPC interrupt handler */ - void (*ppc_intr_handler)(int port); -}; -extern const struct tcpc_aic_gpio_config_t tcpc_aic_gpios[]; - -void board_charging_enable(int port, int enable); -void board_vbus_enable(int port, int enable); -void board_set_vbus_source_current_limit(int port, enum tcpc_rp_value rp); -void board_dc_jack_interrupt(enum gpio_signal signal); -void tcpc_alert_event(enum gpio_signal signal); -bool is_typec_port(int port); -#endif /* __INTELRVP_BOARD_H */ diff --git a/zephyr/projects/intelrvp/led.md b/zephyr/projects/intelrvp/led.md deleted file mode 100644 index c36bc6b36c..0000000000 --- a/zephyr/projects/intelrvp/led.md +++ /dev/null @@ -1,44 +0,0 @@ -## LED behavior on Intel RVP - -There are two LEDs on RVP, they represent battery and charger status -respectively. - -LED | Description -------------|------------------------ -CHARGER_LED | Represent charger state -BATTERY_LED | Represent battery state - -LEDs on RVP emit a single color (green). Rather than just using the on and off -state of the LED, PWM is used to blink the LED to represent multiple states and -the below table represents the multiple LED states. - -LED State | Description ----------------|------------------------------ -LED_ON | Switch On using gpio/pwmduty -LED_OFF | Switch Off using gpio/pwmduty -LED_FLASH_SLOW | Flashing with 2 sec period -LED_FLASH_FAST | Flashing with 250ms period - -### LED Behavior : Charger - -CHARGER_LED is dedicated to represent Charger status and the below table -represents the LED states for the Charger. - -Charger Status | LED States ----------------------|--------------- -Charging | LED_ON -Discharging | LED_FLASH_SLOW -Charging error | LED_FLASH_FAST -No Charger Connected | LED_OFF - -### LED Behavior : Battery - -BATTERY_LED is dedicated to represent Battery status and the below table -represents the LED states for the Battery. - -Battery Status | LED States -----------------------------|--------------- -Battery Low (<10%) | LED_FLASH_FAST -Battery Normal (10% to 90%) | LED_FLASH_SLOW -Battery Full (>90%) | LED_ON -Battery Not Present | LED_OFF diff --git a/zephyr/projects/intelrvp/legacy_ec_pwrseq.conf b/zephyr/projects/intelrvp/legacy_ec_pwrseq.conf deleted file mode 100644 index 331afb637d..0000000000 --- a/zephyr/projects/intelrvp/legacy_ec_pwrseq.conf +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# Legacy EC Power Sequencing Common Config -CONFIG_PLATFORM_EC_POWERSEQ=y -CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=y -CONFIG_PLATFORM_EC_POWERSEQ_INTEL=y -CONFIG_PLATFORM_EC_POWERSEQ_RSMRST_DELAY=y -CONFIG_PLATFORM_EC_POWERSEQ_S0IX=y -CONFIG_PLATFORM_EC_POWERSEQ_S4=y -CONFIG_PLATFORM_EC_THROTTLE_AP=y diff --git a/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt b/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt deleted file mode 100644 index c6729af776..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -zephyr_library_sources("src/mtlrvp.c") -zephyr_library_sources("src/board_power.c") diff --git a/zephyr/projects/intelrvp/mtlrvp/ioex.dts b/zephyr/projects/intelrvp/mtlrvp/ioex.dts deleted file mode 100644 index 7d2f4b5820..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/ioex.dts +++ /dev/null @@ -1,71 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - /* IOEX_KBD_GPIO IT8801 */ - ioex-kbd-gpio { - compatible = "cros,ioex-chip"; - i2c-port = <&i2c_charger>; - i2c-addr = <0x39>; - drv = "it8801_ioexpander_drv"; - flags = <0x00>; - #address-cells = <1>; - #size-cells = <0>; - - ioex_it8801_port0: it8801_port@0 { - compatible = "cros,ioex-port"; - reg = <0>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - }; - - ioex_it8801_port1: it8801_port@1 { - compatible = "cros,ioex-port"; - reg = <1>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - }; - }; - /* IOEX_C2_CCGXXF */ - ioex-c2 { - compatible = "cros,ioex-chip"; - i2c-port = <&typec_aic2>; - i2c-addr = <0x0B>; - drv = "ccgxxf_ioexpander_drv"; - flags = <0x00>; - #address-cells = <1>; - #size-cells = <0>; - ioex_c2_port0: ioex-c2-port@0 { - compatible = "cros,ioex-port"; - reg = <0>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - }; - ioex_c2_port1: ioex-c2-port@1 { - compatible = "cros,ioex-port"; - reg = <1>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - }; - ioex_c2_port2: ioex-c2-port@2 { - compatible = "cros,ioex-port"; - reg = <2>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - }; - ioex_c2_port3: ioex-c2-port@3 { - compatible = "cros,ioex-port"; - reg = <3>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts deleted file mode 100644 index cf85dd3413..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts +++ /dev/null @@ -1,36 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - fans { - compatible = "cros-ec,fans"; - - fan_0 { - pwms = <&pwm3 0 PWM_KHZ(30) PWM_POLARITY_NORMAL>; - rpm_min = <3200>; - rpm_start = <2200>; - rpm_max = <6600>; - tach = <&tach2>; - pgood_gpio = <&all_sys_pwrgd>; - enable_gpio = <&gpio_fan_control>; - }; - }; -}; - -/* Tachemeter for fan speed measurement */ -&tach2 { - status = "okay"; - pinctrl-0 = <&ta2_1_in_gp73>; /* TA2 input on GPIO73 */ - pinctrl-names = "default"; - port = <NPCX_TACH_PORT_A>; /* port-A is selected */ - sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */ - pulses-per-round = <2>; /* number of pulses per round of encoder */ -}; - -&pwm3 { - status = "okay"; - pinctrl-0 = <&pwm3_gp80>; - pinctrl-names = "default"; -}; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts deleted file mode 100644 index 77b4cf0573..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts +++ /dev/null @@ -1,366 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - aliases { - gpio-wp = &gpio_wp; - }; - - named-gpios { - compatible = "named-gpios"; - - ioex_kbd_intr_n: ioex-kbd-intr-n { - gpios = <&gpio0 0 GPIO_INPUT>; - enum-name = "GPIO_KB_DISCRETE_INT"; - }; - all_sys_pwrgd: all-sys-pwrgd { - gpios = <&gpio7 0 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD"; - }; - rsmrst_pwrgd: rsmrst-pwrgd { - gpios = <&gpio6 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_PG_EC_RSMRST_ODL"; - }; - pch_slp_s0_n: pch-slp-s0-n-ec { - gpios = <&gpioa 1 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S0_L"; /* 1.8V */ - }; - pm-slp-s3-n-ec { - gpios = <&gpiob 0 GPIO_INPUT>; /* 1.8V */ - enum-name = "GPIO_PCH_SLP_S3_L"; - }; - pm-slp-s4-n-ec { - gpios = <&gpioa 5 GPIO_INPUT>; /* 1.8V */ - }; - volume-up { - gpios = <&gpio6 1 (GPIO_INPUT | GPIO_PULL_UP)>; - enum-name = "GPIO_VOLUME_UP_L"; - }; - vol-dn-ec-r { - gpios = <&gpio0 3 (GPIO_INPUT | GPIO_PULL_UP)>; - enum-name = "GPIO_VOLUME_DOWN_L"; - }; - smc_lid: smc-lid { - gpios = <&gpio0 1 (GPIO_INPUT | GPIO_PULL_UP)>; - enum-name = "GPIO_LID_OPEN"; - }; - smc_onoff_n: smc-onoff-n { - gpios = <&gpiod 2 GPIO_INPUT>; - enum-name = "GPIO_POWER_BUTTON_L"; - }; - gpio_wp: wp-l { - gpios = <&gpiod 5 GPIO_INPUT>; - }; - std_adp_prsnt: std-adp-prsnt { - gpios = <&gpioc 6 GPIO_INPUT>; - enum-name = "GPIO_DC_JACK_PRESENT"; - }; - bc_acok: bc-acok-ec { - gpios = <&gpio0 2 GPIO_INPUT>; - enum-name = "GPIO_AC_PRESENT"; - }; - usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { - gpios = <&gpio4 0 GPIO_INPUT>; - }; - /* NOTE: Netname is USBC_TCPC_PPC_ALRT_P0 */ - usb_c0_c1_tcpc_rst_odl: usb-c0-c1-tcpc-rst-odl { - gpios = <&gpiod 0 GPIO_ODR_HIGH>; - }; - /* NOTE: Netname is USBC_TCPC_ALRT_P1 */ - usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 { - gpios = <&gpiod 1 GPIO_INPUT>; - }; - usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 { - gpios = <&gpioe 4 GPIO_INPUT>; - }; - usbc_tcpc_alrt_p2: usbc-tcpc-alrt-p2 { - gpios = <&gpio9 1 GPIO_INPUT>; - }; - /* NOTE: Netname is USBC_TCPC_PPC_ALRT_P3 */ - usbc_tcpc_alrt_p3: usbc-tcpc-alrt-p3 { - gpios = <&gpiof 3 GPIO_INPUT>; - }; - gpio_ec_pch_wake_odl: pch-wake-n { - gpios = <&gpio7 4 GPIO_ODR_HIGH>; - }; - espi-rst-n { - gpios = <&gpio5 4 GPIO_INPUT>; /* 1.8V */ - }; - plt-rst-l { - gpios = <&gpioa 2 GPIO_INPUT>; /* 1.8V */ - }; - slate-mode-indication { - gpios = <&gpio9 4 GPIO_INPUT>; /* 1.8V */ - }; - prochot-ec { - gpios = <&gpio6 0 GPIO_INPUT>; - enum-name = "GPIO_CPU_PROCHOT"; - }; - sys_rst_odl: sys-rst-odl-ec { - gpios = <&gpioc 5 GPIO_ODR_HIGH>; - enum-name = "GPIO_SYS_RESET_L"; - }; - ec_pch_rsmrst_l: pm-rsmrst-r-n { - gpios = <&gpioa 4 GPIO_OUTPUT_LOW>; /* 1.8V */ - enum-name = "GPIO_PCH_RSMRST_L"; - }; - pm-pwrbtn-n-ec { - gpios = <&gpiod 4 GPIO_ODR_HIGH>; - enum-name = "GPIO_PCH_PWRBTN_L"; - }; - ec_spi_oe_mecc: ec-spi-oe-mecc-r { - gpios = <&gpioa 7 GPIO_OUTPUT_LOW>; /* 1.8V */ - }; - en_pp3300_a: ec-ds3-r { - gpios = <&gpioc 4 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_EN_PP3300_A"; - alias = "GPIO_TEMP_SENSOR_POWER"; - }; - ec_pch_pwrok_od: pch-pwrok-ec-r { - gpios = <&gpiod 3 GPIO_ODR_LOW>; - enum-name = "GPIO_PCH_PWROK"; - }; - sys_pwrok_ec: sys-pwrok-ec { - gpios = <&gpiof 5 GPIO_ODR_LOW>; - enum-name = "GPIO_PCH_SYS_PWROK"; - }; - bat-det-ec { - gpios = <&gpio7 6 GPIO_INPUT>; - enum-name = "GPIO_BATT_PRES_ODL"; - }; - edp-bklt-en { - gpios = <&gpioe 1 GPIO_OUTPUT_HIGH>; - }; - /* TODO: move both LEDs to PWM */ - led-1-l-ec { - gpios = <&gpiob 6 GPIO_OUTPUT_HIGH>; - }; - led-2-l-ec { - gpios = <&gpiob 7 GPIO_OUTPUT_HIGH>; - }; - gpio_fan_control: therm-sen-mecc-r { - gpios = <&gpioc 0 GPIO_OUTPUT_LOW>; - }; - /* NOTE: Netname is USBC_TCPC_ALRT_P3 */ - ccd_mode_odl: ccd-mode-odl { - gpios = <&gpio9 2 GPIO_INPUT>; - enum-name = "GPIO_CCD_MODE_ODL"; - }; - smb-bs-clk { - gpios = <&gpiob 3 GPIO_INPUT>; - }; - smb-bs-data { - gpios = <&gpiob 2 GPIO_INPUT>; - }; - usbc-tcpc-i2c-clk-aic1 { - gpios = <&gpiob 5 GPIO_INPUT>; - }; - usbc-tcpc-i2c-data-aic1 { - gpios = <&gpiob 4 GPIO_INPUT>; - }; - usbc-tcpc-i2c-clk-aic2 { - gpios = <&gpio9 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - }; - usbc-tcpc-i2c-data-aic2 { - gpios = <&gpio8 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - }; - /* Unused 1.8V pins */ - i3c-1-sda-r { - gpios = <&gpio5 0 GPIO_INPUT>; - }; - i3c-1-scl-r { - gpios = <&gpio5 6 GPIO_INPUT>; - }; - espi-alert0-n-r { - gpios = <&gpio5 7 GPIO_INPUT>; - }; - tp-gpio95 { - gpios = <&gpio9 5 GPIO_INPUT>; - }; - cpu-c10-gate { - gpios = <&gpio9 6 GPIO_INPUT>; - }; - slp-s0-cs-n-ec { - gpios = <&gpio9 7 GPIO_INPUT>; - }; - rtc-rst-n-r { - gpios = <&gpioa 0 GPIO_INPUT>; - }; - tp-gpioa6 { - gpios = <&gpioa 6 GPIO_INPUT>; - }; - sml1-clk-mecc { - gpios = <&gpio3 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - }; - sml1-data-mecc { - gpios = <&gpio3 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - }; - sml1-alert { - gpios = <&gpioc 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - }; - smb-pch-alrt { - gpios = <&gpioa 3 GPIO_INPUT>; - }; - smb-pch-data { - gpios = <&gpioc 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - }; - smb-pch-clk { - gpios = <&gpioc 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - }; - /* Unused 3.3V pins */ - cpu-cat-err-mecc { - gpios = <&gpio3 4 GPIO_INPUT>; - }; - tp-gpio37 { - gpios = <&gpio3 7 GPIO_INPUT>; - }; - tp-vccpdsw-3p3-ec { - gpios = <&gpio4 5 GPIO_INPUT>; - }; - mech-pwr-btn-in-odl { - gpios = <&gpio6 2 GPIO_INPUT>; - }; - tp-gpio63 { - gpios = <&gpio6 3 GPIO_INPUT>; - }; - tp-gpio67 { - gpios = <&gpio6 7 GPIO_INPUT>; - }; - tp-gpio72 { - gpios = <&gpio7 2 GPIO_INPUT>; - }; - tp-gpio75 { - gpios = <&gpio7 5 GPIO_INPUT>; - }; - ec-peci-ec { - gpios = <&gpio8 1 GPIO_INPUT>; - }; - tp-gpiob1 { - gpios = <&gpiob 1 GPIO_INPUT>; - }; - std-adpt-cntrl-GPIO_r { - gpios = <&gpioc 3 GPIO_INPUT>; - }; - ec-packet-mode-ec { - gpios = <&gpioe 2 GPIO_INPUT>; - }; - tp-gpioe3 { - gpios = <&gpioe 3 GPIO_INPUT>; - }; - boot-stall-r { - gpios = <&gpioe 5 GPIO_INPUT>; - }; - tp-gpiof0 { - gpios = <&gpiof 0 GPIO_INPUT>; - }; - tp-gpiof1 { - gpios = <&gpiof 1 GPIO_INPUT>; - }; - usbc_tcpc_ppc_alrt_p2: usbc-tcpc-ppc-alrt-p2 { - gpios = <&gpiof 2 GPIO_INPUT>; - }; - tp-gpiof4 { - gpios = <&gpiof 4 GPIO_INPUT>; - }; - - /* KBD IOEX configuration */ - srtc-rst { - gpios = <&ioex_it8801_port0 3 GPIO_OUTPUT_LOW>; - }; - ec-h1-packet-mode { - gpios = <&ioex_it8801_port0 4 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PACKET_MODE_EN"; - }; - rtc-rst { - gpios = <&ioex_it8801_port0 6 GPIO_OUTPUT_LOW>; - }; - ec-entering-rw { - gpios = <&ioex_it8801_port0 7 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_ENTERING_RW"; - }; - ioex-sys-rst-odl-ec { - gpios = <&ioex_it8801_port1 0 GPIO_INPUT>; - }; - ioex-slate-mode-indication { - gpios = <&ioex_it8801_port1 2 GPIO_INPUT>; - }; - - /* USB C IOEX configuration */ - usb_c0_hb_retimer_ls_en: usb-c0-hbr-ls-en { - gpios = <&ioex_c0 2 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_HBR_LS_EN"; - no-auto-init; - }; - usb_c0_hb_retimer_rst: usb-c0-hbr-rst { - gpios = <&ioex_c0 3 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_HBR_RST"; - no-auto-init; - }; - usb_c1_hb_retimer_ls_en: usb-c1-hbr-ls-en { - gpios = <&ioex_c1 2 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_HBR_LS_EN"; - no-auto-init; - }; - usb_c1_hb_retimer_rst: usb-c1-hbr-rst { - gpios = <&ioex_c1 3 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_HBR_RST"; - no-auto-init; - }; - usb-c0-mux-oe-n { - gpios = <&ioex_c0 4 GPIO_OUTPUT_LOW>; - no-auto-init; - }; - usb-c0-mux-sbu-sel-0 { - gpios = <&ioex_c0 6 GPIO_OUTPUT_HIGH>; - enum-name = "IOEX_USB_C0_MUX_SBU_SEL_0"; - no-auto-init; - }; - usb-c0-mux-sbu-sel-1 { - gpios = <&ioex_c1 4 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_MUX_SBU_SEL_1"; - no-auto-init; - }; - usb-c0-c1-prochot-n { - gpios = <&ioex_c1 6 GPIO_INPUT>; - no-auto-init; - }; - dg-bssb-sbu-sel { - gpios = <&ioex_c2_port1 4 GPIO_INPUT>; - no-auto-init; - }; - usb_c2_hb_retimer_rst: usb-c2-hbr-rst { - gpios = <&ioex_c2_port1 1 (GPIO_ODR_LOW | \ - GPIO_VOLTAGE_1P8)>; - enum-name = "IOEX_USB_C2_HBR_RST"; - no-auto-init; - }; - usb_c2_hb_retimer_ls_en: usb-c2-hbr-ls-en { - gpios = <&ioex_c2_port2 0 (GPIO_ODR_LOW | \ - GPIO_VOLTAGE_1P8)>; - enum-name = "IOEX_USB_C2_HBR_LS_EN"; - no-auto-init; - }; - usb_c3_hb_retimer_rst: usb-c3-hbr-rst { - gpios = <&ioex_c2_port1 3 (GPIO_ODR_LOW | \ - GPIO_VOLTAGE_1P8)>; - enum-name = "IOEX_USB_C3_HBR_RST"; - no-auto-init; - }; - usb_c3_hb_retimer_ls_en: usb-c3-hbr-ls-en { - gpios = <&ioex_c2_port3 3 (GPIO_ODR_LOW | \ - GPIO_VOLTAGE_1P8)>; - enum-name = "IOEX_USB_C3_HBR_LS_EN"; - no-auto-init; - }; - usb-c2-c3-prochot-n { - gpios = <&ioex_c2_port0 0 GPIO_INPUT>; - no-auto-init; - }; - /* unimplemented GPIOs */ - en-pp5000 { - enum-name = "GPIO_EN_PP5000"; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts deleted file mode 100644 index b120f6c05e..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts +++ /dev/null @@ -1,60 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/ { - gpio-interrupts { - compatible = "cros-ec,gpio-interrupts"; - - int_lid_open: lid_open { - irq-pin = <&smc_lid>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "lid_interrupt"; - }; - int_power_button: power_button { - irq-pin = <&smc_onoff_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_button_interrupt"; - }; - int_ac_present: ac_present { - irq-pin = <&bc_acok>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "extpower_interrupt"; - }; - int_ioex_kbd_intr_n: ioex_kbd_intr_n { - irq-pin = <&ioex_kbd_intr_n>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "io_expander_it8801_interrupt"; - }; - int_usb_c0_c1_tcpc: usb_c0_tcpc { - irq-pin = <&usbc_tcpc_alrt_p0>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usb_c0_ppc: usb_c0_ppc { - irq-pin = <&usbc_tcpc_ppc_alrt_p0>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_usb_c1_ppc: usb_c1_ppc { - irq-pin = <&usbc_tcpc_ppc_alrt_p1>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_usb_c2_tcpc: usb_c2_tcpc { - irq-pin = <&usbc_tcpc_alrt_p2>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usb_c3_tcpc: usb_c3_tcpc { - irq-pin = <&usbc_tcpc_alrt_p3>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_ccd_mode: ccd_mode { - irq-pin = <&ccd_mode_odl>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "board_connect_c0_sbu"; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/keyboard.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/keyboard.dts deleted file mode 100644 index 81d6e82f48..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/keyboard.dts +++ /dev/null @@ -1,59 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - cros-keyscan { - compatible = "cros-keyscan"; - - output-settle = <35>; - debounce-down = <5000>; - debounce-up = <40000>; - poll-timeout = <100000>; - - actual-key-mask = < - 0x14 /* C0 */ - 0xff /* C1 */ - 0xff /* C2 */ - 0xff /* C3 */ - 0xff /* C4 */ - 0xf5 /* C5 */ - 0xff /* C6 */ - 0xa4 /* C7 */ - 0xff /* C8 */ - 0xfe /* C9 */ - 0x55 /* C10 */ - 0xfa /* C11 */ - 0xca /* C12 */ - >; - }; -}; - -&cros_kb_raw { - status = "okay"; - /* No KSO2 (it's inverted and implemented by GPIO) */ - pinctrl-0 = < - &ksi0_gp31 - &ksi1_gp30 - &ksi2_gp27 - &ksi3_gp26 - &ksi4_gp25 - &ksi5_gp24 - &ksi6_gp23 - &ksi7_gp22 - &kso00_gp21 - &kso01_gp20 - &kso03_gp16 - &kso04_gp15 - &kso05_gp14 - &kso06_gp13 - &kso07_gp12 - &kso08_gp11 - &kso09_gp10 - &kso10_gp07 - &kso11_gp06 - &kso12_gp05 - >; - pinctrl-names = "default"; -}; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts deleted file mode 100644 index 44f283071b..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts +++ /dev/null @@ -1,273 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - - #include <dt-bindings/usb_pd_tcpm.h> - -/ { - chosen { - cros,rtc = &mtc; - }; - - hibernate-wake-pins { - compatible = "cros-ec,hibernate-wake-pins"; - wakeup-irqs = < - &int_ac_present - &int_lid_open - &int_power_button - >; - }; - - named-i2c-ports { - compatible = "named-i2c-ports"; - - i2c_charger: charger { - i2c-port = <&i2c7_0>; - enum-names = "I2C_PORT_CHARGER", - "I2C_PORT_BATTERY", - "I2C_PORT_EEPROM", - "I2C_PORT_KB_DISCRETE", - "I2C_PORT_PORT80"; - }; - typec_aic1: typec-aic1{ - i2c-port = <&i2c0_0>; - enum-names = "I2C_PORT_TYPEC_AIC_1"; - }; - typec_aic2: typec-aic2{ - i2c-port = <&i2c1_0>; - enum-names = "I2C_PORT_TYPEC_AIC_2"; - }; - }; - - named-adc-channels { - compatible = "named-adc-channels"; - - adc_ambient: ambient { - enum-name = "ADC_TEMP_SENSOR_1"; - io-channels = <&adc0 3>; - }; - adc_ddr: ddr { - enum-name = "ADC_TEMP_SENSOR_2"; - io-channels = <&adc0 4>; - }; - adc_skin: skin { - enum-name = "ADC_TEMP_SENSOR_3"; - io-channels = <&adc0 2>; - }; - adc_vr: vr { - enum-name = "ADC_TEMP_SENSOR_4"; - io-channels = <&adc0 1>; - }; - }; -}; - -/* charger */ -&i2c7_0 { - label = "I2C_CHARGER"; - status = "okay"; - clock-frequency = <I2C_BITRATE_STANDARD>; - pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>; - pinctrl-names = "default"; - - pca95xx: pca95xx@22 { - compatible = "nxp,pca95xx"; - label = "PCA95XX"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - - rvp_board_id: rvp-board-id { - compatible = "intel,rvp-board-id"; - - /* - * BOM ID [2] : IOEX[0] - * BOM ID [1:0] : IOEX[15:14] - */ - bom-gpios = <&pca95xx 0 0>, <&pca95xx 15 0>, <&pca95xx 14 0>; - - /* - * FAB ID [1:0] : IOEX[2:1] - */ - fab-gpios = <&pca95xx 2 0>, <&pca95xx 1 0>; - - /* - * BOARD ID[5:0] : IOEX[13:8] - */ - board-gpios = <&pca95xx 13 0>, <&pca95xx 12 0>, <&pca95xx 11 0>, - <&pca95xx 10 0>, <&pca95xx 9 0>, <&pca95xx 8 0>; - }; - - kb_discrete: ite-it8801@39 { - compatible = "ite,it8801"; - reg = <0x39>; - }; - - seven_seg_display: max695x-seven-seg-display@38 { - compatible = "maxim,seven-seg-display"; - reg = <0x38>; - label = "MAX695X_SEVEN_SEG_DISPLAY"; - }; - - charger: isl9241@9 { - compatible = "intersil,isl9241"; - status = "okay"; - reg = <0x9>; - }; - - cbi_eeprom: eeprom@50 { - compatible = "atmel,at24"; - reg = <0x50>; - size = <2048>; - pagesize = <16>; - address-width = <8>; - timeout = <5>; - }; -}; - -/* host interface */ -&espi0 { - status = "okay"; - pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; - pinctrl-names = "default"; -}; - -&i2c_ctrl7 { - status = "okay"; -}; - -/* typec_aic1 */ -&i2c0_0 { - label = "I2C_USB_C0_C1_TCPC"; - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; - pinctrl-names = "default"; - - tcpc_port0: nct38xx@73 { - compatible = "nuvoton,nct38xx"; - reg = <0x73>; - gpio-dev = <&nct38xx_c0>; - tcpc-flags = <( - TCPC_FLAGS_TCPCI_REV2_0 | - TCPC_FLAGS_NO_DEBUG_ACC_CONTROL)>; - }; - - nct38xx_c0: nct38xx_c0@73 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nuvoton,nct38xx-gpio"; - reg = <0x73>; - label = "NCT38XX_C0"; - - ioex_c0: gpio@0 { - compatible = "nuvoton,nct38xx-gpio-port"; - reg = <0x0>; - label = "NCT38XX_C0_GPIO0"; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - pin_mask = <0xdc>; - pinmux_mask = <0xff>; - }; - }; - - tcpc_port1: nct38xx@77 { - compatible = "nuvoton,nct38xx"; - reg = <0x77>; - gpio-dev = <&nct38xx_c1>; - tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; - }; - - nct38xx_c1: nct38xx_c1@77 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nuvoton,nct38xx-gpio"; - reg = <0x77>; - label = "NCT38XX_C1"; - - ioex_c1: gpio@0 { - compatible = "nuvoton,nct38xx-gpio-port"; - reg = <0x0>; - label = "NCT38XX_C1_GPIO0"; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - pin_mask = <0xdc>; - pinmux_mask = <0xff>; - }; - }; - - nct38xx_alert_0 { - compatible = "nuvoton,nct38xx-gpio-alert"; - irq-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; - nct38xx-dev = <&nct38xx_c0 &nct38xx_c1>; - label = "NCT38XX_ALERT_1"; - }; - - usb_c0_hb_retimer: jhl8040r-c0@56 { - compatible = "intel,jhl8040r"; - reg = <0x56>; - reset-pin = <&usb_c0_hb_retimer_rst>; - ls-en-pin = <&usb_c0_hb_retimer_ls_en>; - }; - - usb_c1_hb_retimer: jhl8040r-c1@57 { - compatible = "intel,jhl8040r"; - reg = <0x57>; - reset-pin = <&usb_c1_hb_retimer_rst>; - ls-en-pin = <&usb_c1_hb_retimer_ls_en>; - }; -}; - -&i2c_ctrl0 { - status = "okay"; -}; - -/* typec_aic2 */ -&i2c1_0 { - label = "I2C_USB_C2_C3_TCPC"; - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; - pinctrl-names = "default"; - - tcpc_port2: ccgxxf@b { - compatible = "cypress,ccgxxf"; - reg = <0xb>; - }; - - tcpc_port3: ccgxxf@1b { - compatible = "cypress,ccgxxf"; - reg = <0x1b>; - }; - - usb_c2_hb_retimer: jhl8040r-c2@58 { - compatible = "intel,jhl8040r"; - reg = <0x58>; - reset-pin = <&usb_c2_hb_retimer_rst>; - ls-en-pin = <&usb_c2_hb_retimer_ls_en>; - }; - - usb_c3_hb_retimer: jhl8040r-c3@59 { - compatible = "intel,jhl8040r"; - reg = <0x59>; - reset-pin = <&usb_c3_hb_retimer_rst>; - ls-en-pin = <&usb_c3_hb_retimer_ls_en>; - }; -}; - -&i2c_ctrl1 { - status = "okay"; -}; - -&adc0 { - status = "okay"; - pinctrl-0 = <&adc0_chan1_gp44 - &adc0_chan2_gp43 - &adc0_chan3_gp42 - &adc0_chan4_gp41>; - pinctrl-names = "default"; -}; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts deleted file mode 100644 index 3c270d296f..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts +++ /dev/null @@ -1,125 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - chosen { - intel-ap-pwrseq,espi = &espi0; - }; - - common-pwrseq { - compatible = "intel,ap-pwrseq"; - - sys-pwrok-delay = <3>; - all-sys-pwrgd-timeout = <20>; - sys-reset-delay = <60>; - }; - - pwr-en-pp3300-s5 { - compatible = "intel,ap-pwrseq-gpio"; - dbg-label = "PP3300_S5 enable output to LS"; - enum-name = "PWR_EN_PP3300_A"; - gpios = <&gpioc 4 0>; - output; - }; - pwr-pg-ec-rsmrst-od { - compatible = "intel,ap-pwrseq-gpio"; - dbg-label = "RSMRST power good from regulator"; - enum-name = "PWR_RSMRST"; - gpios = <&gpio6 6 0>; - interrupt-flags = <GPIO_INT_EDGE_BOTH>; - }; - pwr-ec-pch-rsmrst-odl { - compatible = "intel,ap-pwrseq-gpio"; - dbg-label = "RSMRST output to PCH"; - enum-name = "PWR_EC_PCH_RSMRST"; - gpios = <&gpioa 4 0>; - output; - }; - pwr-slp-s0-l { - compatible = "intel,ap-pwrseq-gpio"; - dbg-label = "SLP_S0_L input from PCH"; - enum-name = "PWR_SLP_S0"; - gpios = <&gpioa 1 GPIO_ACTIVE_LOW>; - interrupt-flags = <GPIO_INT_EDGE_BOTH>; - }; - pwr-pch-pwrok { - compatible = "intel,ap-pwrseq-gpio"; - dbg-label = "PCH_PWROK output to PCH"; - enum-name = "PWR_PCH_PWROK"; - gpios = <&gpiod 3 GPIO_OPEN_DRAIN>; - output; - }; - pwr-ec-pch-sys-pwrok { - compatible = "intel,ap-pwrseq-gpio"; - dbg-label = "SYS_PWROK output to PCH"; - enum-name = "PWR_EC_PCH_SYS_PWROK"; - gpios = <&gpiof 5 GPIO_OPEN_DRAIN>; - output; - }; - pwr-sys-rst-l { - compatible = "intel,ap-pwrseq-gpio"; - dbg-label = "SYS_RESET# output to PCH"; - enum-name = "PWR_SYS_RST"; - gpios = <&gpioc 5 (GPIO_ACTIVE_LOW|GPIO_OPEN_DRAIN)>; - output; - }; - pwr-slp-s3 { - compatible = "intel,ap-pwrseq-vw"; - dbg-label = "SLP_S3 virtual wire input from PCH"; - enum-name = "PWR_SLP_S3"; - virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S3"; - vw-invert; - }; - pwr-slp-s4 { - compatible = "intel,ap-pwrseq-vw"; - dbg-label = "SLP_S4 virtual wire input from PCH"; - enum-name = "PWR_SLP_S4"; - virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S4"; - vw-invert; - }; - pwr-slp-s5 { - compatible = "intel,ap-pwrseq-vw"; - dbg-label = "SLP_S5 virtual wire input from PCH"; - enum-name = "PWR_SLP_S5"; - virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S5"; - vw-invert; - }; - pwr-all-sys-pwrgd { - compatible = "intel,ap-pwrseq-gpio"; - dbg-label = "all power good"; - enum-name = "PWR_ALL_SYS_PWRGD"; - gpios = <&gpio7 0 0>; - interrupt-flags = <GPIO_INT_EDGE_BOTH>; - }; -}; - -/* - * Because the power signals directly reference the GPIOs, - * the correspinding named-gpios need to have no-auto-init set. - */ -&en_pp3300_a { - no-auto-init; -}; -&rsmrst_pwrgd { - no-auto-init; -}; -&ec_pch_rsmrst_l { - no-auto-init; -}; -&pch_slp_s0_n { - no-auto-init; -}; -&ec_pch_pwrok_od { - no-auto-init; -}; -&sys_pwrok_ec { - no-auto-init; -}; -&sys_rst_odl { - no-auto-init; -}; -&all_sys_pwrgd { - no-auto-init; -}; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf deleted file mode 100644 index 45b101a7ac..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf +++ /dev/null @@ -1,18 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -CONFIG_BOARD_MTLRVP_NPCX=y -CONFIG_CROS_FLASH_NPCX=y -CONFIG_CROS_SYSTEM_NPCX=y -CONFIG_SYSCON=y - -# PWM -CONFIG_PWM=y -CONFIG_PWM_SHELL=n - -# Fan -CONFIG_TACH_NPCX=y - -#RTC -CONFIG_PLATFORM_EC_RTC=y diff --git a/zephyr/projects/intelrvp/mtlrvp/prj.conf b/zephyr/projects/intelrvp/mtlrvp/prj.conf deleted file mode 100644 index 1a521d4c89..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/prj.conf +++ /dev/null @@ -1,80 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# Power Sequencing -CONFIG_AP_X86_INTEL_MTL=y -CONFIG_X86_NON_DSX_PWRSEQ_MTL=y -CONFIG_PLATFORM_EC_POWERSEQ_SLP_S3_L_OVERRIDE=n -CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n - -# Battery -CONFIG_PLATFORM_EC_BATTERY_TYPE_NO_AUTO_DETECT=y -CONFIG_PLATFORM_EC_BATTERY_V2=y - -# CBI -CONFIG_EEPROM=y -CONFIG_EEPROM_AT24=y -CONFIG_EEPROM_SHELL=n -CONFIG_PLATFORM_EC_CBI_EEPROM=y -CONFIG_PLATFORM_EC_BYPASS_CBI_EEPROM_WP_CHECK=y -CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y - -# Disable BC1.2 -CONFIG_PLATFORM_EC_USB_CHARGER=n - -# Charger -CONFIG_PLATFORM_EC_CHARGER=y -CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y -CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=5 -CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=10 -CONFIG_PLATFORM_EC_CHARGE_RAMP_HW=n -CONFIG_PLATFORM_EC_CHARGER_ISL9241=y -CONFIG_PLATFORM_EC_DEDICATED_CHARGE_PORT=y - -# IOEX -CONFIG_PLATFORM_EC_IOEX_CROS_DRV=y -CONFIG_PLATFORM_EC_IOEX_CCGXXF=y -CONFIG_GPIO_PCA95XX=y -CONFIG_GPIO_NCT38XX=y -CONFIG_PLATFORM_EC_IOEX_IT8801=y - -#Keyboard from I/O expander -CONFIG_PLATFORM_EC_KEYBOARD_DISCRETE=y -CONFIG_CROS_KB_RAW_NPCX=n - -# Temperature sensors -CONFIG_PLATFORM_EC_TEMP_SENSOR=y -CONFIG_PLATFORM_EC_THERMISTOR=y -CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=y - -# USB CONFIG -CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y -CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y -CONFIG_PLATFORM_EC_USB_MUX_TASK=y -CONFIG_PLATFORM_EC_USBC_PPC_SN5S330=y -CONFIG_PLATFORM_EC_USBC_PPC=y -CONFIG_PLATFORM_EC_USB_PD_PPC=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y -CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y -CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_TCPC=y -CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_CCGXXF=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX=y -CONFIG_PLATFORM_EC_USB_PD_TRY_SRC=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_SBU=y -CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE=y -CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_HB=y -CONFIG_PLATFORM_EC_USBC_VCONN=y -CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=y -CONFIG_PLATFORM_EC_USB_PD_USB32_DRD=y -CONFIG_PLATFORM_EC_USB_PD_USB4=y -CONFIG_PLATFORM_EC_USB_PD_INT_SHARED=y -CONFIG_PLATFORM_EC_USB_PD_PORT_0_SHARED=y -CONFIG_PLATFORM_EC_USB_PD_PORT_1_SHARED=y - -# 7-Segment Display -CONFIG_PLATFORM_EC_MAX695X_SEVEN_SEGMENT_DISPLAY=y diff --git a/zephyr/projects/intelrvp/mtlrvp/src/board_power.c b/zephyr/projects/intelrvp/mtlrvp/src/board_power.c deleted file mode 100644 index 301402bf0f..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/src/board_power.c +++ /dev/null @@ -1,61 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <zephyr/sys/atomic.h> -#include <zephyr/logging/log.h> -#include <zephyr/drivers/gpio.h> - -#include <ap_power/ap_power.h> -#include <ap_power/ap_power_events.h> -#include <ap_power/ap_power_interface.h> -#include <ap_power_override_functions.h> -#include <power_signals.h> -#include <x86_power_signals.h> - -#include "gpio_signal.h" -#include "gpio/gpio.h" - -LOG_MODULE_DECLARE(ap_pwrseq, LOG_LEVEL_INF); - -#if CONFIG_X86_NON_DSX_PWRSEQ_MTL -#define X86_NON_DSX_MTL_FORCE_SHUTDOWN_TO_MS 50 - -void board_ap_power_force_shutdown(void) -{ - int timeout_ms = X86_NON_DSX_MTL_FORCE_SHUTDOWN_TO_MS; - - /* Turn off PCH_RMSRST to meet tPCH12 */ - power_signal_set(PWR_EC_PCH_RSMRST, 0); - - /* Turn off PRIM load switch. */ - power_signal_set(PWR_EN_PP3300_A, 0); - - /* Wait RSMRST to be off. */ - while (power_signal_get(PWR_RSMRST) && (timeout_ms > 0)) { - k_msleep(1); - timeout_ms--; - }; - - if (power_signal_get(PWR_RSMRST)) - LOG_WRN("RSMRST_ODL didn't go low! Assuming G3."); -} - -void board_ap_power_action_g3_s5(void) -{ - /* Turn on the PP3300_PRIM rail. */ - power_signal_set(PWR_EN_PP3300_A, 1); - - if (!power_wait_signals_timeout( - IN_PGOOD_ALL_CORE, - AP_PWRSEQ_DT_VALUE(wait_signal_timeout))) { - ap_power_ev_send_callbacks(AP_POWER_PRE_INIT); - } -} - -bool board_ap_power_check_power_rails_enabled(void) -{ - return power_signal_get(PWR_EN_PP3300_A); -} -#endif /* CONFIG_X86_NON_DSX_PWRSEQ_MTL */ diff --git a/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c b/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c deleted file mode 100644 index 9d96a08712..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c +++ /dev/null @@ -1,331 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "battery.h" -#include "battery_fuel_gauge.h" -#include "charger.h" -#include "common.h" -#include "console.h" -#include "driver/retimer/bb_retimer_public.h" -#include "driver/tcpm/ccgxxf.h" -#include "driver/tcpm/nct38xx.h" -#include "driver/tcpm/tcpci.h" -#include "extpower.h" -#include "gpio.h" -#include "gpio/gpio_int.h" -#include "hooks.h" -#include "i2c.h" -#include "intelrvp.h" -#include "intel_rvp_board_id.h" -#include "ioexpander.h" -#include "isl9241.h" -#include "keyboard_raw.h" -#include "power/meteorlake.h" -#include "sn5s330.h" -#include "system.h" -#include "task.h" -#include "tusb1064.h" -#include "usb_mux.h" -#include "usbc_ppc.h" -#include "util.h" - -#define CPRINTF(format, args...) cprintf(CC_COMMAND, format, ##args) -#define CPRINTS(format, args...) cprints(CC_COMMAND, format, ##args) - -/*******************************************************************/ -/* USB-C Configuration Start */ - -/* PPC */ -#define I2C_ADDR_SN5S330_P0 0x40 -#define I2C_ADDR_SN5S330_P1 0x41 - -/* IOEX ports */ -enum ioex_port { - IOEX_KBD = 0, -#if defined(HAS_TASK_PD_C2) - IOEX_C2_CCGXXF, -#endif - IOEX_COUNT -}; - -/* USB-C ports */ -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, -#if defined(HAS_TASK_PD_C2) - USBC_PORT_C2, - USBC_PORT_C3, -#endif - USBC_PORT_COUNT -}; -BUILD_ASSERT(USBC_PORT_COUNT == CONFIG_USB_PD_PORT_MAX_COUNT); - -/* USB-C PPC configuration */ -struct ppc_config_t ppc_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_TYPEC_AIC_1, - .i2c_addr_flags = I2C_ADDR_SN5S330_P0, - .drv = &sn5s330_drv, - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_TYPEC_AIC_1, - .i2c_addr_flags = I2C_ADDR_SN5S330_P1, - .drv = &sn5s330_drv, - }, -}; -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/* TCPC AIC GPIO Configuration */ -const struct tcpc_aic_gpio_config_t tcpc_aic_gpios[] = { - [USBC_PORT_C0] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p0)), - .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p0)), - .ppc_intr_handler = sn5s330_interrupt, - }, - [USBC_PORT_C1] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p0)), - .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p1)), - .ppc_intr_handler = sn5s330_interrupt, - }, -#if defined(HAS_TASK_PD_C2) - [USBC_PORT_C2] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p2)), - /* No PPC alert for CCGXXF */ - }, - [USBC_PORT_C3] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p3)), - /* No PPC alert for CCGXXF */ - }, -#endif -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_aic_gpios) == CONFIG_USB_PD_PORT_MAX_COUNT); - -static void board_connect_c0_sbu_deferred(void) -{ - enum pd_power_role prole; - - if (gpio_get_level(GPIO_CCD_MODE_ODL)) { - CPRINTS("Default AUX line connected"); - /* Default set the SBU lines to AUX mode */ - ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_1, 0); - ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_0, 1); - } else { - prole = pd_get_power_role(USBC_PORT_C0); - CPRINTS("%s debug device is attached", - prole == PD_ROLE_SINK ? "Servo V4C/SuzyQ" : "Intel"); - - if (prole == PD_ROLE_SINK) { - /* Set the SBU lines to Google CCD mode */ - ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_1, 1); - ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_0, 1); - } else { - /* Set the SBU lines to Intel CCD mode */ - ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_1, 0); - ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_0, 0); - } - } -} -DECLARE_DEFERRED(board_connect_c0_sbu_deferred); - -void board_overcurrent_event(int port, int is_overcurrented) -{ - /* - * TODO: Meteorlake PCH does not use Physical GPIO for over current - * error, hence Send 'Over Current Virtual Wire' eSPI signal. - */ -} - -void board_reset_pd_mcu(void) -{ - /* Reset NCT38XX TCPC */ - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(usb_c0_c1_tcpc_rst_odl), 0); - msleep(NCT38XX_RESET_HOLD_DELAY_MS); - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(usb_c0_c1_tcpc_rst_odl), 1); - nct38xx_reset_notify(0); - nct38xx_reset_notify(1); - - if (NCT3807_RESET_POST_DELAY_MS != 0) { - msleep(NCT3807_RESET_POST_DELAY_MS); - } - - /* NCT38XX chip uses gpio ioex */ - gpio_reset_port(DEVICE_DT_GET(DT_NODELABEL(ioex_c0))); - gpio_reset_port(DEVICE_DT_GET(DT_NODELABEL(ioex_c1))); - -#if defined(HAS_TASK_PD_C2) - /* Reset the ccgxxf ports only resetting 1 is required */ - ccgxxf_reset(USBC_PORT_C2); - - /* CCGXXF has ioex on port 2 */ - ioex_init(IOEX_C2_CCGXXF); -#endif -} - -void board_connect_c0_sbu(enum gpio_signal signal) -{ - hook_call_deferred(&board_connect_c0_sbu_deferred_data, 0); -} - -/******************************************************************************/ -/* KSO mapping for discrete keyboard */ -__override const uint8_t it8801_kso_mapping[] = { - 0, 1, 20, 3, 4, 5, 6, 11, 12, 13, 14, 15, 16, -}; -BUILD_ASSERT(ARRAY_SIZE(it8801_kso_mapping) == KEYBOARD_COLS_MAX); - -/* PWROK signal configuration */ -/* - * On MTLRVP, SYS_PWROK_EC is an output controlled by EC and uses ALL_SYS_PWRGD - * as input. - */ -const struct intel_x86_pwrok_signal pwrok_signal_assert_list[] = { - { - .gpio = GPIO_PCH_SYS_PWROK, - .delay_ms = 3, - }, -}; -const int pwrok_signal_assert_count = ARRAY_SIZE(pwrok_signal_assert_list); - -const struct intel_x86_pwrok_signal pwrok_signal_deassert_list[] = { - { - .gpio = GPIO_PCH_SYS_PWROK, - }, -}; -const int pwrok_signal_deassert_count = ARRAY_SIZE(pwrok_signal_deassert_list); - -/* - * Returns board information (board id[7:0] and Fab id[15:8]) on success - * -1 on error. - */ -__override int board_get_version(void) -{ - /* Cache the MTLRVP board ID */ - static int mtlrvp_board_id; - - int i; - int rv = EC_ERROR_UNKNOWN; - int fab_id, board_id, bom_id; - - /* Board ID is already read */ - if (mtlrvp_board_id) - return mtlrvp_board_id; - - /* - * IOExpander that has Board ID information is on DSW-VAL rail on - * ADL RVP. On cold boot cycles, DSW-VAL rail is taking time to settle. - * This loop retries to ensure rail is settled and read is successful - */ - for (i = 0; i < RVP_VERSION_READ_RETRY_CNT; i++) { - rv = gpio_pin_get_dt(&bom_id_config[0]); - - if (rv >= 0) - break; - - k_msleep(1); - } - - /* return -1 if failed to read board id */ - if (rv) - return -1; - - /* - * BOM ID [2] : IOEX[0] - * BOM ID [1:0] : IOEX[15:14] - */ - bom_id = gpio_pin_get_dt(&bom_id_config[0]) << 2; - bom_id |= gpio_pin_get_dt(&bom_id_config[1]) << 1; - bom_id |= gpio_pin_get_dt(&bom_id_config[2]); - /* - * FAB ID [1:0] : IOEX[2:1] + 1 - */ - fab_id = gpio_pin_get_dt(&fab_id_config[0]) << 1; - fab_id |= gpio_pin_get_dt(&fab_id_config[1]); - fab_id += 1; - - /* - * BOARD ID[5:0] : IOEX[13:8] - */ - board_id = gpio_pin_get_dt(&board_id_config[0]) << 5; - board_id |= gpio_pin_get_dt(&board_id_config[1]) << 4; - board_id |= gpio_pin_get_dt(&board_id_config[2]) << 3; - board_id |= gpio_pin_get_dt(&board_id_config[3]) << 2; - board_id |= gpio_pin_get_dt(&board_id_config[4]) << 1; - board_id |= gpio_pin_get_dt(&board_id_config[5]); - - CPRINTF("BID:0x%x, FID:0x%x, BOM:0x%x", board_id, fab_id, bom_id); - - mtlrvp_board_id = board_id | (fab_id << 8); - return mtlrvp_board_id; -} - -static void board_int_init(void) -{ - /* Enable PPC interrupts. */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_ppc)); - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_ppc)); - - /* Enable TCPC interrupts. */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_c1_tcpc)); -#if defined(HAS_TASK_PD_C2) - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c2_tcpc)); - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c3_tcpc)); -#endif - - /* Enable CCD Mode interrupt */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_ccd_mode)); -} - -static int board_pre_task_peripheral_init(const struct device *unused) -{ - ARG_UNUSED(unused); - - /* Only reset tcpc/pd if not sysjump */ - if (!system_jumped_late()) { - /* Initialize tcpc and all ioex */ - board_reset_pd_mcu(); - } - - /* Initialize all interrupts */ - board_int_init(); - - /* Make sure SBU are routed to CCD or AUX based on CCD status at init */ - board_connect_c0_sbu_deferred(); - - return 0; -} -SYS_INIT(board_pre_task_peripheral_init, APPLICATION, - CONFIG_APPLICATION_INIT_PRIORITY); - -/* - * Since MTLRVP has both PPC and TCPC ports override to check if the port - * is a PPC or non PPC port - */ -__override bool pd_check_vbus_level(int port, enum vbus_level level) -{ - if (!board_port_has_ppc(port)) { - return tcpm_check_vbus_level(port, level); - } else if (level == VBUS_PRESENT) { - return pd_snk_is_vbus_provided(port); - } else { - return !pd_snk_is_vbus_provided(port); - } -} - -__override bool board_port_has_ppc(int port) -{ - bool ppc_port; - - switch (port) { - case USBC_PORT_C0: - case USBC_PORT_C1: - ppc_port = true; - break; - default: - ppc_port = false; - break; - } - - return ppc_port; -} diff --git a/zephyr/projects/intelrvp/mtlrvp/usbc.dts b/zephyr/projects/intelrvp/mtlrvp/usbc.dts deleted file mode 100644 index e4f3bdc465..0000000000 --- a/zephyr/projects/intelrvp/mtlrvp/usbc.dts +++ /dev/null @@ -1,76 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - usbc { - #address-cells = <1>; - #size-cells = <0>; - - usbc_port0: port0@0 { - compatible = "named-usbc-port"; - reg = <0>; - tcpc = <&tcpc_port0>; - chg = <&charger>; - usb-mux-chain-0 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c0_hb_retimer - &virtual_mux_c0>; - }; - }; - port0-muxes { - virtual_mux_c0: virtual-mux-c0 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - usbc_port1: port1@1 { - compatible = "named-usbc-port"; - reg = <1>; - tcpc = <&tcpc_port1>; - usb-mux-chain-1 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c1_hb_retimer - &virtual_mux_c1>; - }; - }; - port1-muxes { - virtual_mux_c1: virtual-mux-c1 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - usbc_port2: port2@2 { - compatible = "named-usbc-port"; - reg = <2>; - tcpc = <&tcpc_port2>; - usb-mux-chain-2 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c2_hb_retimer - &virtual_mux_c2>; - }; - }; - port2-muxes { - virtual_mux_c2: virtual-mux-c2 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - usbc_port3: port3@3 { - compatible = "named-usbc-port"; - reg = <3>; - tcpc = <&tcpc_port3>; - usb-mux-chain-3 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c3_hb_retimer - &virtual_mux_c3>; - }; - }; - port3-muxes { - virtual_mux_c3: virtual-mux-c3 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - }; -}; diff --git a/zephyr/projects/intelrvp/prj.conf b/zephyr/projects/intelrvp/prj.conf deleted file mode 100644 index df04eca101..0000000000 --- a/zephyr/projects/intelrvp/prj.conf +++ /dev/null @@ -1,72 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - - -CONFIG_CROS_EC=y -CONFIG_LTO=y -CONFIG_PLATFORM_EC=y -CONFIG_PLATFORM_EC_POWER_BUTTON=y -CONFIG_PLATFORM_EC_LID_SWITCH=y -CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y -CONFIG_SHIMMED_TASKS=y - -# Battery -CONFIG_PLATFORM_EC_BATTERY=y -CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y -CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y -CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y -CONFIG_PLATFORM_EC_BATTERY_REVIVE_DISCONNECT=y -CONFIG_PLATFORM_EC_BATTERY_SMART=y -CONFIG_PLATFORM_EC_BATTERY_TYPE_NO_AUTO_DETECT=y -CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT=15000 -CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON=15001 - -#Power Sequencing -CONFIG_PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON=y - -# Host command -CONFIG_PLATFORM_EC_HOSTCMD_AP_RESET=y -CONFIG_PLATFORM_EC_PORT80=y - -# USB-C and PD -CONFIG_PLATFORM_EC_USB_VID=0x18d1 -CONFIG_PLATFORM_EC_USB_PID=0x8086 -CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY=y - -# I2C -CONFIG_I2C=y - -# eSPI -CONFIG_ESPI=y -CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S3=y -CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y -CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5=y - -# Keyboard -CONFIG_PLATFORM_EC_KEYBOARD=y -CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042=y -CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y -CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI2=y -CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y -CONFIG_PLATFORM_EC_CMD_BUTTON=n - -# Sensors -CONFIG_SENSOR=y -CONFIG_SENSOR_SHELL=n - -# Shell Commands -CONFIG_SHELL_HELP=y -CONFIG_SHELL_HISTORY=y -CONFIG_SHELL_TAB=y -CONFIG_SHELL_TAB_AUTOCOMPLETION=y -CONFIG_KERNEL_SHELL=y - -# Logging -CONFIG_LOG=y -CONFIG_LOG_MODE_MINIMAL=y - -# TODO -# Below conf are disabled to compile successfully -# These will be enabled in upcoming CLs -CONFIG_PLATFORM_EC_BACKLIGHT_LID=n diff --git a/zephyr/projects/intelrvp/src/chg_usb_pd.c b/zephyr/projects/intelrvp/src/chg_usb_pd.c deleted file mode 100644 index 63a1853b4d..0000000000 --- a/zephyr/projects/intelrvp/src/chg_usb_pd.c +++ /dev/null @@ -1,129 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Common USB PD charge configuration */ - -#include "charge_manager.h" -#include "charge_state_v2.h" -#include "gpio.h" -#include "hooks.h" -#include "intelrvp.h" -#include "tcpm/tcpci.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) - -bool is_typec_port(int port) -{ -#if CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 - return !(port == DEDICATED_CHARGE_PORT || port == CHARGE_PORT_NONE); -#else - return !(port == CHARGE_PORT_NONE); -#endif /* CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 */ -} - -static inline int board_dc_jack_present(void) -{ -#if CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 - return gpio_get_level(GPIO_DC_JACK_PRESENT); -#else - return 0; -#endif /* CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 */ -} - -static void board_dc_jack_handle(void) -{ -#if CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 - struct charge_port_info charge_dc_jack; - - /* System is booted from DC Jack */ - if (board_dc_jack_present()) { - charge_dc_jack.current = - (PD_MAX_POWER_MW * 1000) / DC_JACK_MAX_VOLTAGE_MV; - charge_dc_jack.voltage = DC_JACK_MAX_VOLTAGE_MV; - } else { - charge_dc_jack.current = 0; - charge_dc_jack.voltage = USB_CHARGER_VOLTAGE_MV; - } - - charge_manager_update_charge(CHARGE_SUPPLIER_DEDICATED, - DEDICATED_CHARGE_PORT, &charge_dc_jack); -#endif /* CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 */ -} - -void board_dc_jack_interrupt(enum gpio_signal signal) -{ - board_dc_jack_handle(); -} - -static void board_charge_init(void) -{ - int port, supplier; - struct charge_port_info charge_init = { - .current = 0, - .voltage = USB_CHARGER_VOLTAGE_MV, - }; - - /* Initialize all charge suppliers to seed the charge manager */ - for (port = 0; port < CHARGE_PORT_COUNT; port++) { - for (supplier = 0; supplier < CHARGE_SUPPLIER_COUNT; - supplier++) { - charge_manager_update_charge(supplier, port, - &charge_init); - } - } - - board_dc_jack_handle(); -} -DECLARE_HOOK(HOOK_INIT, board_charge_init, HOOK_PRIO_DEFAULT); - -int board_set_active_charge_port(int port) -{ - int i; - /* charge port is a realy physical port */ - int is_real_port = (port >= 0 && port < CHARGE_PORT_COUNT); - /* check if we are source vbus on that port */ - int source = board_vbus_source_enabled(port); - - if (is_real_port && source) { - CPRINTS("Skip enable p%d", port); - return EC_ERROR_INVAL; - } - -#if CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 - /* - * Do not enable Type-C port if the DC Jack is present. - * When the Type-C is active port, hardware circuit will - * block DC jack from enabling +VADP_OUT. - */ - if (port != DEDICATED_CHARGE_PORT && board_dc_jack_present()) { - CPRINTS("DC Jack present, Skip enable p%d", port); - return EC_ERROR_INVAL; - } -#endif /* CONFIG_DEDICATED_CHARGE_PORT_COUNT */ - - /* Make sure non-charging ports are disabled */ - for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { - if (i != port) { - board_charging_enable(i, 0); - } - } - - /* Enable charging port */ - if (is_typec_port(port)) { - board_charging_enable(port, 1); - } - - CPRINTS("New chg p%d", port); - - return EC_SUCCESS; -} - -void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, - int charge_mv) -{ - charge_set_input_current_limit( - MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); -} diff --git a/zephyr/projects/intelrvp/src/chg_usb_pd_mecc_1_1.c b/zephyr/projects/intelrvp/src/chg_usb_pd_mecc_1_1.c deleted file mode 100644 index 45fbbc6f65..0000000000 --- a/zephyr/projects/intelrvp/src/chg_usb_pd_mecc_1_1.c +++ /dev/null @@ -1,92 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel-RVP family-specific configuration */ - -#include "console.h" -#include "gpio/gpio_int.h" -#include "hooks.h" -#include "include/gpio.h" -#include "intelrvp.h" -#include "ioexpander.h" -#include "system.h" -#include "tcpm/tcpci.h" -#include "usbc_ppc.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) - -void tcpc_alert_event(enum gpio_signal signal) -{ - int i; - - for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { - /* No alerts for embedded TCPC */ - if (tcpc_config[i].bus_type == EC_BUS_TYPE_EMBEDDED) { - continue; - } - - if (signal == tcpc_aic_gpios[i].tcpc_alert) { - schedule_deferred_pd_interrupt(i); - break; - } - } -} - -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - int i; - - /* Check which port has the ALERT line set */ - for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { - /* No alerts for embdeded TCPC */ - if (tcpc_config[i].bus_type == EC_BUS_TYPE_EMBEDDED) { - continue; - } - - if (!gpio_get_level(tcpc_aic_gpios[i].tcpc_alert)) { - status |= PD_STATUS_TCPC_ALERT_0 << i; - } - } - - return status; -} - -int ppc_get_alert_status(int port) -{ - return tcpc_aic_gpios[port].ppc_intr_handler && - !gpio_get_level(tcpc_aic_gpios[port].ppc_alert); -} - -/* PPC support routines */ -void ppc_interrupt(enum gpio_signal signal) -{ - int i; - - for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { - if (tcpc_aic_gpios[i].ppc_intr_handler && - signal == tcpc_aic_gpios[i].ppc_alert) { - tcpc_aic_gpios[i].ppc_intr_handler(i); - break; - } - } -} - -void board_charging_enable(int port, int enable) -{ - int rv; - - if (tcpc_aic_gpios[port].ppc_intr_handler) { - rv = ppc_vbus_sink_enable(port, enable); - } else { - rv = tcpc_config[port].drv->set_snk_ctrl(port, enable); - } - - if (rv) { - CPRINTS("C%d: sink path %s failed", port, - enable ? "en" : "dis"); - } -} diff --git a/zephyr/projects/intelrvp/src/intel_rvp_board_id.c b/zephyr/projects/intelrvp/src/intel_rvp_board_id.c deleted file mode 100644 index 77d4e93afd..0000000000 --- a/zephyr/projects/intelrvp/src/intel_rvp_board_id.c +++ /dev/null @@ -1,30 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <zephyr/devicetree.h> -#include "intel_rvp_board_id.h" - -#define DT_DRV_COMPAT intel_rvp_board_id - -BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) <= 1, - "Unsupported RVP Board ID instance"); - -#define RVP_ID_GPIO_DT_SPEC_GET(idx, node_id, prop) \ - GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx), - -#define RVP_ID_CONFIG_LIST(node_id, prop) \ - LISTIFY(DT_PROP_LEN(node_id, prop), RVP_ID_GPIO_DT_SPEC_GET, (), \ - node_id, prop) - -#if DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT) -const struct gpio_dt_spec bom_id_config[] = { RVP_ID_CONFIG_LIST(DT_DRV_INST(0), - bom_gpios) }; - -const struct gpio_dt_spec fab_id_config[] = { RVP_ID_CONFIG_LIST(DT_DRV_INST(0), - fab_gpios) }; - -const struct gpio_dt_spec board_id_config[] = { RVP_ID_CONFIG_LIST( - DT_DRV_INST(0), board_gpios) }; -#endif /* #if DT_HAS_COMPAT_STATUS_OKAY */ diff --git a/zephyr/projects/intelrvp/src/intel_rvp_led.c b/zephyr/projects/intelrvp/src/intel_rvp_led.c deleted file mode 100644 index 0e4d872963..0000000000 --- a/zephyr/projects/intelrvp/src/intel_rvp_led.c +++ /dev/null @@ -1,168 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "battery.h" -#include "charge_manager.h" -#include "charge_state.h" -#include "chipset.h" -#include "common.h" -#include "console.h" -#include "ec_commands.h" -#include "extpower.h" -#include "hooks.h" -#include "led_common.h" -#include "led_pwm.h" -#include "pwm.h" -#include "timer.h" -#include "util.h" - -/* Battery percentage thresholds to blink at different rates. */ -#define LOW_BATTERY_PERCENTAGE 10 -#define NORMAL_BATTERY_PERCENTAGE 90 - -#define LED_OFF -1 - -#define LED_PULSE_TICK (125 * MSEC) - -#define LED_FAST_PULSE_PERIOD (250 / 125) /* 250 ms */ -#define LED_SLOW_PULSE_PERIOD ((2 * MSEC) / 125) /* 2 sec */ - -struct led_pulse_data { - bool led_is_pulsing; - uint8_t led_pulse_period; - uint8_t led_tick_count; -}; - -static struct led_pulse_data rvp_led[CONFIG_LED_PWM_COUNT]; - -static void pulse_led_deferred(void); -DECLARE_DEFERRED(pulse_led_deferred); - -static void pulse_led_deferred(void) -{ - int i = 0; - bool call_deferred = false; - - for (i = 0; i < CONFIG_LED_PWM_COUNT; i++) { - if (!rvp_led[i].led_is_pulsing) { - rvp_led[i].led_tick_count = 0; - continue; - } - - /* - * LED will be in ON state first half of the pulse period - * and in OFF state in second half of the pulse period. - */ - if (rvp_led[i].led_tick_count < - (rvp_led[i].led_pulse_period >> 1)) - set_pwm_led_color(i, EC_LED_COLOR_GREEN); - else - set_pwm_led_color(i, LED_OFF); - - rvp_led[i].led_tick_count = (rvp_led[i].led_tick_count + 1) % - rvp_led[i].led_pulse_period; - call_deferred = true; - } - - if (call_deferred) - hook_call_deferred(&pulse_led_deferred_data, LED_PULSE_TICK); -} - -static void pulse_leds(enum pwm_led_id id, int period) -{ - rvp_led[id].led_pulse_period = period; - rvp_led[id].led_is_pulsing = true; - - pulse_led_deferred(); -} - -static void update_charger_led(enum pwm_led_id id) -{ - enum charge_state chg_st = charge_get_state(); - - /* - * The colors listed below are the default, but can be overridden. - * - * Fast Flash = Charging error - * Slow Flash = Discharging - * LED on = Charging - * LED off = No Charger connected - */ - if (chg_st == PWR_STATE_CHARGE || - chg_st == PWR_STATE_CHARGE_NEAR_FULL) { - /* Charging: LED ON */ - rvp_led[id].led_is_pulsing = false; - set_pwm_led_color(id, EC_LED_COLOR_GREEN); - } else if (chg_st == PWR_STATE_DISCHARGE || - chg_st == PWR_STATE_DISCHARGE_FULL) { - if (extpower_is_present()) { - /* Discharging: - * Flash slower (2 second period, 100% duty cycle) - */ - pulse_leds(id, LED_SLOW_PULSE_PERIOD); - } else { - /* No Charger connected: LED OFF */ - rvp_led[id].led_is_pulsing = false; - set_pwm_led_color(id, LED_OFF); - } - } else if (chg_st == PWR_STATE_ERROR) { - /* Charging error: - * Flash faster (250 ms period, 100% duty cycle) - */ - pulse_leds(id, LED_FAST_PULSE_PERIOD); - } else { - /* LED OFF */ - rvp_led[id].led_is_pulsing = false; - set_pwm_led_color(id, LED_OFF); - } -} - -static void update_battery_led(enum pwm_led_id id) -{ - /* - * Fast Flash = Low Battery - * Slow Flash = Normal Battery - * LED on = Full Battery - * LED off = No Battery - */ - if (battery_is_present() == BP_YES) { - int batt_percentage = charge_get_percent(); - - if (batt_percentage < LOW_BATTERY_PERCENTAGE) { - /* Low Battery: - * Flash faster (250 ms period, 100% duty cycle) - */ - pulse_leds(id, LED_FAST_PULSE_PERIOD); - } else if (batt_percentage < NORMAL_BATTERY_PERCENTAGE) { - /* Normal Battery: - * Flash slower (2 second period, 100% duty cycle) - */ - pulse_leds(id, LED_SLOW_PULSE_PERIOD); - } else { - /* Full Battery: LED ON */ - rvp_led[id].led_is_pulsing = false; - set_pwm_led_color(id, EC_LED_COLOR_GREEN); - } - } else { - /* No Battery: LED OFF */ - rvp_led[id].led_is_pulsing = false; - set_pwm_led_color(id, LED_OFF); - } -} - -static void init_rvp_leds_off(void) -{ - /* Turn off LEDs such that they are in a known state with zero duty. */ - set_pwm_led_color(PWM_LED0, LED_OFF); - set_pwm_led_color(PWM_LED1, LED_OFF); -} -DECLARE_HOOK(HOOK_INIT, init_rvp_leds_off, HOOK_PRIO_POST_PWM); - -static void update_led(void) -{ - update_battery_led(PWM_LED0); - update_charger_led(PWM_LED1); -} -DECLARE_HOOK(HOOK_SECOND, update_led, HOOK_PRIO_DEFAULT); diff --git a/zephyr/projects/intelrvp/src/intelrvp.c b/zephyr/projects/intelrvp/src/intelrvp.c deleted file mode 100644 index 7098f26cbf..0000000000 --- a/zephyr/projects/intelrvp/src/intelrvp.c +++ /dev/null @@ -1,25 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* TODO: b/218904113: Convert to using Zephyr GPIOs */ -#include "gpio.h" -#include "hooks.h" - -static void board_init(void) -{ - /* Enable SOC SPI */ - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(ec_spi_oe_mecc), 1); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_LAST); - -__override void intel_x86_sys_reset_delay(void) -{ - /* - * From MAX6818 Data sheet, Range of 'Debounce Duaration' is - * Minimum - 20 ms, Typical - 40 ms, Maximum - 80 ms. - * See b/153128296. - */ - udelay(60 * MSEC); -} diff --git a/zephyr/projects/intelrvp/src/usb_pd_policy_mecc_1_1.c b/zephyr/projects/intelrvp/src/usb_pd_policy_mecc_1_1.c deleted file mode 100644 index a194b358f1..0000000000 --- a/zephyr/projects/intelrvp/src/usb_pd_policy_mecc_1_1.c +++ /dev/null @@ -1,106 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "console.h" -#include "gpio.h" -#include "intelrvp.h" -#include "usb_mux.h" -#include "usbc_ppc.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) - -static inline void board_pd_set_vbus_discharge(int port, bool enable) -{ - if (tcpc_aic_gpios[port].ppc_intr_handler) { - ppc_discharge_vbus(port, enable); - } else { - tcpc_discharge_vbus(port, enable); - } -} - -int pd_set_power_supply_ready(int port) -{ - int rv; - - /* Disable charging. */ - if (tcpc_aic_gpios[port].ppc_intr_handler) { - rv = ppc_vbus_sink_enable(port, 0); - } else { - rv = tcpc_config[port].drv->set_snk_ctrl(port, 0); - } - - if (rv) { - return rv; - } - - board_pd_set_vbus_discharge(port, false); - - /* Provide Vbus. */ - if (tcpc_aic_gpios[port].ppc_intr_handler) { - rv = ppc_vbus_source_enable(port, 1); - } else { - tcpc_config[port].drv->set_src_ctrl(port, 1); - } - - if (rv) { - return rv; - } - - /* Notify host of power info change. */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); - - return EC_SUCCESS; -} - -void pd_power_supply_reset(int port) -{ - int prev_en; - - prev_en = board_vbus_source_enabled(port); - - /* Disable VBUS. */ - if (tcpc_aic_gpios[port].ppc_intr_handler) { - ppc_vbus_source_enable(port, 0); - } else { - tcpc_config[port].drv->set_src_ctrl(port, 0); - } - - /* Enable discharge if we were previously sourcing 5V */ - if (prev_en) { - board_pd_set_vbus_discharge(port, true); - } - - /* Notify host of power info change. */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); -} - -int pd_check_vconn_swap(int port) -{ - /* Only allow vconn swap if PP3300 rail is enabled */ - return gpio_get_level(GPIO_EN_PP3300_A); -} - -int pd_snk_is_vbus_provided(int port) -{ - if (tcpc_aic_gpios[port].ppc_intr_handler) { - return ppc_is_vbus_present(port); - } else { - return tcpc_config[port].drv->check_vbus_level(port, - VBUS_PRESENT); - } -} - -int board_vbus_source_enabled(int port) -{ - if (is_typec_port(port)) { - if (tcpc_aic_gpios[port].ppc_intr_handler) { - return ppc_is_sourcing_vbus(port); - } else { - return tcpc_config[port].drv->get_src_ctrl(port); - } - } - return 0; -} diff --git a/zephyr/projects/intelrvp/zephyr_ap_pwrseq.conf b/zephyr/projects/intelrvp/zephyr_ap_pwrseq.conf deleted file mode 100644 index 1ef365a8fa..0000000000 --- a/zephyr/projects/intelrvp/zephyr_ap_pwrseq.conf +++ /dev/null @@ -1,9 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# Zephyr Inbuilt AP Power Sequencing Config -CONFIG_AP_PWRSEQ=y -CONFIG_X86_NON_DSX_PWRSEQ_CONSOLE=y -CONFIG_X86_NON_DSX_PWRSEQ_HOST_CMD=y -CONFIG_AP_PWRSEQ_S0IX=y |