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| author | Yuval Peress <peress@chromium.org> | 2021-02-08 00:20:14 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-02-09 20:19:27 +0000 |
| commit | 6c2dd462a21e2eb6d376a82fe6d889aa4013c487 (patch) | |
| tree | 51bd1f2c556c949c1ec28f2126ad27e7e1605477 /zephyr/projects/kohaku | |
| parent | 4180c1e745c35d1376820f41b4991c3366670d1c (diff) | |
| download | chrome-ec-6c2dd462a21e2eb6d376a82fe6d889aa4013c487.tar.gz | |
zephyr: volteer: update header information using Kconfig
Make npcx builds done by zephyr have valid format, this means:
1. Only the first section (RO) should have the header.
2. The header should use the chip information or add new Kconfig
values if needed.
3. This should not be done per board (one centralized place).
Move the cmake logic to generate the header via ecst.py script (
located in the zephyr repository and is used to generate the header
for the npcx chips) to a common place: zephyr/CMakeLists.txt. With
that change, the board-specific CMakeLists.txt is now removed, to
be replaced with a call to set ECST_CHIP_ARG. This value must be
set because zephyr only defines SOC_NPCX7M6FB while our specific chip
is different.
For the same reason, both volteer and kohaku require overriding
zephyr's default CONFIG_FLASH_SIZE for the npcx7m6fb.
Additionally, each build (RO/RW) will no longer generate the final
output using the board's name. This will help zmake find the image
with the header without requiring additional arguments.
BRANCH=none
BUG=b:164421798
TEST=build volteer, flash the joined binary, see it boot
TEST=build kohaku
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I418c138e33812c411503f8260fdaa85059a737c9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2682173
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'zephyr/projects/kohaku')
3 files changed, 3 insertions, 17 deletions
diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/CMakeLists.txt b/zephyr/projects/kohaku/boards/arm/kohaku/CMakeLists.txt deleted file mode 100644 index c30e568f3e..0000000000 --- a/zephyr/projects/kohaku/boards/arm/kohaku/CMakeLists.txt +++ /dev/null @@ -1,15 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# find ECST tool for generating npcx header used by ROM code - -# This calls into a helper script in the npcx eval board directory; this script -# should be moved into a better location (e.g. chip series directory) - -set_property(GLOBAL APPEND PROPERTY extra_post_build_commands - COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/boards/arm/npcx7m6fb_evb/support/ecst.py - -i ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.bin - -o ${TARGET_IMAGE_FILE} -nohcrc -nofcrc - -chip npcx7m6 -flashsize 8 -spimaxclk 50 -spireadmode dual -) diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/board.cmake b/zephyr/projects/kohaku/boards/arm/kohaku/board.cmake index 08dc070886..3ce47418ca 100644 --- a/zephyr/projects/kohaku/boards/arm/kohaku/board.cmake +++ b/zephyr/projects/kohaku/boards/arm/kohaku/board.cmake @@ -2,5 +2,4 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -# This is file path you actually flash to the target. -set(TARGET_IMAGE_FILE ${PROJECT_BINARY_DIR}/zephyr_kohaku.bin) +set(ECST_CHIP_ARG npcx7m6) diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig index 0c4fb93bf9..ed72521e26 100644 --- a/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig +++ b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig @@ -51,3 +51,5 @@ CONFIG_CROS_EC_RW_MEM_OFF=0x30000 # (CONFIG_CROS_EC_FLASH_SIZE - CONFIG_CROS_EC_RW_MEM_OFF - # CONFIG_CROS_EC_RO_MEM_OFF) CONFIG_CROS_EC_RW_SIZE=0x30000 + +CONFIG_FLASH_SIZE=512 |