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| author | Bernardo Perez Priego <bernardo.perez.priego@intel.com> | 2022-04-04 17:50:40 -0700 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-04-16 01:38:20 +0000 |
| commit | e57d5c835eb36ba19862f449c5c08bebd2fcd7e8 (patch) | |
| tree | b1d787b0faac36fca23bdac03ab8fde29c5ca755 /zephyr/projects/nissa/src/board_power.c | |
| parent | 6782c980921c397d31f66e1c1825ed19ddeb508e (diff) | |
| download | chrome-ec-e57d5c835eb36ba19862f449c5c08bebd2fcd7e8.tar.gz | |
ap_pwrseq: nivviks: Make use of ADC turn on/off feature
This will save power on CPU by turning on ADC only when is required.
This required adding a few power state handlers on board power.
BUG=b:228222441
TEST=zmake build nivviks; flash & run
BRANCH=None
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change-Id: Iec9e60d7719a233a5274123aecbaac95c6fda1aa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3569767
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Andrew McRae <amcrae@google.com>
Commit-Queue: Andrew McRae <amcrae@google.com>
Diffstat (limited to 'zephyr/projects/nissa/src/board_power.c')
| -rw-r--r-- | zephyr/projects/nissa/src/board_power.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/zephyr/projects/nissa/src/board_power.c b/zephyr/projects/nissa/src/board_power.c index 6524fbec40..83c693e897 100644 --- a/zephyr/projects/nissa/src/board_power.c +++ b/zephyr/projects/nissa/src/board_power.c @@ -21,6 +21,8 @@ LOG_MODULE_DECLARE(ap_pwrseq, LOG_LEVEL_INF); #define X86_NON_DSX_ADLP_NONPWRSEQ_FORCE_SHUTDOWN_TO_MS 5 +static bool s0_stable; + static void generate_ec_soc_dsw_pwrok_handler(int delay) { int in_sig_val = power_signal_get(PWR_DSW_PWROK); @@ -36,6 +38,12 @@ void board_ap_power_force_shutdown(void) { int timeout_ms = X86_NON_DSX_ADLP_NONPWRSEQ_FORCE_SHUTDOWN_TO_MS; + if (s0_stable) { + /* Enable these power signals in case of sudden shutdown */ + power_signal_enable(PWR_DSW_PWROK); + power_signal_enable(PWR_PG_PP1P05); + } + power_signal_set(PWR_EC_PCH_RSMRST, 1); power_signal_set(PWR_EC_SOC_DSW_PWROK, 0); @@ -64,10 +72,17 @@ void board_ap_power_force_shutdown(void) if (power_signal_get(PWR_DSW_PWROK)) LOG_WRN("DSW_PWROK didn't go low! Assuming G3."); + + power_signal_disable(PWR_DSW_PWROK); + power_signal_disable(PWR_PG_PP1P05); + s0_stable = false; } void board_ap_power_action_g3_s5(void) { + power_signal_enable(PWR_DSW_PWROK); + power_signal_enable(PWR_PG_PP1P05); + LOG_DBG("Turning on PWR_EN_PP5000_A and PWR_EN_PP3300_A"); power_signal_set(PWR_EN_PP5000_A, 1); power_signal_set(PWR_EN_PP3300_A, 1); @@ -77,8 +92,31 @@ void board_ap_power_action_g3_s5(void) generate_ec_soc_dsw_pwrok_handler( AP_PWRSEQ_DT_VALUE(dsw_pwrok_delay)); + s0_stable = false; +} + +void board_ap_power_action_s3_s0(void) +{ + s0_stable = false; +} + +void board_ap_power_action_s0_s3(void) +{ + power_signal_enable(PWR_DSW_PWROK); + power_signal_enable(PWR_PG_PP1P05); + s0_stable = false; } +void board_ap_power_action_s0(void) +{ + if (s0_stable) { + return; + } + LOG_INF("Reaching S0"); + power_signal_disable(PWR_DSW_PWROK); + power_signal_disable(PWR_PG_PP1P05); + s0_stable = true; +} int board_ap_power_assert_pch_power_ok(void) { |