diff options
| author | Wai-Hong Tam <waihong@google.com> | 2021-08-18 14:12:01 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-08-18 23:02:54 +0000 |
| commit | fb89306a92228081e4203a33725357dd9754b6c8 (patch) | |
| tree | d544cd8738dbc3bcf025e28d1be48d7d5279e996 /zephyr/projects | |
| parent | 039a19e8d2393f169ae81680505bc5c9c4cd4b12 (diff) | |
| download | chrome-ec-fb89306a92228081e4203a33725357dd9754b6c8.tar.gz | |
herobrine_npcx9: Make WARM_RESET and POWER_GOOD power signals
Herobrine uses the SPI mux to separate the SPI bus from the AP when
programming the AP firmware. Overdriving signals on WARM_RESET is not
needed. Make the WARM_RESET and POWER_GOOD GPIOs like normal power
signals.
BRANCH=None
BUG=b:187098628
TEST=Booted AP properly. Flashed the AP firmware, even AP is off.
Change-Id: Ie8e42de8174bc71c29424697810e46a2367e3e54
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3105006
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'zephyr/projects')
| -rw-r--r-- | zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h b/zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h index f1a255399f..00ab9bd98c 100644 --- a/zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h +++ b/zephyr/projects/herobrine/herobrine_npcx9/include/gpio_map.h @@ -38,11 +38,10 @@ GPIO_INT(GPIO_VOLUME_UP_L, GPIO_INT_EDGE_BOTH, button_interrupt) \ GPIO_INT(GPIO_AP_RST_L, GPIO_INT_EDGE_BOTH, chipset_ap_rst_interrupt) \ GPIO_INT(GPIO_AP_SUSPEND, GPIO_INT_EDGE_BOTH, power_signal_interrupt) \ - GPIO_INT(GPIO_POWER_GOOD, GPIO_INT_EDGE_BOTH, \ - chipset_power_good_interrupt) \ + GPIO_INT(GPIO_POWER_GOOD, GPIO_INT_EDGE_BOTH, power_signal_interrupt) \ GPIO_INT(GPIO_PS_HOLD, GPIO_INT_EDGE_BOTH, power_signal_interrupt) \ GPIO_INT(GPIO_WARM_RESET_L, GPIO_INT_EDGE_BOTH, \ - chipset_warm_reset_interrupt) \ + power_signal_interrupt) \ GPIO_INT(GPIO_USB_C0_PD_INT_ODL, GPIO_INT_EDGE_FALLING, \ tcpc_alert_event) \ GPIO_INT(GPIO_USB_C1_PD_INT_ODL, GPIO_INT_EDGE_FALLING, \ |