diff options
| author | Peter Marheine <pmarheine@chromium.org> | 2022-01-28 15:40:20 +1100 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2022-01-28 06:58:30 +0000 |
| commit | b9075a76f80b3b2c3024d9f89d26bf1c032c23a4 (patch) | |
| tree | f6f5827a0abd3d50df982818cb62f4490f82dae8 /zephyr/projects | |
| parent | 6834c7e0a502401c32ca47e2d67bab4574faca76 (diff) | |
| download | chrome-ec-b9075a76f80b3b2c3024d9f89d26bf1c032c23a4.tar.gz | |
nissa/nereid: configure USB-C1 TCPC
It was configured as an EC-internal TCPC, but that was incorrect: that
port (if present) is controlled by a PS8745 combination TCPC and
redriver on the sub-board.
BUG=b:201000844,b:215650649
TEST=zmake build
BRANCH=none
Change-Id: I0304625cf2ea980fe6e43d18721a0d300f4d9e67
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3422857
Reviewed-by: Andrew McRae <amcrae@google.com>
Diffstat (limited to 'zephyr/projects')
| -rw-r--r-- | zephyr/projects/nissa/prj_nereid.conf | 2 | ||||
| -rw-r--r-- | zephyr/projects/nissa/src/nereid/usbc.c | 42 |
2 files changed, 37 insertions, 7 deletions
diff --git a/zephyr/projects/nissa/prj_nereid.conf b/zephyr/projects/nissa/prj_nereid.conf index d786b3bc3a..ce002181fc 100644 --- a/zephyr/projects/nissa/prj_nereid.conf +++ b/zephyr/projects/nissa/prj_nereid.conf @@ -99,7 +99,7 @@ CONFIG_PLATFORM_EC_USB_VID=0x18d1 CONFIG_PLATFORM_EC_USB_PID=0x505a CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT=2 -# TCPC+PPC: ITE on-chip +# TCPC+PPC: ITE on-chip for C0, PS8745 for optional C1 CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=y CONFIG_PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP=y CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT8XXX2=y diff --git a/zephyr/projects/nissa/src/nereid/usbc.c b/zephyr/projects/nissa/src/nereid/usbc.c index 25053095d0..6e4dd33867 100644 --- a/zephyr/projects/nissa/src/nereid/usbc.c +++ b/zephyr/projects/nissa/src/nereid/usbc.c @@ -10,6 +10,8 @@ #include "system.h" #include "driver/charger/sm5803.h" #include "driver/tcpm/it83xx_pd.h" +#include "driver/tcpm/ps8xxx_public.h" +#include "driver/tcpm/tcpci.h" #include "sub_board.h" @@ -24,11 +26,18 @@ struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { .flags = 0, }, { - .bus_type = EC_BUS_TYPE_EMBEDDED, - /* TCPC is embedded within EC so no i2c config needed */ - .drv = &it8xxx2_tcpm_drv, - /* Alert is active-low, push-pull */ - .flags = 0, + /* + * Sub-board: optional PS8745 TCPC+redriver. Works like other + * PS8xxx chips but TCPCI-only; no mux. + */ + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_USB_C1_TCPC, + .addr_flags = PS8751_I2C_ADDR1_FLAGS, + }, + .drv = &tcpci_tcpm_drv, + /* PS8745 implements TCPCI 2.0 */ + .flags = TCPC_FLAGS_TCPCI_REV2_0, }, }; @@ -127,7 +136,28 @@ int board_set_active_charge_port(int port) uint16_t tcpc_get_alert_status(void) { - return 0; + /* + * TCPC 0 is embedded in the EC and processes interrupts in the chip + * code (it83xx/intc.c). This function only needs to poll port C1 if + * present. + */ + uint16_t status = 0; + int regval; + + /* Is the C1 port present and its IRQ line asserted? */ + if (board_get_usb_pd_port_count() == 2 && + !gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c1_int_odl))) { + /* + * C1 IRQ is shared between BC1.2 and TCPC; poll TCPC to see if + * it asserted the IRQ. + */ + if (!tcpc_read16(1, TCPC_REG_ALERT, ®val)) { + if (regval) + status = PD_STATUS_TCPC_ALERT_1; + } + } + + return status; } int pd_check_vconn_swap(int port) |