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author | Firas Sammoura <fsammoura@google.com> | 2022-06-17 16:40:54 +0000 |
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committer | Firas Sammoura <fsammoura@google.com> | 2022-06-17 16:40:54 +0000 |
commit | e5fb0b9ba488614b5684e640530f00821ab7b943 (patch) | |
tree | 9a15b4a98d7987870a1805a33883d0cf9123fc05 /zephyr/shim/chip/mchp/system.c | |
parent | ad46fafb27c419bd416bfecc76df6c6426a99b32 (diff) | |
parent | a46d3f3feaac0d69012f61b66f652bff991d05a7 (diff) | |
download | chrome-ec-e5fb0b9ba488614b5684e640530f00821ab7b943.tar.gz |
Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-release
Generated by: ./util/update_release_branch.py --board bloonchipper --relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-fpmcu-bloonchipper-release
Relevant changes:
git log --oneline ad46fafb27..a46d3f3fea -- board/hatch_fp
board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh
981fb88cf8 docs/fingerprint: Resolve contradictory FPMCU factory flashing instructions
38ef6b7306 tree: Files should end with single newline
60032a8828 docs/fingerprint: Clean up formatting in fingerprint-factory-quick-guide.md
f49eb6f894 docs/fingerprint: Run mdformat
64aa5fc7bb docs/fingerprint: Add links to info on fuzz testing
8bd99cc434 fpsensor: Use correct return type
2b2d7a991d fpsensor: Use correct return type
BRANCH=None
BUG=b:234772776 b:234181908 b:172020503 b:234181908
TEST=`make -j buildall`
Cq-Include-Trybots: chromeos/cq:cq-orchestrator
Signed-off-by: Firas Sammoura <fsammoura@google.com>
Change-Id: I18b58de542c8b439d0f9327a7d4f0ec897da080f
Diffstat (limited to 'zephyr/shim/chip/mchp/system.c')
-rw-r--r-- | zephyr/shim/chip/mchp/system.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/zephyr/shim/chip/mchp/system.c b/zephyr/shim/chip/mchp/system.c index f4e0d09d4d..25fdfc9897 100644 --- a/zephyr/shim/chip/mchp/system.c +++ b/zephyr/shim/chip/mchp/system.c @@ -11,6 +11,29 @@ LOG_MODULE_REGISTER(shim_xec_system, LOG_LEVEL_ERR); +#define GET_BBRAM_OFS(node) \ + DT_PROP(DT_PATH(named_bbram_regions, node), offset) +#define GET_BBRAM_SZ(node) DT_PROP(DT_PATH(named_bbram_regions, node), size) + +/* + * Reset image type back to RO in BBRAM as watchdog resets. + * Watchdog reset will reset EC chip, ROM loader loads RO + * image stored in SPI flash chip in default. + */ +void cros_chip_wdt_handler(const struct device *wdt_dev, int channel_id) +{ + const struct device *bbram_dev = DEVICE_DT_GET(DT_NODELABEL(bbram)); + uint32_t value = EC_IMAGE_RO; + + if (!device_is_ready(bbram_dev)) { + LOG_ERR("WDT ISR: device %s is not ready", bbram_dev->name); + return; + } + + bbram_write(bbram_dev, GET_BBRAM_OFS(ec_img_load), + GET_BBRAM_SZ(ec_img_load), (uint8_t *)&value); +} + static void chip_bbram_status_check(void) { const struct device *bbram_dev; |