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author | Yuval Peress <peress@chromium.org> | 2021-06-03 00:25:31 -0600 |
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committer | Commit Bot <commit-bot@chromium.org> | 2021-06-06 05:44:06 +0000 |
commit | 38f66c031143b89d40f9b8499242ca087d16ab8c (patch) | |
tree | c14501a21d4e07e50a54810ef6c10eed21da9eee /zephyr/shim/chip/npcx/include/system_chip.h | |
parent | 03831f38edf58dfe2bc50b37a73b696a00ec5fd6 (diff) | |
download | chrome-ec-38f66c031143b89d40f9b8499242ca087d16ab8c.tar.gz |
zephyr: npcx9: add __start_gdma function to .lowpower_ram2 section
This function is needed for the flash api workaround.
BRANCH=none
BUG=b:188605676
TEST=build brya
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I3ddd72e7664755f07bc967695b1502a43af3e57a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2936008
Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'zephyr/shim/chip/npcx/include/system_chip.h')
-rw-r--r-- | zephyr/shim/chip/npcx/include/system_chip.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/zephyr/shim/chip/npcx/include/system_chip.h b/zephyr/shim/chip/npcx/include/system_chip.h index e2e9d5379d..44a60b47b5 100644 --- a/zephyr/shim/chip/npcx/include/system_chip.h +++ b/zephyr/shim/chip/npcx/include/system_chip.h @@ -6,6 +6,13 @@ #ifndef __CROS_EC_SYSTEM_CHIP_H_ #define __CROS_EC_SYSTEM_CHIP_H_ +#define SET_BIT(reg, bit) ((reg) |= (0x1 << (bit))) +#define CLEAR_BIT(reg, bit) ((reg) &= (~(0x1 << (bit)))) + +/* TODO(b:179900857) Clean this up too */ +#undef IS_BIT_SET +#define IS_BIT_SET(reg, bit) (((reg) >> (bit)) & (0x1)) + /*****************************************************************************/ /* Memory mapping */ #define CONFIG_LPRAM_BASE 0x40001400 /* memory address of lpwr ram */ |