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| author | Yuval Peress <peress@chromium.org> | 2021-02-02 13:09:24 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-02-05 20:16:06 +0000 |
| commit | c479096edd777fb3c006992fcbea9d8628c6a75e (patch) | |
| tree | 3a40c244d55c4f9e45730f845a254a8c590aebcf /zephyr/shim/include/bbram.h | |
| parent | 5925c1c63f1be19ffc3ec91a9d6c11761f02dcad (diff) | |
| download | chrome-ec-c479096edd777fb3c006992fcbea9d8628c6a75e.tar.gz | |
zephyr: Move bbram logic to devicetree
Move all bbram logic to a common npcx.dtsi file included in
both volteer and kohaku. Updates the bbram access logic in
zephyr/shim/src/system.c to use devicetree. Updates the unit
tests to match.
BRANCH=none
BUG=b:178807203
TEST=zmake testall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I2a7c65b92a395c622e8cfe751e4e98b3173e38fb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2669271
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'zephyr/shim/include/bbram.h')
| -rw-r--r-- | zephyr/shim/include/bbram.h | 33 |
1 files changed, 3 insertions, 30 deletions
diff --git a/zephyr/shim/include/bbram.h b/zephyr/shim/include/bbram.h index e0ccf88f36..3eba4b157b 100644 --- a/zephyr/shim/include/bbram.h +++ b/zephyr/shim/include/bbram.h @@ -6,37 +6,10 @@ #ifndef ZEPHYR_SHIM_INCLUDE_BBRAM_H_ #define ZEPHYR_SHIM_INCLUDE_BBRAM_H_ -/** - * Layout of the battery-backed RAM region. - * TODO (b:178807203) Migrate these values to devicetree registers. - */ -enum bbram_data_index { - /** General-purpose scratchpad */ - BBRM_DATA_INDEX_SCRATCHPAD = 0, - /** Saved reset flags */ - BBRM_DATA_INDEX_SAVED_RESET_FLAGS = 4, - /** Wake reasons for hibernate */ - BBRM_DATA_INDEX_WAKE = 8, - /** USB-PD saved port0 state */ - BBRM_DATA_INDEX_PD0 = 12, - /** USB-PD saved port1 state */ - BBRM_DATA_INDEX_PD1 = 13, - /** Vboot EC try slot */ - BBRM_DATA_INDEX_TRY_SLOT = 14, - /** USB-PD saved port2 state */ - BBRM_DATA_INDEX_PD2 = 15, - /** RAM log for Booter */ - BBRM_DATA_INDEX_RAMLOG = 32, - /** Flag to indicate validity of panic data starting at index 36. */ - BBRM_DATA_INDEX_PANIC_FLAGS = 35, - /** Panic data (index 35-63)*/ - BBRM_DATA_INDEX_PANIC_BKUP = 36, - /** The start time of LCT(4 bytes) */ - BBRM_DATA_INDEX_LCT_TIME = 64, -}; +#include <devicetree.h> -#define BBRAM_SIZE DT_REG_SIZE(DT_NODELABEL(bbram)) -#define BBRAM_ADDR DT_REG_ADDR(DT_NODELABEL(bbram)) +#define BBRAM_SIZE DT_REG_SIZE_BY_NAME(DT_NODELABEL(bbram), memory) +#define BBRAM_ADDR DT_REG_ADDR_BY_NAME(DT_NODELABEL(bbram), memory) #define BBRAM(offset) REG8(BBRAM_ADDR + offset) #define BBRAM_BKUP_STS BBRAM(CONFIG_BBRAM_BKUP_STS) |