zephyr: npcx: add reset cause check

The reset cause will influence the initialization flow. We define some
of initial flow of the reset cause for the following development.

This CL include the following:
1. Add check_reset_cause() which sets the system reset flag.
2. Add chip_bbram_status_check() to clear the error status & show the
error message.
3. Add CONFIG_BOARD_RESET_AFTER_POWER_ON feature.
4. Define the initialize flow for reset cause.

BRANCH=none
BUG=b:178101173
TEST=check the following reset cause by 'sysinfo'
1. power-up
2. reset-pin reset
3. soft by 'reboot' console command
4. watchdog by 'waitms 2000'

Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I515868d8cda4544fdbe782210b0108b4dda0d8cc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2731180
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>

1 files changed, 173 insertions, 0 deletions

diff --git a/zephyr/shim/src/system.c b/zephyr/shim/src/system.c
index bf421ad8ae..1e17dcea13 100644
--- a/zephyr/shim/src/system.c
+++ b/zephyr/shim/src/system.c
@@ -5,18 +5,24 @@
 
 #include <device.h>
 #include <drivers/cros_bbram.h>
+#include <drivers/cros_system.h>
+#include <logging/log.h>
 
 #include "bbram.h"
 #include "common.h"
 #include "cros_version.h"
 #include "system.h"
+#include "watchdog.h"
 
 #define BBRAM_REGION_PD0	DT_PATH(named_bbram_regions, pd0)
 #define BBRAM_REGION_PD1	DT_PATH(named_bbram_regions, pd1)
 #define BBRAM_REGION_PD2	DT_PATH(named_bbram_regions, pd2)
 #define BBRAM_REGION_TRY_SLOT	DT_PATH(named_bbram_regions, try_slot)
 
+LOG_MODULE_REGISTER(shim_system, LOG_LEVEL_ERR);
+
 STATIC_IF_NOT(CONFIG_ZTEST) const struct device *bbram_dev;
+STATIC_IF_NOT(CONFIG_ZTEST) const struct device *sys_dev;
 
 #if DT_NODE_EXISTS(DT_NODELABEL(bbram))
 static int system_init(const struct device *unused)
@@ -95,3 +101,170 @@ const char *system_get_chip_revision(void)
 {
 	return "";
 }
+
+void system_reset(int flags)
+{
+	int err;
+	uint32_t save_flags;
+
+	if (!sys_dev)
+		LOG_ERR("sys_dev get binding failed");
+
+	/* Disable interrupts to avoid task swaps during reboot */
+	interrupt_disable_all();
+
+	/*  Get flags to be saved in BBRAM */
+	system_encode_save_flags(flags, &save_flags);
+
+	/* Store flags to battery backed RAM. */
+	chip_save_reset_flags(save_flags);
+
+	/* If WAIT_EXT is set, then allow 10 seconds for external reset */
+	if (flags & SYSTEM_RESET_WAIT_EXT) {
+		int i;
+
+		/* Wait 10 seconds for external reset */
+		for (i = 0; i < 1000; i++) {
+			watchdog_reload();
+			udelay(10000);
+		}
+	}
+
+	err = cros_system_soc_reset(sys_dev);
+
+	if (err < 0)
+		LOG_ERR("soc reset failed");
+
+	/* should never return */
+	while (1)
+		continue;
+}
+
+static int check_reset_cause(void)
+{
+	uint32_t chip_flags = 0; /* used to write back to the BBRAM */
+	uint32_t system_flags = chip_read_reset_flags(); /* system reset flag */
+	int chip_reset_cause = 0; /* chip-level reset cause */
+
+	chip_reset_cause = cros_system_get_reset_cause(sys_dev);
+	if (chip_reset_cause < 0)
+		return -1;
+
+	/*
+	 * TODO(b/182876692): Implement CONFIG_POWER_BUTTON_INIT_IDLE &
+	 * CONFIG_BOARD_FORCE_RESET_PIN. Also, check the hibernate flow if PSL
+	 * merge into tot.
+	 */
+
+	switch (chip_reset_cause) {
+	case POWERUP:
+		system_flags |= EC_RESET_FLAG_POWER_ON;
+		if (IS_ENABLED(CONFIG_BOARD_RESET_AFTER_POWER_ON)) {
+			/*
+			 * Power-on restart, so set a flag and save it for the
+			 * next imminent reset. Later code will check for this
+			 * flag and wait for the second reset.
+			 */
+			system_flags |= EC_RESET_FLAG_INITIAL_PWR;
+			chip_flags |= EC_RESET_FLAG_INITIAL_PWR;
+		}
+		break;
+
+	case VCC1_RST_PIN:
+		/*
+		 * If configured, check the saved flags to see whether the
+		 * previous restart was a power-on, in which case treat this
+		 * restart as a power-on as well. This is to workaround the fact
+		 * that the H1 will reset the EC at power up.
+		 */
+		if (IS_ENABLED(CONFIG_BOARD_RESET_AFTER_POWER_ON)) {
+			if (system_flags & EC_RESET_FLAG_INITIAL_PWR) {
+				/*
+				 * The previous restart was a power-on so treat
+				 * this restart as that, and clear the flag so
+				 * later code will not wait for the second
+				 * reset.
+				 */
+				system_flags = (system_flags &
+						~EC_RESET_FLAG_INITIAL_PWR) |
+					       EC_RESET_FLAG_POWER_ON;
+			} else {
+				/*
+				 * No previous reset flag, so this is a
+				 * subsequent restart i.e any restarts after the
+				 * second restart caused by the H1.
+				 */
+				system_flags |= EC_RESET_FLAG_RESET_PIN;
+			}
+		} else {
+			system_flags |= EC_RESET_FLAG_RESET_PIN;
+		}
+		break;
+
+	case DEBUG_RST:
+		system_flags |= EC_RESET_FLAG_SOFT;
+		break;
+
+	case WATCHDOG_RST:
+		/*
+		 * Don't set EC_RESET_FLAG_WATCHDOG flag if watchdog is issued
+		 * by system_reset in order to distinguish reset cause is panic
+		 * reason or not.
+		 */
+		if (!(system_flags & (EC_RESET_FLAG_SOFT | EC_RESET_FLAG_HARD)))
+			system_flags |= EC_RESET_FLAG_WATCHDOG;
+		break;
+	}
+
+	/* Clear & set the reset flags for the following reset. */
+	chip_save_reset_flags(chip_flags);
+
+	/* Set the system reset flags. */
+	system_set_reset_flags(system_flags);
+
+	return 0;
+}
+
+static int system_preinitialize(const struct device *unused)
+{
+	ARG_UNUSED(unused);
+
+	sys_dev = device_get_binding("CROS_SYSTEM");
+	if (!sys_dev) {
+		/*
+		 * TODO(b/183022804): This should not happen in normal
+		 * operation. Check whether the error check can be change to
+		 * build-time error, or at least a fatal run-time error.
+		 */
+		LOG_ERR("sys_dev gets binding failed");
+		return -1;
+	}
+
+	/* check the reset cause */
+	if (check_reset_cause() != 0) {
+		LOG_ERR("check the reset cause failed");
+		return -1;
+	}
+
+	/*
+	 * For some boards on power-on, the EC is reset by the H1 after
+	 * power-on, so the EC sees 2 resets. This config enables the EC to save
+	 * a flag on the first power-up restart, and then wait for the second
+	 * reset before any other setup is done (such as GPIOs, timers, UART
+	 * etc.) On the second reset, the saved flag is used to detect the
+	 * previous power-on, and treat the second reset as a power-on instead
+	 * of a reset.
+	 */
+	if (IS_ENABLED(CONFIG_BOARD_RESET_AFTER_POWER_ON) &&
+	    system_get_reset_flags() & EC_RESET_FLAG_INITIAL_PWR) {
+		/* TODO(b/182875520): Change to use 2 second delay. */
+		while (1)
+			continue;
+	}
+
+	return 0;
+}
+#if (!defined(CONFIG_ZTEST))
+SYS_INIT(system_preinitialize, PRE_KERNEL_1,
+	 CONFIG_PLATFORM_EC_SYSTEM_PRE_INIT_PRIORITY);
+#endif