diff options
| author | Tim Lin <tim2.lin@ite.corp-partner.google.com> | 2021-09-10 10:29:44 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-09-13 05:33:52 +0000 |
| commit | 9365aa2ef2773e764655774e07230681297ed026 (patch) | |
| tree | 9623e4653d5b948cb6a011dcd6f5445bf7eee322 /zephyr/shim/src/system.c | |
| parent | e7de2313be106dc09fdc2c67eda7c190be5fa3e4 (diff) | |
| download | chrome-ec-9365aa2ef2773e764655774e07230681297ed026.tar.gz | |
zephyr: shim/system: fix APIs of call BBRAM read and writestabilize-14217.B-main
The APIs of BBRAM read and write have been renamed and moved to
drivers/bbram. The related call routines of shim/system.c need to
be fixed.
BUG=b:195843756
BRANCH=none
TEST=the board of asurada and it8xxx2_evb can boot EC and
access bbram successfully after adding this CL.
zmake testall --> pass
Change-Id: I98e51a278a24eeb4bbc92343fe6fc97e3e758e8a
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3153117
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'zephyr/shim/src/system.c')
| -rw-r--r-- | zephyr/shim/src/system.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/zephyr/shim/src/system.c b/zephyr/shim/src/system.c index d6af88a9ff..2614a1fcb4 100644 --- a/zephyr/shim/src/system.c +++ b/zephyr/shim/src/system.c @@ -4,7 +4,7 @@ */ #include <device.h> -#include <drivers/cros_bbram.h> +#include <drivers/bbram.h> #include <drivers/cros_system.h> #include <logging/log.h> @@ -67,7 +67,7 @@ int system_get_bbram(enum system_bbram_idx idx, uint8_t *value) if (rc) return rc; - rc = cros_bbram_read(bbram_dev, offset, size, value); + rc = bbram_read(bbram_dev, offset, size, value); return rc ? EC_ERROR_INVAL : EC_SUCCESS; } @@ -79,8 +79,8 @@ void chip_save_reset_flags(uint32_t flags) return; } - cros_bbram_write(bbram_dev, GET_BBRAM_OFFSET(saved_reset_flags), - GET_BBRAM_SIZE(saved_reset_flags), (uint8_t *)&flags); + bbram_write(bbram_dev, GET_BBRAM_OFFSET(saved_reset_flags), + GET_BBRAM_SIZE(saved_reset_flags), (uint8_t *)&flags); } uint32_t chip_read_reset_flags(void) @@ -92,8 +92,8 @@ uint32_t chip_read_reset_flags(void) return 0; } - cros_bbram_read(bbram_dev, GET_BBRAM_OFFSET(saved_reset_flags), - GET_BBRAM_SIZE(saved_reset_flags), (uint8_t *)&flags); + bbram_read(bbram_dev, GET_BBRAM_OFFSET(saved_reset_flags), + GET_BBRAM_SIZE(saved_reset_flags), (uint8_t *)&flags); return flags; } @@ -105,8 +105,8 @@ int system_set_scratchpad(uint32_t value) return -EC_ERROR_INVAL; } - return cros_bbram_write(bbram_dev, GET_BBRAM_OFFSET(scratchpad), - GET_BBRAM_SIZE(scratchpad), (uint8_t *)&value); + return bbram_write(bbram_dev, GET_BBRAM_OFFSET(scratchpad), + GET_BBRAM_SIZE(scratchpad), (uint8_t *)&value); } int system_get_scratchpad(uint32_t *value) @@ -116,8 +116,8 @@ int system_get_scratchpad(uint32_t *value) return -EC_ERROR_INVAL; } - if (cros_bbram_read(bbram_dev, GET_BBRAM_OFFSET(scratchpad), - GET_BBRAM_SIZE(scratchpad), (uint8_t *)value)) { + if (bbram_read(bbram_dev, GET_BBRAM_OFFSET(scratchpad), + GET_BBRAM_SIZE(scratchpad), (uint8_t *)value)) { return -EC_ERROR_INVAL; } |