diff options
| author | Wealian Liao <whliao@nuvoton.corp-partner.google.com> | 2021-11-03 17:24:40 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-12-02 18:48:57 +0000 |
| commit | 87e264525163f00eb98ab89446d82e41d19e98de (patch) | |
| tree | bda7b827720a45126489a3ae34aecb3468718bdc /zephyr/shim/src | |
| parent | 13434ee2724c1bd11a575bc6d06a163aba9d2d84 (diff) | |
| download | chrome-ec-87e264525163f00eb98ab89446d82e41d19e98de.tar.gz | |
zephyr: Shim nct38xx io expander alert
Zephyr upstream added NCT38XX GPIO support except for TCPC
functionality. The NCT38XX GPIO & TCPC share the same alert pin. The
alert should be handled at the same position.
This CL adds nct38xx_get_gpio_device_from_port() for Cros NCT38XX alert
handler. It can connect Cros TCPC alert & Zephyr NCT38XX GPIO alter
handler. So we can process the GPIO & TCPC alert at Cros task. The
following is the TCPC binding example:
usbc {
compatible = "named-usbc-ports";
#address-cells = <1>;
#size-cells = <0>;
port0: usbc-port@0 {
reg = <0>;
tcpc {
compatible = "nuvoton,nct38xx";
gpio-dev = <&nct3807_gpio>;
};
};
};
BUG=b:203672150
BRANCH=none
TEST=test GPIO interrupt on NCT38XX
Cq-Depend: chromium:3297249
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: Iec355ccb581590d24cc9fcc809449b3654014a40
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3271801
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'zephyr/shim/src')
| -rw-r--r-- | zephyr/shim/src/CMakeLists.txt | 2 | ||||
| -rw-r--r-- | zephyr/shim/src/tcpc_nct38xx.c | 31 |
2 files changed, 33 insertions, 0 deletions
diff --git a/zephyr/shim/src/CMakeLists.txt b/zephyr/shim/src/CMakeLists.txt index 0c795f6b9b..fe9a5a015d 100644 --- a/zephyr/shim/src/CMakeLists.txt +++ b/zephyr/shim/src/CMakeLists.txt @@ -53,3 +53,5 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_WATCHDOG watchdog.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201 bc12_pi3usb9201.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC ppc.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX + tcpc_nct38xx.c) diff --git a/zephyr/shim/src/tcpc_nct38xx.c b/zephyr/shim/src/tcpc_nct38xx.c new file mode 100644 index 0000000000..d18e4ccbbe --- /dev/null +++ b/zephyr/shim/src/tcpc_nct38xx.c @@ -0,0 +1,31 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <device.h> +#include <devicetree.h> + +#include "config.h" +#include "usbc/tcpc_nct38xx.h" + +#define TCPC_PORT(id) DT_REG_ADDR(DT_PARENT(id)) + +#define GPIO_DEV_WITH_COMMA(id) DEVICE_DT_GET(DT_PHANDLE(id, gpio_dev)), + +#define GPIO_DEV_BINDING(id) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, gpio_dev), \ + ([TCPC_PORT(id)] = GPIO_DEV_WITH_COMMA(id)), ()) + +/* NCT38XX GPIO device pool for binding the TCPC port and NCT38XX GPIO device */ +static const struct device + *nct38xx_gpio_devices[CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT] = { + DT_FOREACH_STATUS_OKAY(nuvoton_nct38xx, GPIO_DEV_BINDING) + }; + +const struct device *nct38xx_get_gpio_device_from_port(const int port) +{ + if (port < 0 || port >= CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT) + return NULL; + return nct38xx_gpio_devices[port]; +} |