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| author | Firas Sammoura <fsammoura@google.com> | 2022-06-17 16:40:54 +0000 |
|---|---|---|
| committer | Firas Sammoura <fsammoura@google.com> | 2022-06-17 16:40:54 +0000 |
| commit | e5fb0b9ba488614b5684e640530f00821ab7b943 (patch) | |
| tree | 9a15b4a98d7987870a1805a33883d0cf9123fc05 /zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c | |
| parent | ad46fafb27c419bd416bfecc76df6c6426a99b32 (diff) | |
| parent | a46d3f3feaac0d69012f61b66f652bff991d05a7 (diff) | |
| download | chrome-ec-e5fb0b9ba488614b5684e640530f00821ab7b943.tar.gz | |
Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-release
Generated by: ./util/update_release_branch.py --board bloonchipper --relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-fpmcu-bloonchipper-release
Relevant changes:
git log --oneline ad46fafb27..a46d3f3fea -- board/hatch_fp
board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh
981fb88cf8 docs/fingerprint: Resolve contradictory FPMCU factory flashing instructions
38ef6b7306 tree: Files should end with single newline
60032a8828 docs/fingerprint: Clean up formatting in fingerprint-factory-quick-guide.md
f49eb6f894 docs/fingerprint: Run mdformat
64aa5fc7bb docs/fingerprint: Add links to info on fuzz testing
8bd99cc434 fpsensor: Use correct return type
2b2d7a991d fpsensor: Use correct return type
BRANCH=None
BUG=b:234772776 b:234181908 b:172020503 b:234181908
TEST=`make -j buildall`
Cq-Include-Trybots: chromeos/cq:cq-orchestrator
Signed-off-by: Firas Sammoura <fsammoura@google.com>
Change-Id: I18b58de542c8b439d0f9327a7d4f0ec897da080f
Diffstat (limited to 'zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c')
| -rw-r--r-- | zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c | 33 |
1 files changed, 19 insertions, 14 deletions
diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c index d6430e906c..5183824117 100644 --- a/zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c +++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c @@ -9,27 +9,32 @@ LOG_MODULE_DECLARE(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL); static void ap_off(void) { + power_signal_set(PWR_PCH_PWROK, 0); power_signal_set(PWR_EC_PCH_SYS_PWROK, 0); } /* Generate SYS_PWROK->SOC if needed by system */ -static void generate_sys_pwrok_handler(void) +static void generate_pwrok_handler(void) { + int all_sys_pwrgd_in; + if (power_signal_get(PWR_EC_PCH_SYS_PWROK) == 0) { k_msleep(AP_PWRSEQ_DT_VALUE(sys_pwrok_delay)); - /* - * Loop through all PWROK signals defined by the board and set - * to match the current ALL_SYS_PWRGD input. - */ - if (power_signal_get(PWR_ALL_SYS_PWRGD) == 0) { - LOG_DBG("PG_EC_ALL_SYS_PWRGD deasserted, " - "shutting AP off!"); - ap_off(); - return; - } - LOG_INF("Turning on PWR_EC_PCH_SYS_PWROK"); - power_signal_set(PWR_EC_PCH_SYS_PWROK, 1); } + + all_sys_pwrgd_in = power_signal_get(PWR_ALL_SYS_PWRGD); + /* Loop through all PWROK signals defined by the board */ + if (all_sys_pwrgd_in == 0) { + LOG_DBG("PG_EC_ALL_SYS_PWRGD deasserted, " + "shutting AP off!"); + ap_off(); + return; + } + + power_signal_set(PWR_EC_PCH_SYS_PWROK, all_sys_pwrgd_in); + /* PCH_PWROK is set to combined result of ALL_SYS_PWRGD and SLP_S3 */ + power_signal_set(PWR_PCH_PWROK, all_sys_pwrgd_in && + !power_signal_get(PWR_SLP_S3)); } /* Chipset specific power state machine handler */ @@ -45,7 +50,7 @@ enum power_states_ndsx chipset_pwr_sm_run(enum power_states_ndsx curr_state) break; case SYS_POWER_STATE_S0: /* Send SYS_PWROK->SoC if conditions met */ - generate_sys_pwrok_handler(); + generate_pwrok_handler(); break; default: break; |