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| author | Eric Yilun Lin <yllin@chromium.org> | 2023-02-24 17:29:58 +0800 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-03-10 10:04:30 +0000 |
| commit | 2e8a4cfaae3a5bce52cf3a84ad4541affec37d35 (patch) | |
| tree | 758b4722a8bd9ea2616d30067febbef1aab3bab4 /zephyr | |
| parent | 74b84f2cf60cc3283ff8c9f78e9f184926d530a1 (diff) | |
| download | chrome-ec-2e8a4cfaae3a5bce52cf3a84ad4541affec37d35.tar.gz | |
mt8188: add power signal PMIC_EC_RESETB
Add PMIC_EC_RESETB signal, which is used by PMIC to reset the AP.
After the PMIC hard off triggered, we should wait for the PMIC reset
the AP then we can safely remove the PMIC rail EN_PP4200_S5.
BUG=b:267268982
TEST=scope the power signals changing is expected when
1. PMIC hard off
2. powerkey forcing shutdown
3. AP issue poweroff
BRANCH=none
Change-Id: I945d9f4ebbf6d53288c6503df7254ce448073565
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290680
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Diffstat (limited to 'zephyr')
| -rw-r--r-- | zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml | 3 | ||||
| -rw-r--r-- | zephyr/dts/bindings/gpio/gpio-enum-name.yaml | 1 | ||||
| -rw-r--r-- | zephyr/program/geralt/gpio.dtsi | 4 | ||||
| -rw-r--r-- | zephyr/program/geralt/interrupts.dtsi | 5 | ||||
| -rw-r--r-- | zephyr/program/geralt/power_signal.dtsi | 4 |
5 files changed, 15 insertions, 2 deletions
diff --git a/zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml b/zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml index 9c782d13d3..7c0d0fcff1 100644 --- a/zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml +++ b/zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml @@ -8,7 +8,7 @@ include: power-signal-list.yaml properties: power-signals-required: - default: 5 + default: 6 child-binding: properties: @@ -19,3 +19,4 @@ child-binding: - AP_WDT_ASSERTED - AP_WARM_RST_REQ - PG_PP4200_S5 + - PMIC_AP_RST diff --git a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml index 74b40f2acc..825a866aec 100644 --- a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml +++ b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml @@ -74,6 +74,7 @@ properties: - GPIO_PG_EC_RSMRST_ODL - GPIO_PG_PP4200_S5_OD - GPIO_PMIC_EC_PWRGD + - GPIO_PMIC_EC_RESETB - GPIO_PMIC_KPD_PWR_ODL - GPIO_PMIC_RESIN_L - GPIO_POWER_BUTTON_L diff --git a/zephyr/program/geralt/gpio.dtsi b/zephyr/program/geralt/gpio.dtsi index 6d3e203506..c0d61ea4e0 100644 --- a/zephyr/program/geralt/gpio.dtsi +++ b/zephyr/program/geralt/gpio.dtsi @@ -161,7 +161,9 @@ gpios = <&gpiob 5 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>; }; pmic_ec_resetb: pmic-ec-resetb { - gpios = <&gpioj 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpioj 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_PMIC_EC_RESETB"; }; /* diff --git a/zephyr/program/geralt/interrupts.dtsi b/zephyr/program/geralt/interrupts.dtsi index dd48aa8977..8841eb6e1a 100644 --- a/zephyr/program/geralt/interrupts.dtsi +++ b/zephyr/program/geralt/interrupts.dtsi @@ -71,6 +71,11 @@ flags = <GPIO_INT_EDGE_RISING>; handler = "chipset_reset_request_interrupt"; }; + int_pmic_ec_resetb: pmic-ec-resetb { + irq-pin = <&pmic_ec_resetb>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_signal_interrupt"; + }; int_ap_in_rst: ap-in-rst { irq-pin = <&ap_sysrst_odl_r>; flags = <GPIO_INT_EDGE_BOTH>; diff --git a/zephyr/program/geralt/power_signal.dtsi b/zephyr/program/geralt/power_signal.dtsi index 38ec8a19a2..5adeb682fb 100644 --- a/zephyr/program/geralt/power_signal.dtsi +++ b/zephyr/program/geralt/power_signal.dtsi @@ -27,5 +27,9 @@ power-enum-name = "PG_PP4200_S5"; power-gpio-pin = <&pg_pp4200_s5_od>; }; + pmic_ap_reset { + power-enum-name = "PMIC_AP_RST"; + power-gpio-pin = <&pmic_ec_resetb>; + }; }; }; |