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| author | Eric Yilun Lin <yllin@chromium.org> | 2022-01-13 13:37:52 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2022-01-18 09:18:05 +0000 |
| commit | dde7ada08e791c30c9681f27c0851e03a2b76ac2 (patch) | |
| tree | bb2f50dc3e8c718b537a4324e7097d625a2eeca6 /zephyr | |
| parent | be13da370f6f5a9a3dd4954c82b2fcb3cf54ee83 (diff) | |
| download | chrome-ec-dde7ada08e791c30c9681f27c0851e03a2b76ac2.tar.gz | |
zephyr: kingler: enable bc12
Enable C0 RT1718S and C1 PI3USB9201 BC12 driver.
BUG=b:211363424
TEST=Test C0 and C1 that DCP/CDP/SDP can be detected respectively
BRANCH=none
Change-Id: Iaf6afe6c4b59ae1598bfbccbfd3a15ee17f73926
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3353053
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Tested-by: Eric Yilun Lin <yllin@google.com>
Diffstat (limited to 'zephyr')
| -rw-r--r-- | zephyr/projects/corsola/include/gpio_map.h | 5 | ||||
| -rw-r--r-- | zephyr/projects/corsola/prj_kingler.conf | 2 | ||||
| -rw-r--r-- | zephyr/projects/corsola/src/kingler/usbc_config.c | 24 |
3 files changed, 31 insertions, 0 deletions
diff --git a/zephyr/projects/corsola/include/gpio_map.h b/zephyr/projects/corsola/include/gpio_map.h index a07d30c970..474688e1e5 100644 --- a/zephyr/projects/corsola/include/gpio_map.h +++ b/zephyr/projects/corsola/include/gpio_map.h @@ -44,6 +44,7 @@ #define TCPC_C0_INT() #define TCPC_C1_INT() #define PPC_C0_INT() + #define BC12_C0_INT() #elif defined(CONFIG_SOC_NPCX9M3F) /* The interrupt is configured by dts */ #define AP_SPI_INT() @@ -56,6 +57,9 @@ #define PPC_C0_INT() GPIO_INT(GPIO_USB_C0_PPC_INT_ODL, \ GPIO_INT_EDGE_FALLING, \ ppc_interrupt) + #define BC12_C0_INT() GPIO_INT(GPIO_USB_C0_BC12_INT_ODL, \ + GPIO_INT_EDGE_FALLING, \ + bc12_interrupt) #endif #ifdef CONFIG_PLATFORM_EC_TABLET_MODE @@ -189,6 +193,7 @@ TCPC_C0_INT() \ TCPC_C1_INT() \ PPC_C0_INT() \ + BC12_C0_INT() \ X_EC_GPIO2_INT() #endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/corsola/prj_kingler.conf b/zephyr/projects/corsola/prj_kingler.conf index 48bd1338a1..65cf6d60a8 100644 --- a/zephyr/projects/corsola/prj_kingler.conf +++ b/zephyr/projects/corsola/prj_kingler.conf @@ -85,6 +85,8 @@ CONFIG_PLATFORM_EC_LID_SWITCH=y CONFIG_PLATFORM_EC_USB_A_PORT_COUNT=1 # USBC +CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y +CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n CONFIG_PLATFORM_EC_USBC=y CONFIG_PLATFORM_EC_USBC_PPC=y CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483=y diff --git a/zephyr/projects/corsola/src/kingler/usbc_config.c b/zephyr/projects/corsola/src/kingler/usbc_config.c index 4b487ded8a..46560bff31 100644 --- a/zephyr/projects/corsola/src/kingler/usbc_config.c +++ b/zephyr/projects/corsola/src/kingler/usbc_config.c @@ -7,6 +7,7 @@ #include "charger.h" #include "console.h" +#include "driver/bc12/pi3usb9201_public.h" #include "driver/charger/isl923x_public.h" #include "driver/ppc/nx20p348x.h" #include "driver/ppc/rt1718s.h" @@ -72,6 +73,21 @@ const struct charger_config_t chg_chips[] = { struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {}; struct bc12_config bc12_ports[CONFIG_USB_PD_PORT_MAX_COUNT] = { + [USBC_PORT_C0] = { + .drv = &pi3usb9201_drv, + }, + [USBC_PORT_C1] = { + .drv = &rt1718s_bc12_drv, + } +}; + +const struct pi3usb9201_config_t + pi3usb9201_bc12_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { + [USBC_PORT_C0] = { + .i2c_port = I2C_PORT_USB_C0, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + }, + [USBC_PORT_C1] = { /* unused */ } }; void board_tcpc_init(void) @@ -92,6 +108,9 @@ void board_tcpc_init(void) if (corsola_get_db_type() == CORSOLA_DB_TYPEC) gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); + /* Enable BC1.2 interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); + /* * Initialize HPD to low; after sysjump SOC needs to see * HPD pulse to enable video path @@ -276,3 +295,8 @@ void ppc_interrupt(enum gpio_signal signal) break; } } + +void bc12_interrupt(enum gpio_signal signal) +{ + task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); +} |