zephyr: initial support for kohaku

Kohaku uses the same EC chip as volteer.  Adding a second device will
help give us a tiny bit more build diversity too, which is a good
thing probably.

This just adds a minimal build for kohaku with just UART support.  No
power sequencing, keyboard, USB-C, charging, etc.

BUG=b:177609422
BRANCH=none
TEST=flash onto kohaku, observe working shell and timers

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I277510081c9e06b516b6c29f790e16dd1dfe8028
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2631361
Reviewed-by: Simon Glass <sjg@chromium.org>

13 files changed, 293 insertions, 1 deletions

diff --git a/zephyr/projects/kohaku/CMakeLists.txt b/zephyr/projects/kohaku/CMakeLists.txt
new file mode 100644
index 0000000000..a9dc7e910b
--- /dev/null
+++ b/zephyr/projects/kohaku/CMakeLists.txt
@@ -0,0 +1,9 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+cmake_minimum_required(VERSION 3.13.1)
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(kohaku)
+
+zephyr_include_directories(include)
diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/CMakeLists.txt b/zephyr/projects/kohaku/boards/arm/kohaku/CMakeLists.txt
new file mode 100644
index 0000000000..c30e568f3e
--- /dev/null
+++ b/zephyr/projects/kohaku/boards/arm/kohaku/CMakeLists.txt
@@ -0,0 +1,15 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# find ECST tool for generating npcx header used by ROM code
+
+# This calls into a helper script in the npcx eval board directory; this script
+# should be moved into a better location (e.g. chip series directory)
+
+set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
+  COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/boards/arm/npcx7m6fb_evb/support/ecst.py
+  -i ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.bin
+  -o ${TARGET_IMAGE_FILE} -nohcrc -nofcrc
+  -chip npcx7m6 -flashsize 8 -spimaxclk 50 -spireadmode dual
+)
diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/Kconfig.board b/zephyr/projects/kohaku/boards/arm/kohaku/Kconfig.board
new file mode 100644
index 0000000000..512e905b13
--- /dev/null
+++ b/zephyr/projects/kohaku/boards/arm/kohaku/Kconfig.board
@@ -0,0 +1,7 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+config BOARD_KOHAKU
+	bool "Google Kohaku EC"
+	depends on SOC_NPCX7M6FB # Actually NPCX7M6FC; C has 512K Flash
diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/Kconfig.defconfig b/zephyr/projects/kohaku/boards/arm/kohaku/Kconfig.defconfig
new file mode 100644
index 0000000000..83b97d8ef7
--- /dev/null
+++ b/zephyr/projects/kohaku/boards/arm/kohaku/Kconfig.defconfig
@@ -0,0 +1,10 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+if BOARD_KOHAKU
+
+config BOARD
+	default "kohaku"
+
+endif # BOARD_KOHAKU
diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/board.cmake b/zephyr/projects/kohaku/boards/arm/kohaku/board.cmake
new file mode 100644
index 0000000000..08dc070886
--- /dev/null
+++ b/zephyr/projects/kohaku/boards/arm/kohaku/board.cmake
@@ -0,0 +1,6 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# This is file path you actually flash to the target.
+set(TARGET_IMAGE_FILE  ${PROJECT_BINARY_DIR}/zephyr_kohaku.bin)
diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/kohaku.dts b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku.dts
new file mode 100644
index 0000000000..57aee56633
--- /dev/null
+++ b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku.dts
@@ -0,0 +1,89 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio_defines.h>
+#include <nuvoton/npcx7m6fb.dtsi>
+
+/ {
+	model = "Google Kohaku EC";
+
+	aliases {
+		i2c-0 = &i2c0_0;
+		i2c-1 = &i2c1_0;
+		i2c-2 = &i2c2_0;
+		i2c-3 = &i2c3_0;
+		i2c-5 = &i2c5_0;
+		i2c-7 = &i2c7_0;
+	};
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+		zephyr,flash = &flash0;
+	};
+
+	named-i2c-ports {
+		compatible = "i2c-keys";
+	};
+
+	named-gpios {
+		compatible = "gpio-keys";
+	};
+
+	soc {
+		fiu0: cros-flash@40020000 {
+			compatible = "nuvoton,npcx-cros-flash";
+			reg = <0x40020000 0x2000>;
+			clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL1 2>;
+			size = <0x80000>;
+			label = "FLASH_INTERFACE_UNIT0";
+			pinctrl-0 = <>;
+		};
+	};
+};
+
+/* Update flash size to 512KB from 196KB since we are using C variant */
+&flash0 {
+	reg = <0x10090000 0x80000>;
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&altc_uart1_sl2>; /* Use UART1_SL2 ie. PIN64.65 */
+};
+
+&i2c0_0 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
+
+&i2c1_0 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST_PLUS>;
+};
+
+&i2c2_0 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST_PLUS>;
+};
+
+&i2c3_0 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+};
+
+&i2c5_0 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+};
+
+&i2c7_0 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/kohaku.yaml b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku.yaml
new file mode 100644
index 0000000000..48cc85e7df
--- /dev/null
+++ b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku.yaml
@@ -0,0 +1,19 @@
+#
+# Copyright (c) 2020 Google LLC.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+identifier: kohaku
+name: "Google Kohaku (Samsung Galaxy Chromebook) Embedded Controller"
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+ram: 64
+flash: 512
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig
new file mode 100644
index 0000000000..e68cb4b616
--- /dev/null
+++ b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig
@@ -0,0 +1,52 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# Zephyr Kernel Configuration
+CONFIG_SOC_SERIES_NPCX7=y
+
+# Platform Configuration
+CONFIG_SOC_NPCX7M6FB=y # Actually NPCX7M6FC; C just has 512K Flash
+CONFIG_BOARD_KOHAKU=y
+
+# Serial Drivers
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Pinmux Driver
+CONFIG_PINMUX=y
+
+# GPIO Controller
+CONFIG_GPIO=y
+
+# Clock configuration
+CONFIG_CLOCK_CONTROL=y
+
+# PLL configuration
+CONFIG_CLOCK_NPCX_OSC_CYCLES_PER_SEC=90000000
+CONFIG_CLOCK_NPCX_APB1_PRESCALER=6
+CONFIG_CLOCK_NPCX_APB2_PRESCALER=6
+CONFIG_CLOCK_NPCX_APB3_PRESCALER=6
+
+CONFIG_CORTEX_M_SYSTICK=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=15000000
+
+# The following are valid for all:
+# npcx7m6f, npcx7m6fb, npcx7m6fc, npcx7m6g
+CONFIG_CROS_EC_PROGRAM_MEMORY_BASE=0x10090000
+CONFIG_CROS_EC_RAM_BASE=0x200c0000
+CONFIG_CROS_EC_DATA_RAM_SIZE=0x00010000
+CONFIG_CROS_EC_RAM_SIZE=0x0000f800
+
+CONFIG_CROS_EC_RO_MEM_OFF=0x0
+# (44*1024)
+CONFIG_CROS_EC_RO_SIZE=0x30000
+# (CONFIG_CROS_EC_RO_MEM_OFF + CONFIG_CROS_EC_RO_SIZE)
+CONFIG_CROS_EC_RW_MEM_OFF=0x30000
+# (CONFIG_CROS_EC_FLASH_SIZE - CONFIG_CROS_EC_RW_MEM_OFF -
+#  CONFIG_CROS_EC_RO_MEM_OFF)
+CONFIG_CROS_EC_RW_SIZE=0x30000
diff --git a/zephyr/projects/kohaku/include/gpio_map.h b/zephyr/projects/kohaku/include/gpio_map.h
new file mode 100644
index 0000000000..d248216f8c
--- /dev/null
+++ b/zephyr/projects/kohaku/include/gpio_map.h
@@ -0,0 +1,31 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __ZEPHYR_GPIO_MAP_H
+#define __ZEPHYR_GPIO_MAP_H
+
+#include <devicetree.h>
+#include <gpio_signal.h>
+
+/* TODO(b/177609422): add kohaku GPIOs */
+
+/*
+ * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items.
+ *
+ * Each GPIO_INT requires three parameters:
+ *   gpio_signal - The enum gpio_signal for the interrupt gpio
+ *   interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH)
+ *   handler - The platform/ec interrupt handler.
+ *
+ * Ensure that this files includes all necessary headers to declare all
+ * referenced handler functions.
+ *
+ * For example, one could use the follow definition:
+ * #define EC_CROS_GPIO_INTERRUPTS \
+ *   GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print)
+ */
+#define EC_CROS_GPIO_INTERRUPTS
+
+#endif /* __ZEPHYR_GPIO_MAP_H */
diff --git a/zephyr/projects/kohaku/include/i2c_map.h b/zephyr/projects/kohaku/include/i2c_map.h
new file mode 100644
index 0000000000..bffb72de89
--- /dev/null
+++ b/zephyr/projects/kohaku/include/i2c_map.h
@@ -0,0 +1,11 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __ZEPHYR_CHROME_I2C_MAP_H
+#define __ZEPHYR_CHROME_I2C_MAP_H
+
+/* TODO(b/177609422): add kohaku i2c mappings */
+
+#endif /* __ZEPHYR_CHROME_I2C_MAP_H */
diff --git a/zephyr/projects/kohaku/prj.conf b/zephyr/projects/kohaku/prj.conf
new file mode 100644
index 0000000000..37e56ca74f
--- /dev/null
+++ b/zephyr/projects/kohaku/prj.conf
@@ -0,0 +1,10 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+CONFIG_CROS_EC=y
+CONFIG_PLATFORM_EC=y
+CONFIG_I2C=y
+
+CONFIG_PLATFORM_EC_KEYBOARD=n
+CONFIG_CROS_KB_RAW_NPCX=n
diff --git a/zephyr/projects/kohaku/zmake.yaml b/zephyr/projects/kohaku/zmake.yaml
new file mode 100644
index 0000000000..95831a19f7
--- /dev/null
+++ b/zephyr/projects/kohaku/zmake.yaml
@@ -0,0 +1,33 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+board: kohaku
+supported-zephyr-versions:
+  - v2.4
+
+# Note: below output type is not correct, but good enough for
+# developing right now.  We need to run ecst to pack the RO/RW binary
+# into the special NPCX format, but don't do that now.
+#
+# So, when flashing, please flash
+# build-singleimage/zephyr/zephyr_kohaku.bin instead until Zmake
+# grows a configuration option to handle ecst.
+output-type: raw
+
+# Note: coreboot-sdk toolchain will build, but may have runtime
+# issues.  This is set to "coreboot-sdk" so the automated CQ builder
+# can use it for build tests.
+#
+# For compiling for a real device, you need to use the Zephyr SDK
+# toolchain, which is not available in the chroot (and thus, to the CQ
+# builder).  Please follow
+# https://docs.zephyrproject.org/latest/getting_started/installation_linux.html
+# for instructions on installing the SDK.
+#
+# If you are building outside of the chroot on a gLinux machine, the
+# arm-none-eabi-gcc toolchain seems to work fine.  If you prefer this
+# toolchain, you can pass --toolchain=arm-none-eabi to zmake
+# configure, and that will work as well.
+toolchain: coreboot-sdk
+prefer-zephyr-sdk: true
diff --git a/zephyr/shim/chip/npcx/CMakeLists.txt b/zephyr/shim/chip/npcx/CMakeLists.txt
index 35aba349ba..3df9088428 100644
--- a/zephyr/shim/chip/npcx/CMakeLists.txt
+++ b/zephyr/shim/chip/npcx/CMakeLists.txt
@@ -3,5 +3,5 @@
 # found in the LICENSE file.
 
 zephyr_sources(clock.c)
-zephyr_sources(keyboard_raw.c)
+zephyr_sources_ifdef(CONFIG_CROS_KB_RAW_NPCX  keyboard_raw.c)
 zephyr_sources_ifdef(CONFIG_CROS_EC           system.c)