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authorDino Li <Dino.Li@ite.com.tw>2021-07-16 14:47:32 +0800
committerCommit Bot <commit-bot@chromium.org>2021-07-27 02:50:20 +0000
commit9e0226bf02e94efd042b77ea6008ee9bfb08ed6f (patch)
tree7fc311cceda1192236e4ac7a2c22dd0fe494a4af /zephyr
parent78e3fa0569a53ff146364c5229b1e86c57f1d8e5 (diff)
downloadchrome-ec-9e0226bf02e94efd042b77ea6008ee9bfb08ed6f.tar.gz
zephyr: it8xxx2: shi: enable CS interrupt
This interrupt will be needed in the future to enable low power mode on idle task in S0 state. BRANCH=none BUG=b:185176098 TEST=the interrupt can be triggered correctly on asurada. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I04b066de0129f01adf2c7ba4c9f60788b3d46cbc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3034781 Reviewed-by: Tim2 Lin <tim2.lin@ite.corp-partner.google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Diffstat (limited to 'zephyr')
-rw-r--r--zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts5
-rw-r--r--zephyr/drivers/cros_shi/cros_shi_it8xxx2.c14
-rw-r--r--zephyr/projects/asurada/hayato/include/gpio_map.h4
-rw-r--r--zephyr/projects/it8xxx2_evb/include/gpio_map.h4
4 files changed, 25 insertions, 2 deletions
diff --git a/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts b/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts
index 89ef56bc4c..de7d41abe7 100644
--- a/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts
+++ b/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts
@@ -119,6 +119,11 @@
label = "I2C_E_SDA";
};
+ spi0_cs {
+ gpios = <&gpiom 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
+ enum-name = "GPIO_SPI0_CS";
+ label = "SPI0_CS";
+ };
};
named-adc-channels {
diff --git a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c
index 0c0391afe7..ba2bb9ba5e 100644
--- a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c
+++ b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c
@@ -14,6 +14,7 @@
#include <drivers/pinmux.h>
#include <dt-bindings/pinctrl/it8xxx2-pinctrl.h>
+#include "chipset.h"
#include "console.h"
#include "host_command.h"
@@ -260,6 +261,16 @@ static void shi_ite_int_handler(const void *arg)
}
+void spi_event(enum gpio_signal signal)
+{
+ if (chipset_in_state(CHIPSET_STATE_ON)) {
+ /* Move to processing state */
+ spi_set_state(SPI_STATE_PROCESSING);
+ /* Disable idle task deep sleep bit of SPI in S0. */
+ /* TODO(b:185176098): disable_sleep(SLEEP_MASK_SPI); */
+ }
+}
+
/*
* SHI init priority is behind CONFIG_PLATFORM_EC_GPIO_INIT_PRIORITY to
* overwrite GPIO_INPUT setting of spi chip select pin.
@@ -331,6 +342,9 @@ static int cros_shi_ite_init(const struct device *dev)
IRQ_CONNECT(DT_INST_IRQN(0), 0, shi_ite_int_handler, 0, 0);
irq_enable(DT_INST_IRQN(0));
+ /* Enable SPI chip select pin interrupt */
+ gpio_enable_interrupt(GPIO_SPI0_CS);
+
return 0;
}
SYS_INIT(cros_shi_ite_init, POST_KERNEL, 52);
diff --git a/zephyr/projects/asurada/hayato/include/gpio_map.h b/zephyr/projects/asurada/hayato/include/gpio_map.h
index 8e29b7268c..5f01f290d2 100644
--- a/zephyr/projects/asurada/hayato/include/gpio_map.h
+++ b/zephyr/projects/asurada/hayato/include/gpio_map.h
@@ -66,7 +66,9 @@
GPIO_INT(GPIO_PMIC_EC_PWRGD, \
GPIO_INT_EDGE_BOTH, power_signal_interrupt) \
GPIO_INT(GPIO_AP_EC_WARM_RST_REQ, \
- GPIO_INT_EDGE_RISING, chipset_reset_request_interrupt)
+ GPIO_INT_EDGE_RISING, chipset_reset_request_interrupt) \
+ GPIO_INT(GPIO_SPI0_CS, \
+ GPIO_INT_EDGE_FALLING, spi_event)
#define GPIO_EN_PP5000 GPIO_EN_PP5000_A
diff --git a/zephyr/projects/it8xxx2_evb/include/gpio_map.h b/zephyr/projects/it8xxx2_evb/include/gpio_map.h
index b5b5d22500..c92b71d523 100644
--- a/zephyr/projects/it8xxx2_evb/include/gpio_map.h
+++ b/zephyr/projects/it8xxx2_evb/include/gpio_map.h
@@ -30,6 +30,8 @@
#define EC_CROS_GPIO_INTERRUPTS \
GPIO_INT(GPIO_LID_OPEN, GPIO_INT_EDGE_BOTH, lid_interrupt) \
GPIO_INT(GPIO_POWER_BUTTON_L, \
- GPIO_INT_EDGE_BOTH, power_button_interrupt)
+ GPIO_INT_EDGE_BOTH, power_button_interrupt) \
+ GPIO_INT(GPIO_SPI0_CS, \
+ GPIO_INT_EDGE_FALLING, spi_event)
#endif /* __ZEPHYR_GPIO_MAP_H */