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-rw-r--r--zephyr/CMakeLists.txt1
-rw-r--r--zephyr/Kconfig42
-rw-r--r--zephyr/shim/include/config_chip.h44
-rw-r--r--zephyr/shim/src/CMakeLists.txt1
-rw-r--r--zephyr/shim/src/flash.c39
-rw-r--r--zephyr/shim/src/util.c31
6 files changed, 158 insertions, 0 deletions
diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt
index 514d1eb754..1f72e715be 100644
--- a/zephyr/CMakeLists.txt
+++ b/zephyr/CMakeLists.txt
@@ -64,6 +64,7 @@ zephyr_sources_ifdef(CONFIG_PLATFORM_EC_ESPI "${PLATFORM_EC}/common/espi.c")
zephyr_sources_ifdef(CONFIG_PLATFORM_EC "${PLATFORM_EC}/common/extpower_common.c")
zephyr_sources_ifdef(CONFIG_PLATFORM_EC_EXTPOWER_GPIO
"${PLATFORM_EC}/common/extpower_gpio.c")
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_FLASH "${PLATFORM_EC}/common/flash.c")
zephyr_sources_ifdef(CONFIG_PLATFORM_EC_HOSTCMD "${PLATFORM_EC}/common/host_command.c")
zephyr_sources_ifdef(CONFIG_PLATFORM_EC_HOSTCMD "${PLATFORM_EC}/common/host_event_commands.c")
zephyr_sources_ifdef(CONFIG_PLATFORM_EC_I2C "${PLATFORM_EC}/common/i2c_controller.c")
diff --git a/zephyr/Kconfig b/zephyr/Kconfig
index fb50ac9c31..90af23f3a8 100644
--- a/zephyr/Kconfig
+++ b/zephyr/Kconfig
@@ -90,6 +90,48 @@ config PLATFORM_EC_EXTPOWER_GPIO
project should define a GPIO pin named GPIO_AC_PRESENT, with
extpower_interrupt configured as the handler in gpio_map.h.
+config PLATFORM_EC_FLASH
+ bool "Enable flash support"
+ default y
+ help
+ Enables access to the device's flash through a simple API. With
+ this is it possible for the EC to update its flash while running,
+ e.g. to support auto-update. Various write-protection features are
+ also provided.
+
+if PLATFORM_EC_FLASH
+
+config PLATFORM_EC_CONSOLE_CMD_FLASH
+ bool "Enable the flash commands"
+ default y
+ help
+ Enables various console commands:
+
+ flashread - read from flash to memory
+ flasherase - erase flash region
+ flashwrite - write memory to flash
+ flashwp - change write-protection settings
+
+config PLATFORM_EC_EXTERNAL_STORAGE
+ bool "Flash is stored external to the EC"
+ default y if SOC_FAMILY_NPCX
+ help
+ This indicates that the EC's flash is stored separately and is it
+ not possible execute directly from it. Code must be loaded from
+ the flash into internal SRAM before it can be executed. It is still
+ possible to read and write the flash.
+
+config PLATFORM_EC_MAPPED_STORAGE
+ bool "Flash is mapped into the EC's address space"
+ default y if SOC_FAMILY_NPCX
+ help
+ This indicates that the EC's flash is directly mapped into
+ its address space. This makes it easier to read and write the flash.
+ If this is not defined, the flash driver must implement
+ flash_physical_read().
+
+endif # PLATFORM_EC_FLASH
+
menuconfig PLATFORM_EC_KEYBOARD
bool "Enable keyboard support"
default y
diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h
index 1eb5e17cb8..8015dc9193 100644
--- a/zephyr/shim/include/config_chip.h
+++ b/zephyr/shim/include/config_chip.h
@@ -85,6 +85,50 @@ enum battery_type {
#endif /* CONFIG_PLATFORM_EC_ESPI */
+/* Flash settings */
+#undef CONFIG_EXTERNAL_STORAGE
+#undef CONFIG_MAPPED_STORAGE
+#undef CONFIG_FLASH_PSTATE
+#undef CONFIG_FLASH_SIZE
+#ifdef CONFIG_PLATFORM_EC_FLASH
+#undef CONFIG_CMD_FLASHINFO
+#undef CONFIG_CMD_FLASH
+#define CONFIG_FLASH
+#define CONFIG_FLASH_SIZE 0x80000
+/* TODO(b:176490413): use DT_PROP(DT_INST(inst, DT_DRV_COMPAT), size) ? */
+#define CONFIG_MAPPED_STORAGE_BASE 0x64000000
+#define CONFIG_FLASH_WRITE_SIZE 0x1 /* minimum write size */
+#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 /* one page size for write */
+#define CONFIG_FLASH_ERASE_SIZE 0x1000
+#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE
+#define CONFIG_EC_PROTECTED_STORAGE_OFF 0
+#define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x40000
+#define CONFIG_EC_WRITABLE_STORAGE_OFF 0x40000
+#define CONFIG_EC_WRITABLE_STORAGE_SIZE 0x40000
+#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF
+#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE
+#define CONFIG_RO_SIZE CONFIG_CROS_EC_RO_SIZE
+#define CONFIG_RW_SIZE CONFIG_CROS_EC_RW_SIZE
+
+#define CONFIG_RO_HDR_SIZE 0x40
+/* RO image resides at start of protected region, right after header */
+#define CONFIG_RO_STORAGE_OFF CONFIG_RO_HDR_SIZE
+
+#ifdef PLATFORM_EC_EXTERNAL_STORAGE
+#define CONFIG_EXTERNAL_STORAGE
+#endif
+
+#ifdef CONFIG_PLATFORM_EC_MAPPED_STORAGE
+#define CONFIG_MAPPED_STORAGE
+#endif
+
+#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH
+#define CONFIG_CMD_FLASHINFO
+#define CONFIG_CMD_FLASH
+#endif
+
+#endif /* CONFIG_PLATFORM_EC_FLASH */
+
#ifdef CONFIG_PLATFORM_EC_I2C
/* Also see shim/include/i2c/i2c.h which defines the ports enum */
#define CONFIG_I2C
diff --git a/zephyr/shim/src/CMakeLists.txt b/zephyr/shim/src/CMakeLists.txt
index a8f9a636d5..feefc4b97b 100644
--- a/zephyr/shim/src/CMakeLists.txt
+++ b/zephyr/shim/src/CMakeLists.txt
@@ -8,6 +8,7 @@ zephyr_sources(util.c)
zephyr_sources(crc.c)
zephyr_sources_ifdef(CONFIG_PLATFORM_EC_ESPI espi.c)
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_FLASH flash.c)
zephyr_sources_ifdef(CONFIG_PLATFORM_EC_HOOKS hooks.c)
zephyr_sources_ifdef(CONFIG_PLATFORM_EC_TIMER hwtimer.c)
zephyr_sources_ifdef(CONFIG_PLATFORM_EC_I2C i2c.c)
diff --git a/zephyr/shim/src/flash.c b/zephyr/shim/src/flash.c
new file mode 100644
index 0000000000..83d210f270
--- /dev/null
+++ b/zephyr/shim/src/flash.c
@@ -0,0 +1,39 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <flash.h>
+#include <kernel.h>
+
+/* TODO(b/174873770): Add calls to Zephyr code here */
+
+int flash_physical_write(int offset, int size, const char *data)
+{
+ return -ENOSYS;
+}
+
+int flash_physical_erase(int offset, int size)
+{
+ return -ENOSYS;
+}
+
+int flash_physical_get_protect(int bank)
+{
+ return -ENOSYS;
+}
+
+uint32_t flash_physical_get_protect_flags(void)
+{
+ return -ENOSYS;
+}
+
+int flash_physical_protect_at_boot(uint32_t new_flags)
+{
+ return -ENOSYS;
+}
+
+int flash_physical_protect_now(int all)
+{
+ return -ENOSYS;
+}
diff --git a/zephyr/shim/src/util.c b/zephyr/shim/src/util.c
index 8585d21f54..3181fccb95 100644
--- a/zephyr/shim/src/util.c
+++ b/zephyr/shim/src/util.c
@@ -130,3 +130,34 @@ void hexdump(const uint8_t *data, int len)
ccprintf("|\n");
}
}
+
+/**
+ * Parse offset and size from command line argv[shift] and argv[shift+1]
+ *
+ * Default values: If argc<=shift, leaves offset unchanged, returning error if
+ * *offset<0. If argc<shift+1, leaves size unchanged, returning error if
+ * *size<0.
+ */
+int parse_offset_size(int argc, char **argv, int shift, int *offset, int *size)
+{
+ char *e;
+ int i;
+
+ if (argc > shift) {
+ i = (uint32_t)strtoi(argv[shift], &e, 0);
+ if (*e)
+ return EC_ERROR_PARAM1;
+ *offset = i;
+ } else if (*offset < 0)
+ return EC_ERROR_PARAM_COUNT;
+
+ if (argc > shift + 1) {
+ i = (uint32_t)strtoi(argv[shift + 1], &e, 0);
+ if (*e)
+ return EC_ERROR_PARAM2;
+ *size = i;
+ } else if (*size < 0)
+ return EC_ERROR_PARAM_COUNT;
+
+ return EC_SUCCESS;
+}