diff options
| -rw-r--r-- | chip/stm32/spi.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/chip/stm32/spi.c b/chip/stm32/spi.c index 4a36162f40..cee65a644c 100644 --- a/chip/stm32/spi.c +++ b/chip/stm32/spi.c @@ -315,6 +315,9 @@ static void setup_for_transaction(void) /* clear this as soon as possible */ setup_transaction_later = 0; + /* Stop sending DMA response before TX, if any */ + dma_disable(STM32_DMAC_SPI1_TX); + #ifndef CHIP_FAMILY_STM32H7 /* H7 is not ready to set status here */ /* Not ready to receive yet */ tx_status(EC_SPI_NOT_READY); @@ -323,9 +326,6 @@ static void setup_for_transaction(void) /* We are no longer actively processing a transaction */ state = SPI_STATE_PREPARE_RX; - /* Stop sending response, if any */ - dma_disable(STM32_DMAC_SPI1_TX); - /* * Read dummy bytes in case there are some pending; this prevents the * receive DMA from getting that byte right when we start it. @@ -478,6 +478,12 @@ void spi_event(enum gpio_signal signal) enable_sleep(SLEEP_MASK_SPI); /* + * NSS is high (CS is deasserted), which means we can't + * do TX, disable DMA TX anyway. + */ + dma_get_channel(STM32_DMAC_SPI1_TX)->ccr &= ~STM32_DMA_CCR_TCIE; + + /* * If the buffer is still used by the host command, postpone * the DMA rx setup. */ @@ -671,6 +677,9 @@ static void spi_init(void) STM32_RCC_APB2RSTR |= STM32_RCC_PB2_SPI1; STM32_RCC_APB2RSTR &= ~STM32_RCC_PB2_SPI1; + /* Reset the DMA TX. */ + dma_disable(STM32_DMAC_SPI1_TX); + /* Config SPI GPIO to high speed. This varies from board to board. */ board_set_stm32_spi_pin_speed(); |