diff options
| -rw-r--r-- | zephyr/dts/bindings/cros_bbram/named-bbram-regions.yaml | 15 | ||||
| -rw-r--r-- | zephyr/include/cros/nuvoton/npcx.dtsi | 74 | ||||
| -rw-r--r-- | zephyr/projects/kohaku/boards/arm/kohaku/kohaku.dts | 1 | ||||
| -rw-r--r-- | zephyr/projects/volteer/boards/arm/volteer/volteer.dts | 10 | ||||
| -rw-r--r-- | zephyr/shim/include/bbram.h | 33 | ||||
| -rw-r--r-- | zephyr/shim/src/system.c | 60 | ||||
| -rw-r--r-- | zephyr/test/system/boards/native_posix.overlay | 26 | ||||
| -rw-r--r-- | zephyr/test/system/test_system.c | 16 |
8 files changed, 167 insertions, 68 deletions
diff --git a/zephyr/dts/bindings/cros_bbram/named-bbram-regions.yaml b/zephyr/dts/bindings/cros_bbram/named-bbram-regions.yaml new file mode 100644 index 0000000000..8b12473d0a --- /dev/null +++ b/zephyr/dts/bindings/cros_bbram/named-bbram-regions.yaml @@ -0,0 +1,15 @@ +# Copyright (c) 2021 Google Inc. +# SPDX-License-Identifier: Apache-2.0 +description: Named battery-backed RAM parent node + +compatible: "named-bbram-regions" + +child-binding: + description: Named battery-backed RAM child node + properties: + offset: + type: int + required: true + size: + type: int + required: true diff --git a/zephyr/include/cros/nuvoton/npcx.dtsi b/zephyr/include/cros/nuvoton/npcx.dtsi new file mode 100644 index 0000000000..89fb9484d9 --- /dev/null +++ b/zephyr/include/cros/nuvoton/npcx.dtsi @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2021 The Chromium OS Authors + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +/ { + + named-bbram-regions { + compatible = "named-bbram-regions"; + + scratchpad { + offset = <0x00>; + size = <0x04>; + }; + saved-reset-flags { + offset = <0x04>; + size = <0x04>; + }; + wake { + offset = <0x08>; + size = <0x04>; + }; + pd0 { + offset = <0x0c>; + size = <0x01>; + }; + pd1 { + offset = <0x0d>; + size = <0x01>; + }; + try_slot { + offset = <0x0e>; + size = <0x01>; + }; + pd2 { + offset = <0x0f>; + size = <0x01>; + }; + ramlog { + offset = <0x20>; + size = <0x01>; + }; + panic_flags { + offset = <0x23>; + size = <0x01>; + }; + panic_bkup { + offset = <0x24>; + size = <0x1c>; + }; + lct_time { + offset = <0x40>; + size = <0x04>; + }; + }; + + soc { + + bbram: bb-ram@400af000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "nuvoton,npcx-cros-bbram"; + status = "okay"; + reg = <0x400af000 0x80 + 0x400af100 0x1>; + reg-names = "memory", "status"; + label = "BBRAM"; + }; + }; + +}; diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/kohaku.dts b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku.dts index 6d301ecbaa..0a61c8e3ad 100644 --- a/zephyr/projects/kohaku/boards/arm/kohaku/kohaku.dts +++ b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include <cros/nuvoton/npcx.dtsi> #include <dt-bindings/gpio_defines.h> #include <nuvoton/npcx7m6fb.dtsi> diff --git a/zephyr/projects/volteer/boards/arm/volteer/volteer.dts b/zephyr/projects/volteer/boards/arm/volteer/volteer.dts index c02bb8ff2f..a6c40ea827 100644 --- a/zephyr/projects/volteer/boards/arm/volteer/volteer.dts +++ b/zephyr/projects/volteer/boards/arm/volteer/volteer.dts @@ -6,6 +6,7 @@ /dts-v1/; +#include <cros/nuvoton/npcx.dtsi> #include <dt-bindings/gpio_defines.h> #include <nuvoton/npcx7m6fb.dtsi> @@ -432,15 +433,6 @@ label = "FLASH_INTERFACE_UNIT0"; pinctrl-0 = <>; }; - - bbram: bb-ram@400af000 { - compatible = "nuvoton,npcx-cros-bbram"; - status = "okay"; - reg = <0x400af000 0x80 - 0x400af100 0x1>; - reg-names = "memory", "status"; - label = "BBRAM"; - }; }; /* diff --git a/zephyr/shim/include/bbram.h b/zephyr/shim/include/bbram.h index e0ccf88f36..3eba4b157b 100644 --- a/zephyr/shim/include/bbram.h +++ b/zephyr/shim/include/bbram.h @@ -6,37 +6,10 @@ #ifndef ZEPHYR_SHIM_INCLUDE_BBRAM_H_ #define ZEPHYR_SHIM_INCLUDE_BBRAM_H_ -/** - * Layout of the battery-backed RAM region. - * TODO (b:178807203) Migrate these values to devicetree registers. - */ -enum bbram_data_index { - /** General-purpose scratchpad */ - BBRM_DATA_INDEX_SCRATCHPAD = 0, - /** Saved reset flags */ - BBRM_DATA_INDEX_SAVED_RESET_FLAGS = 4, - /** Wake reasons for hibernate */ - BBRM_DATA_INDEX_WAKE = 8, - /** USB-PD saved port0 state */ - BBRM_DATA_INDEX_PD0 = 12, - /** USB-PD saved port1 state */ - BBRM_DATA_INDEX_PD1 = 13, - /** Vboot EC try slot */ - BBRM_DATA_INDEX_TRY_SLOT = 14, - /** USB-PD saved port2 state */ - BBRM_DATA_INDEX_PD2 = 15, - /** RAM log for Booter */ - BBRM_DATA_INDEX_RAMLOG = 32, - /** Flag to indicate validity of panic data starting at index 36. */ - BBRM_DATA_INDEX_PANIC_FLAGS = 35, - /** Panic data (index 35-63)*/ - BBRM_DATA_INDEX_PANIC_BKUP = 36, - /** The start time of LCT(4 bytes) */ - BBRM_DATA_INDEX_LCT_TIME = 64, -}; +#include <devicetree.h> -#define BBRAM_SIZE DT_REG_SIZE(DT_NODELABEL(bbram)) -#define BBRAM_ADDR DT_REG_ADDR(DT_NODELABEL(bbram)) +#define BBRAM_SIZE DT_REG_SIZE_BY_NAME(DT_NODELABEL(bbram), memory) +#define BBRAM_ADDR DT_REG_ADDR_BY_NAME(DT_NODELABEL(bbram), memory) #define BBRAM(offset) REG8(BBRAM_ADDR + offset) #define BBRAM_BKUP_STS BBRAM(CONFIG_BBRAM_BKUP_STS) diff --git a/zephyr/shim/src/system.c b/zephyr/shim/src/system.c index a931897903..e59cb59526 100644 --- a/zephyr/shim/src/system.c +++ b/zephyr/shim/src/system.c @@ -11,6 +11,11 @@ #include "cros_version.h" #include "system.h" +#define BBRAM_REGION_PD0 DT_PATH(named_bbram_regions, pd0) +#define BBRAM_REGION_PD1 DT_PATH(named_bbram_regions, pd1) +#define BBRAM_REGION_PD2 DT_PATH(named_bbram_regions, pd2) +#define BBRAM_REGION_TRY_SLOT DT_PATH(named_bbram_regions, try_slot) + STATIC_IF_NOT(CONFIG_ZTEST) const struct device *bbram_dev; #if DT_NODE_EXISTS(DT_NODELABEL(bbram)) @@ -25,39 +30,46 @@ static int system_init(const struct device *unused) SYS_INIT(system_init, PRE_KERNEL_1, 50); #endif -/* Return true if index is stored as a single byte in bbram */ -static int bbram_is_byte_access(enum bbram_data_index index) -{ - return index == BBRM_DATA_INDEX_PD0 || index == BBRM_DATA_INDEX_PD1 || - index == BBRM_DATA_INDEX_PD2 || - index == BBRM_DATA_INDEX_PANIC_FLAGS; -} - -/* Map idx to a returned BBRM_DATA_INDEX_*, or return -1 on invalid idx */ -static int bbram_idx_lookup(enum system_bbram_idx idx) +/* Map idx to a bbram offset/size, or return -1 on invalid idx */ +static int bbram_lookup(enum system_bbram_idx idx, int *offset_out, + int *size_out) { - if (idx == SYSTEM_BBRAM_IDX_PD0) - return BBRM_DATA_INDEX_PD0; - if (idx == SYSTEM_BBRAM_IDX_PD1) - return BBRM_DATA_INDEX_PD1; - if (idx == SYSTEM_BBRAM_IDX_PD2) - return BBRM_DATA_INDEX_PD2; - if (idx == SYSTEM_BBRAM_IDX_TRY_SLOT) - return BBRM_DATA_INDEX_TRY_SLOT; - return -1; + switch (idx) { + case SYSTEM_BBRAM_IDX_PD0: + *offset_out = DT_PROP(BBRAM_REGION_PD0, offset); + *size_out = DT_PROP(BBRAM_REGION_PD0, size); + break; + case SYSTEM_BBRAM_IDX_PD1: + *offset_out = DT_PROP(BBRAM_REGION_PD1, offset); + *size_out = DT_PROP(BBRAM_REGION_PD1, size); + break; + case SYSTEM_BBRAM_IDX_PD2: + *offset_out = DT_PROP(BBRAM_REGION_PD2, offset); + *size_out = DT_PROP(BBRAM_REGION_PD2, size); + break; + case SYSTEM_BBRAM_IDX_TRY_SLOT: + *offset_out = DT_PROP(BBRAM_REGION_TRY_SLOT, offset); + *size_out = DT_PROP(BBRAM_REGION_TRY_SLOT, size); + break; + default: + return EC_ERROR_INVAL; + } + return EC_SUCCESS; } int system_get_bbram(enum system_bbram_idx idx, uint8_t *value) { - int bbram_idx = bbram_idx_lookup(idx); - int bytes, rc; + int offset, size, rc; - if (bbram_idx < 0 || bbram_dev == NULL) + if (bbram_dev == NULL) return EC_ERROR_INVAL; - bytes = bbram_is_byte_access(bbram_idx) ? 1 : 4; + rc = bbram_lookup(idx, &offset, &size); + if (rc) + return rc; + rc = ((struct cros_bbram_driver_api *)bbram_dev->api) - ->read(bbram_dev, bbram_idx, bytes, value); + ->read(bbram_dev, offset, size, value); return rc ? EC_ERROR_INVAL : EC_SUCCESS; } diff --git a/zephyr/test/system/boards/native_posix.overlay b/zephyr/test/system/boards/native_posix.overlay new file mode 100644 index 0000000000..49698a7553 --- /dev/null +++ b/zephyr/test/system/boards/native_posix.overlay @@ -0,0 +1,26 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + named-bbram-regions { + compatible = "named-bbram-regions"; + pd0 { + offset = <0x00>; + size = <0x01>; + }; + pd1 { + offset = <0x01>; + size = <0x02>; + }; + try_slot { + offset = <0x03>; + size = <0x04>; + }; + pd2 { + offset = <0x07>; + size = <0x05>; + }; + }; +}; diff --git a/zephyr/test/system/test_system.c b/zephyr/test/system/test_system.c index 3dc9f95a0f..4ba845d878 100644 --- a/zephyr/test/system/test_system.c +++ b/zephyr/test/system/test_system.c @@ -13,6 +13,9 @@ LOG_MODULE_REGISTER(test); +#define BBRAM_OFF(name) DT_PROP(DT_PATH(named_bbram_regions, name), offset) +#define BBRAM_SIZE(name) DT_PROP(DT_PATH(named_bbram_regions, name), size) + static char mock_data[64] = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@"; @@ -52,20 +55,23 @@ static void test_bbram_get(void) rc = system_get_bbram(SYSTEM_BBRAM_IDX_PD0, output); zassert_equal(rc, 0, NULL); - zassert_mem_equal(output, mock_data + BBRM_DATA_INDEX_PD0, 1, NULL); + zassert_mem_equal(output, mock_data + BBRAM_OFF(pd0), BBRAM_SIZE(pd0), + NULL); rc = system_get_bbram(SYSTEM_BBRAM_IDX_PD1, output); zassert_equal(rc, 0, NULL); - zassert_mem_equal(output, mock_data + BBRM_DATA_INDEX_PD1, 1, NULL); + zassert_mem_equal(output, mock_data + BBRAM_OFF(pd1), BBRAM_SIZE(pd1), + NULL); rc = system_get_bbram(SYSTEM_BBRAM_IDX_PD2, output); zassert_equal(rc, 0, NULL); - zassert_mem_equal(output, mock_data + BBRM_DATA_INDEX_PD2, 1, NULL); + zassert_mem_equal(output, mock_data + BBRAM_OFF(pd2), BBRAM_SIZE(pd2), + NULL); rc = system_get_bbram(SYSTEM_BBRAM_IDX_TRY_SLOT, output); zassert_equal(rc, 0, NULL); - zassert_mem_equal(output, mock_data + BBRM_DATA_INDEX_TRY_SLOT, 1, - NULL); + zassert_mem_equal(output, mock_data + BBRAM_OFF(try_slot), + BBRAM_SIZE(try_slot), NULL); } void test_main(void) |