diff options
| -rw-r--r-- | board/chell/board.h | 3 | ||||
| -rw-r--r-- | board/fizz/board.c | 8 | ||||
| -rw-r--r-- | board/fizz/board.h | 1 | ||||
| -rw-r--r-- | board/nocturne/board.h | 1 | ||||
| -rw-r--r-- | power/intel_x86.h | 5 |
5 files changed, 14 insertions, 4 deletions
diff --git a/board/chell/board.h b/board/chell/board.h index ae5c4dc17f..f9a75bf4c5 100644 --- a/board/chell/board.h +++ b/board/chell/board.h @@ -223,9 +223,6 @@ extern const int keyboard_factory_scan_pins_used; /* Reset PD MCU */ void board_reset_pd_mcu(void); -/* Reset RTC */ -void board_rtc_reset(void); - #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BOARD_H */ diff --git a/board/fizz/board.c b/board/fizz/board.c index 3682d8e89e..1fa6a57865 100644 --- a/board/fizz/board.c +++ b/board/fizz/board.c @@ -689,3 +689,11 @@ int fan_percent_to_rpm(int fan, int pct) } return get_custom_rpm(fan, pct, oem_id); } + +void board_rtc_reset(void) +{ + CPRINTS("Asserting RTCRST# to PCH"); + gpio_set_level(GPIO_PCH_RTCRST, 1); + udelay(100); + gpio_set_level(GPIO_PCH_RTCRST, 0); +} diff --git a/board/fizz/board.h b/board/fizz/board.h index 34a36de919..4f3acf9e55 100644 --- a/board/fizz/board.h +++ b/board/fizz/board.h @@ -18,6 +18,7 @@ /* EC */ #define CONFIG_ADC #define CONFIG_BOARD_VERSION_CBI +#define CONFIG_BOARD_HAS_RTC_RESET #define CONFIG_CRC8 #define CONFIG_CEC #define CONFIG_CROS_BOARD_INFO diff --git a/board/nocturne/board.h b/board/nocturne/board.h index 13722d3e97..2b84d1f933 100644 --- a/board/nocturne/board.h +++ b/board/nocturne/board.h @@ -230,7 +230,6 @@ enum sensor_id { void base_pwr_fault_interrupt(enum gpio_signal s); int board_get_version(void); -void board_rtc_reset(void); /* Reset all TCPCs. */ void board_reset_pd_mcu(void); diff --git a/power/intel_x86.h b/power/intel_x86.h index 70a1a66e65..bfbf89538c 100644 --- a/power/intel_x86.h +++ b/power/intel_x86.h @@ -33,4 +33,9 @@ enum power_state chipset_force_g3(void); */ enum power_state common_intel_x86_power_handle_state(enum power_state state); +/** + * Reset RTC + */ +void board_rtc_reset(void); + #endif /* __CROS_EC_INTEL_X86_H */ |