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-rw-r--r--baseboard/honeybuns/baseboard.c11
-rw-r--r--baseboard/honeybuns/baseboard.h14
-rw-r--r--baseboard/honeybuns/usb_pd_policy.c29
-rw-r--r--baseboard/honeybuns/usbc_support.c340
-rw-r--r--board/baklava/board.c6
-rw-r--r--board/baklava/board.h7
-rw-r--r--board/baklava/gpio.inc10
-rw-r--r--board/gingerbread/board.h1
-rw-r--r--board/gingerbread/gpio.inc1
-rw-r--r--board/quiche/board.c18
-rw-r--r--board/quiche/board.h7
-rw-r--r--board/quiche/gpio.inc5
12 files changed, 398 insertions, 51 deletions
diff --git a/baseboard/honeybuns/baseboard.c b/baseboard/honeybuns/baseboard.c
index 3e185d8ae5..e61f447240 100644
--- a/baseboard/honeybuns/baseboard.c
+++ b/baseboard/honeybuns/baseboard.c
@@ -108,6 +108,9 @@ static void baseboard_set_led(enum led_color color)
* associated with a power button press.
*/
CPRINTS("led: color = %d", color);
+
+ /* Not all boards may have LEDs under EC control */
+#if defined(GPIO_EC_STATUS_LED1) && defined(GPIO_EC_STATUS_LED2)
if (color == OFF) {
gpio_set_level(GPIO_EC_STATUS_LED1, 1);
gpio_set_level(GPIO_EC_STATUS_LED2, 1);
@@ -118,6 +121,7 @@ static void baseboard_set_led(enum led_color color)
gpio_set_level(GPIO_EC_STATUS_LED1, 0);
gpio_set_level(GPIO_EC_STATUS_LED2, 0);
}
+#endif
}
static void baseboard_led_callback(void);
@@ -225,6 +229,8 @@ static void baseboard_init(void)
/* Set up host port usbc to present Rd on CC lines */
if(baseboard_usbc_init(USB_PD_PORT_HOST))
CPRINTS("usbc: Failed to set up sink path");
+ else
+ CPRINTS("usbc: sink path configure success!");
#endif /* SECTION_IS_RW */
}
/*
@@ -285,6 +291,11 @@ static void baseboard_power_off(void)
tcpm_release(USB_PD_PORT_HOST);
/* Disable PPC/TCPC interrupts */
board_disable_usbc_interrupts();
+
+#ifdef GPIO_USBC_UF_ATTACHED_SRC
+ /* Disable PPC interrupts for PS8803 managed port */
+ baseboard_usbc_usb3_enable_interrupts(0);
+#endif
/* Go into power off state */
board_power_sequence(0);
}
diff --git a/baseboard/honeybuns/baseboard.h b/baseboard/honeybuns/baseboard.h
index 01b0e4e686..5ec8516249 100644
--- a/baseboard/honeybuns/baseboard.h
+++ b/baseboard/honeybuns/baseboard.h
@@ -158,6 +158,7 @@ enum usb_strings {
#define CONFIG_CMD_TCPC_DUMP
#define CONFIG_MP4245
+#define USB_HUB_OCP_RESET_MSEC (10 * MSEC)
#else /* RO Specific Config Options */
@@ -277,6 +278,19 @@ void baseboard_usb3_check_state(void);
*/
void baseboard_set_mst_lane_control(int dock_mf);
+/*
+ * Control enable/disable for interrupts used for usb3 only usbc port.
+ *
+ * @param enable -> 1 for enable, 0 for disable
+ */
+void baseboard_usbc_usb3_enable_interrupts(int enable);
+
+/*
+ * Called from interrupt handler for PPC used on usb3 only port.
+ *
+ */
+void baseboard_usbc_usb3_irq(void);
+
#endif /* !__ASSEMBLER__ */
#endif /* __CROS_EC_BASEBOARD_H */
diff --git a/baseboard/honeybuns/usb_pd_policy.c b/baseboard/honeybuns/usb_pd_policy.c
index 71112db039..950c989907 100644
--- a/baseboard/honeybuns/usb_pd_policy.c
+++ b/baseboard/honeybuns/usb_pd_policy.c
@@ -10,6 +10,7 @@
#include "driver/mp4245.h"
#include "driver/tcpm/tcpci.h"
#include "driver/mp4245.h"
+#include "hooks.h"
#include "task.h"
#include "timer.h"
#include "usb_common.h"
@@ -283,6 +284,34 @@ int pd_check_power_swap(int port)
return 0;
}
+static void usb_tc_connect(void)
+{
+ /*
+ * The EC needs to indicate to the USB hub when the host port is
+ * attached so that the USB-EP can be properly enumerated. GPIO_BPWR_DET
+ * is used for this purpose.
+ */
+ if (pd_is_connected(USB_PD_PORT_HOST)) {
+ gpio_set_level(GPIO_BPWR_DET, 1);
+#ifdef GPIO_UFP_PLUG_DET
+ gpio_set_level(GPIO_UFP_PLUG_DET, 1);
+#endif
+ }
+}
+DECLARE_HOOK(HOOK_USB_PD_CONNECT, usb_tc_connect, HOOK_PRIO_DEFAULT);
+
+static void usb_tc_disconnect(void)
+{
+ /* Only the host port disconnect is relevant */
+ if (!pd_is_connected(USB_PD_PORT_HOST)) {
+ gpio_set_level(GPIO_BPWR_DET, 0);
+#ifdef GPIO_UFP_PLUG_DET
+ gpio_set_level(GPIO_UFP_PLUG_DET, 0);
+#endif
+ }
+}
+DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, usb_tc_disconnect, HOOK_PRIO_DEFAULT);
+
__override bool pd_can_source_from_device(int port, const int pdo_cnt,
const uint32_t *pdos)
{
diff --git a/baseboard/honeybuns/usbc_support.c b/baseboard/honeybuns/usbc_support.c
index 1ca7be6fe3..80915048ab 100644
--- a/baseboard/honeybuns/usbc_support.c
+++ b/baseboard/honeybuns/usbc_support.c
@@ -23,46 +23,24 @@
#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args)
-static void baseboard_ucpd_apply_rd(int port)
-{
- uint32_t cfgr1_reg;
- uint32_t moder_reg;
- uint32_t cr;
-
- /* Ensure that clock to UCPD is enabled */
- STM32_RCC_APB1ENR2 |= STM32_RCC_APB1ENR2_UPCD1EN;
-
- /* Make sure CC1/CC2 pins PB4/PB6 are set for analog mode */
- moder_reg = STM32_GPIO_MODER(GPIO_B);
- moder_reg |= 0x3300;
- STM32_GPIO_MODER(GPIO_B) = moder_reg;
- /*
- * CFGR1 must be written when UCPD peripheral is disabled. Note that
- * disabling ucpd causes the peripheral to quit any ongoing activity and
- * sets all ucpd registers back their default values.
- */
+enum usbc_states {
+ UNATTACHED_SNK,
+ ATTACH_WAIT_SNK,
+ ATTACHED_SNK,
+};
- cfgr1_reg = STM32_UCPD_CFGR1_PSC_CLK_VAL(UCPD_PSC_DIV - 1) |
- STM32_UCPD_CFGR1_TRANSWIN_VAL(UCPD_TRANSWIN_CNT - 1) |
- STM32_UCPD_CFGR1_IFRGAP_VAL(UCPD_IFRGAP_CNT - 1) |
- STM32_UCPD_CFGR1_HBITCLKD_VAL(UCPD_HBIT_DIV - 1);
- STM32_UCPD_CFGR1(port) = cfgr1_reg;
+/* Variables used to manage the simple usbc state machine */
+static int usbc_port;
+static int usbc_state;
+static int usbc_vbus;
+static enum tcpc_cc_voltage_status cc1_v;
+static enum tcpc_cc_voltage_status cc2_v;
- /* Enable ucpd */
- STM32_UCPD_CFGR1(port) |= STM32_UCPD_CFGR1_UCPDEN;
-
- /* Apply Rd to both CC lines */
- cr = STM32_UCPD_CR(port);
- cr |= STM32_UCPD_CR_ANAMODE | STM32_UCPD_CR_CCENABLE_MASK;
- STM32_UCPD_CR(port) = cr;
-
- /*
- * After exiting reset, stm32gx will have dead battery mode enabled by
- * default which connects Rd to CC1/CC2. This should be disabled when EC
- * is powered up.
- */
- STM32_PWR_CR3 |= STM32_PWR_CR3_UCPD1_DBDIS;
-}
+__maybe_unused static __const_data const char * const usbc_state_names[] = {
+ [UNATTACHED_SNK] = "Unattached.SNK",
+ [ATTACH_WAIT_SNK] = "AttachWait.SNK",
+ [ATTACHED_SNK] = "Attached.SNK",
+};
static int read_reg(uint8_t port, int reg, int *regval)
{
@@ -125,6 +103,183 @@ static int baseboard_ppc_enable_sink_path(int port)
return EC_SUCCESS;
}
+static void baseboard_ucpd_apply_rd(int port)
+{
+ uint32_t cfgr1_reg;
+ uint32_t moder_reg;
+ uint32_t cr;
+
+ /* Ensure that clock to UCPD is enabled */
+ STM32_RCC_APB1ENR2 |= STM32_RCC_APB1ENR2_UPCD1EN;
+
+ /* Make sure CC1/CC2 pins PB4/PB6 are set for analog mode */
+ moder_reg = STM32_GPIO_MODER(GPIO_B);
+ moder_reg |= 0x3300;
+ STM32_GPIO_MODER(GPIO_B) = moder_reg;
+ /*
+ * CFGR1 must be written when UCPD peripheral is disabled. Note that
+ * disabling ucpd causes the peripheral to quit any ongoing activity and
+ * sets all ucpd registers back their default values.
+ */
+
+ cfgr1_reg = STM32_UCPD_CFGR1_PSC_CLK_VAL(UCPD_PSC_DIV - 1) |
+ STM32_UCPD_CFGR1_TRANSWIN_VAL(UCPD_TRANSWIN_CNT - 1) |
+ STM32_UCPD_CFGR1_IFRGAP_VAL(UCPD_IFRGAP_CNT - 1) |
+ STM32_UCPD_CFGR1_HBITCLKD_VAL(UCPD_HBIT_DIV - 1);
+ STM32_UCPD_CFGR1(port) = cfgr1_reg;
+
+ /* Enable ucpd */
+ STM32_UCPD_CFGR1(port) |= STM32_UCPD_CFGR1_UCPDEN;
+
+ /* Apply Rd to both CC lines */
+ cr = STM32_UCPD_CR(port);
+ cr |= STM32_UCPD_CR_ANAMODE | STM32_UCPD_CR_CCENABLE_MASK;
+ STM32_UCPD_CR(port) = cr;
+
+ /*
+ * After exiting reset, stm32gx will have dead battery mode enabled by
+ * default which connects Rd to CC1/CC2. This should be disabled when EC
+ * is powered up.
+ */
+ STM32_PWR_CR3 |= STM32_PWR_CR3_UCPD1_DBDIS;
+}
+
+
+static void baseboard_ucpd_get_cc(int port, enum tcpc_cc_voltage_status *cc1,
+ enum tcpc_cc_voltage_status *cc2)
+{
+ int vstate_cc1;
+ int vstate_cc2;
+ int anamode;
+ uint32_t sr;
+
+ /*
+ * cc_voltage_status is determined from vstate_cc bit field in the
+ * status register. The meaning of the value vstate_cc depends on
+ * current value of ANAMODE (src/snk).
+ *
+ * vstate_cc maps directly to cc_state from tcpci spec when ANAMODE = 1,
+ * but needs to be modified slightly for case ANAMODE = 0.
+ *
+ * If presenting Rp (source), then need to to a circular shift of
+ * vstate_ccx value:
+ * vstate_cc | cc_state
+ * ------------------
+ * 0 -> 1
+ * 1 -> 2
+ * 2 -> 0
+ */
+
+ /* Get vstate_ccx values and power role */
+ sr = STM32_UCPD_SR(port);
+ /* Get Rp or Rd active */
+ anamode = !!(STM32_UCPD_CR(port) & STM32_UCPD_CR_ANAMODE);
+ vstate_cc1 = (sr & STM32_UCPD_SR_VSTATE_CC1_MASK) >>
+ STM32_UCPD_SR_VSTATE_CC1_SHIFT;
+ vstate_cc2 = (sr & STM32_UCPD_SR_VSTATE_CC2_MASK) >>
+ STM32_UCPD_SR_VSTATE_CC2_SHIFT;
+
+ /* Do circular shift if port == source */
+ if (anamode) {
+ if (vstate_cc1 != STM32_UCPD_SR_VSTATE_RA)
+ vstate_cc1 += 4;
+ if (vstate_cc2 != STM32_UCPD_SR_VSTATE_RA)
+ vstate_cc2 += 4;
+ } else {
+ if (vstate_cc1 != STM32_UCPD_SR_VSTATE_OPEN)
+ vstate_cc1 = (vstate_cc1 + 1) % 3;
+ if (vstate_cc2 != STM32_UCPD_SR_VSTATE_OPEN)
+ vstate_cc2 = (vstate_cc2 + 1) % 3;
+ }
+
+ *cc1 = vstate_cc1;
+ *cc2 = vstate_cc2;
+}
+
+static int baseboard_rp_is_present(enum tcpc_cc_voltage_status cc1,
+ enum tcpc_cc_voltage_status cc2)
+{
+ return (cc1 >= TYPEC_CC_VOLT_RP_DEF || cc2 >= TYPEC_CC_VOLT_RP_DEF);
+}
+
+static void baseboard_usbc_check_connect(void);
+DECLARE_DEFERRED(baseboard_usbc_check_connect);
+
+static void baseboard_usbc_check_connect(void)
+{
+ enum tcpc_cc_voltage_status cc1;
+ enum tcpc_cc_voltage_status cc2;
+ int ppc_reg;
+ enum usbc_states enter_state = usbc_state;
+
+ /*
+ * In RO, the only usbc related requirement is to enable the stm32g4
+ * USB-EP to be enumerated by the host attached to C0. To prevent D+
+ * being pulled high prior to VBUS presence, the EC uses GPIO_BPWR_DET
+ * to signal the USB hub that VBUS is present. Therefore, we need a
+ * simple usbc state machine to detect an attach (Rp and VBUS) event so
+ * this GPIO signal is properly controlled in RO.
+ *
+ * Note that RO only runs until the RWSIG timer expires and jumps to RW,
+ * and in RW, the full usb-pd stack is initialized and run.
+ */
+
+ /* Get current CC voltage levels */
+ baseboard_ucpd_get_cc(usbc_port, &cc1, &cc2);
+ /* Update VBUS state */
+ if (!read_reg(usbc_port, SN5S330_INT_STATUS_REG3, &ppc_reg))
+ usbc_vbus = ppc_reg & SN5S330_VBUS_GOOD;
+
+ switch (usbc_state) {
+ case UNATTACHED_SNK:
+ /*
+ * Require either CC1 or CC2 to have a valid Rp CC voltage level
+ * to advance to ATTACH_WAIT_SNK.
+ */
+ if (baseboard_rp_is_present(cc1, cc2))
+ usbc_state = ATTACH_WAIT_SNK;
+ break;
+ case ATTACH_WAIT_SNK:
+ /*
+ * This state handles debounce by ensuring the CC voltages are
+ * the same between two state machine iterations. If this
+ * condition is met, and VBUS is present, then advance to
+ * ATTACHED_SNK and set GPIO_BPWR_DET.
+ *
+ * If Rp voltage is no longer detected, then return to
+ * UNATTACHED_SNK.
+ */
+ if (usbc_vbus && cc1 == cc1_v && cc2 == cc2_v) {
+ usbc_state = ATTACHED_SNK;
+ gpio_set_level(GPIO_BPWR_DET, 1);
+ } else if (!baseboard_rp_is_present(cc1, cc2)) {
+ usbc_state = UNATTACHED_SNK;
+ }
+ break;
+ case ATTACHED_SNK:
+ /*
+ * In this state, only checking for VBUS going away to indicate
+ * a detach event and inform the USB hub via GPIO_BPWR_DET.
+ */
+ if (!usbc_vbus) {
+ usbc_state = UNATTACHED_SNK;
+ gpio_set_level(GPIO_BPWR_DET, 0);
+ }
+ break;
+ }
+
+ /* Save CC voltage for debounce check */
+ cc1_v = cc1;
+ cc2_v = cc2;
+
+ if (enter_state != usbc_state)
+ CPRINTS("%s: cc1 = %d, cc2 = %d vbus = %d",
+ usbc_state_names[usbc_state], cc1, cc2, usbc_vbus);
+
+ hook_call_deferred(&baseboard_usbc_check_connect_data,
+ PD_T_TRY_CC_DEBOUNCE);
+}
+
int baseboard_usbc_init(int port)
{
int rv;
@@ -133,11 +288,21 @@ int baseboard_usbc_init(int port)
baseboard_ucpd_apply_rd(port);
/* Initialize ppc to enable sink path */
rv = baseboard_ppc_enable_sink_path(port);
+ if (rv)
+ CPRINTS("ppc init failed!");
+ /* Save host port value */
+ usbc_port = port;
+ /* Start RO usbc attach state machine */
+ gpio_set_level(GPIO_BPWR_DET, 0);
+ /* Start simple usbc state machine */
+ baseboard_usbc_check_connect();
return rv;
}
#if defined(GPIO_USBC_UF_ATTACHED_SRC) && defined(SECTION_IS_RW)
+static int ppc_ocp_count;
+
static void baseboard_usb3_manage_vbus(void)
{
int level = gpio_get_level(GPIO_USBC_UF_ATTACHED_SRC);
@@ -149,6 +314,21 @@ static void baseboard_usb3_manage_vbus(void)
*/
ppc_vbus_source_enable(USB_PD_PORT_USB3, level);
CPRINTS("C2: State = %s", level ? "Attached.SRC " : "Unattached.SRC");
+
+ /* Reset OCP event counter for detach */
+ if (!level) {
+ ppc_ocp_count = 0;
+
+#ifdef GPIO_USB_HUB_OCP_NOTIFY
+ /*
+ * In the case of an OCP event on this port, the usb hub should be
+ * notified via a GPIO signal. Following, an OCP, the attached.src state
+ * for the usb3 only port is checked again. If it's attached, then make
+ * sure the OCP notify signal is reset.
+ */
+ gpio_set_level(GPIO_USB_HUB_OCP_NOTIFY, 1);
+#endif
+ }
}
DECLARE_DEFERRED(baseboard_usb3_manage_vbus);
@@ -157,6 +337,21 @@ void baseboard_usb3_check_state(void)
hook_call_deferred(&baseboard_usb3_manage_vbus_data, 0);
}
+void baseboard_usbc_usb3_enable_interrupts(int enable)
+{
+ if (enable) {
+ /* Enable VBUS control interrupt for C2 */
+ gpio_enable_interrupt(GPIO_USBC_UF_ATTACHED_SRC);
+ /* Enable PPC interrupt */
+ gpio_enable_interrupt(GPIO_USBC_UF_PPC_INT_ODL);
+ } else {
+ /* Disable VBUS control interrupt for C2 */
+ gpio_disable_interrupt(GPIO_USBC_UF_ATTACHED_SRC);
+ /* Disable PPC interrupt */
+ gpio_disable_interrupt(GPIO_USBC_UF_PPC_INT_ODL);
+ }
+}
+
int baseboard_config_usbc_usb3_ppc(void)
{
int rv;
@@ -171,14 +366,77 @@ int baseboard_config_usbc_usb3_ppc(void)
/* Need to set current limit to 3A to match advertised value */
ppc_set_vbus_source_current_limit(USB_PD_PORT_USB3, TYPEC_RP_3A0);
+ /* Reset OCP event counter */
+ ppc_ocp_count = 0;
/* Check state at init time */
baseboard_usb3_manage_vbus();
- /* Enable VBUS control interrupt for C2 */
- gpio_enable_interrupt(GPIO_USBC_UF_ATTACHED_SRC);
+ /* Enable attached.src and PPC interrupts */
+ baseboard_usbc_usb3_enable_interrupts(1);
return EC_SUCCESS;
}
-#endif
+
+static void baseboard_usbc_usb3_handle_interrupt(void)
+{
+ int port = USB_PD_PORT_USB3;
+
+ /*
+ * SN5S330's /INT pin is level, so process interrupts until it
+ * deasserts if the chip has a dedicated interrupt pin.
+ */
+ while (gpio_get_level(GPIO_USBC_UF_PPC_INT_ODL) == 0) {
+ int rise = 0;
+ int fall = 0;
+
+ read_reg(port, SN5S330_INT_TRIP_RISE_REG1, &rise);
+ read_reg(port, SN5S330_INT_TRIP_FALL_REG1, &fall);
+
+ /* Notify the system about the overcurrent event. */
+ if (rise & SN5S330_ILIM_PP1_MASK) {
+ CPRINTS("usb3_ppc: VBUS OC!");
+ gpio_set_level(GPIO_USB_HUB_OCP_NOTIFY, 0);
+ if (++ppc_ocp_count < 5)
+ hook_call_deferred(&baseboard_usb3_manage_vbus_data,
+ USB_HUB_OCP_RESET_MSEC);
+ else
+ CPRINTS("usb3_ppc: VBUS OC limit reached!");
+ }
+
+ /* Clear the interrupt sources. */
+ write_reg(port, SN5S330_INT_TRIP_RISE_REG1, rise);
+ write_reg(port, SN5S330_INT_TRIP_FALL_REG1, fall);
+
+ read_reg(port, SN5S330_INT_TRIP_RISE_REG2, &rise);
+ read_reg(port, SN5S330_INT_TRIP_FALL_REG2, &fall);
+
+ /*
+ * VCONN may be latched off due to an overcurrent. Indicate
+ * when the VCONN overcurrent happens.
+ */
+ if (rise & SN5S330_VCONN_ILIM)
+ CPRINTS("usb3_ppc: VCONN OC!");
+
+ /*
+ * CC overvoltage event. There is not action to take here, but
+ * log the event.
+ */
+ if (rise & SN5S330_CC1_CON || rise & SN5S330_CC2_CON)
+ CPRINTS("usb3_ppc: CC OV!");
+
+ /* Clear the interrupt sources. */
+ write_reg(port, SN5S330_INT_TRIP_RISE_REG2, rise);
+ write_reg(port, SN5S330_INT_TRIP_FALL_REG2, fall);
+
+ }
+}
+DECLARE_DEFERRED(baseboard_usbc_usb3_handle_interrupt);
+
+void baseboard_usbc_usb3_irq(void)
+{
+ hook_call_deferred(&baseboard_usbc_usb3_handle_interrupt_data, 0);
+}
+
+#endif /* defined(GPIO_USBC_UF_ATTACHED_SRC) && defined(SECTION_IS_RW) */
diff --git a/board/baklava/board.c b/board/baklava/board.c
index 11f80dbf81..cb2098d94b 100644
--- a/board/baklava/board.c
+++ b/board/baklava/board.c
@@ -69,6 +69,11 @@ static void board_pwr_btn_interrupt(enum gpio_signal signal)
{
baseboard_power_button_evt(gpio_get_level(signal));
}
+
+static void board_usbc_usb3_interrupt(enum gpio_signal signal)
+{
+ baseboard_usbc_usb3_irq();
+}
#endif /* SECTION_IS_RW */
#include "gpio_list.h" /* Must come after other header files. */
@@ -80,6 +85,7 @@ static void board_pwr_btn_interrupt(enum gpio_signal signal)
*/
const struct power_seq board_power_seq[] = {
{GPIO_EN_AC_JACK, 1, 20},
+ {GPIO_EC_DFU_MUX_CTRL, 0, 0},
{GPIO_EN_PP5000_A, 1, 31},
{GPIO_MST_LP_CTL_L, 1, 0},
{GPIO_EN_PP3300_B, 1, 1},
diff --git a/board/baklava/board.h b/board/baklava/board.h
index 1736b688d9..6d0e74f302 100644
--- a/board/baklava/board.h
+++ b/board/baklava/board.h
@@ -47,9 +47,12 @@
#define GPIO_DP_HPD GPIO_DDI_MST_IN_HPD
#define GPIO_USBC_UF_ATTACHED_SRC GPIO_USBC_UF_MUX_VBUS_EN
+#define GPIO_BPWR_DET GPIO_HUB_BPWRDET
+#define GPIO_USB_HUB_OCP_NOTIFY GPIO_USBC_DATA_OCP_NOTIFY
+#define GPIO_UFP_PLUG_DET GPIO_MST_UFP_PLUG_DET
-#define GPIO_TRIGGER_1 GPIO_TP41
-#define GPIO_TRIGGER_2 GPIO_TP73
+#define GPIO_TRIGGER_1 GPIO_USB3_A5_CDP_EN
+#define GPIO_TRIGGER_2 GPIO_USB3_A6_CDP_EN
enum debug_gpio {
TRIGGER_1 = 0,
diff --git a/board/baklava/gpio.inc b/board/baklava/gpio.inc
index b8a7dc96b5..afd80117b7 100644
--- a/board/baklava/gpio.inc
+++ b/board/baklava/gpio.inc
@@ -13,6 +13,7 @@ GPIO_INT(HOST_USBC_PPC_INT_ODL, PIN(D, 9), GPIO_INT_FALLING | GPIO_PULL_U
GPIO_INT(DDI_MST_IN_HPD, PIN(C, 14), GPIO_INT_BOTH, hpd_interrupt)
GPIO_INT(USBC_UF_MUX_VBUS_EN, PIN(C, 12), GPIO_INT_BOTH, board_uf_manage_vbus_interrupt)
GPIO_INT(PWR_BTN, PIN(A, 0), GPIO_INT_BOTH, board_pwr_btn_interrupt)
+GPIO_INT(USBC_UF_PPC_INT_ODL, PIN(B, 5), GPIO_INT_FALLING | GPIO_PULL_UP, board_usbc_usb3_interrupt)
#endif
/* Power sequencing signals */
@@ -30,6 +31,7 @@ GPIO(EN_PP5000_HSPORT, PIN(D, 0), GPIO_OUT_LOW)
GPIO(MST_LP_CTL_L, PIN(D, 10), GPIO_ODR_LOW)
GPIO(MST_RST_L, PIN(E, 14), GPIO_ODR_LOW)
GPIO(MST_HUB_LANE_SWITCH, PIN(C, 15), GPIO_OUT_HIGH)
+GPIO(MST_UFP_PLUG_DET, PIN(B, 12), GPIO_OUT_LOW)
/* Display Demux signals */
GPIO(DEMUX_DP_HDMI_MODE, PIN(E, 15), GPIO_OUT_LOW)
@@ -43,15 +45,15 @@ GPIO(USBC_UF_RESET_L, PIN(D, 2), GPIO_ODR_LOW)
/* USB Hubs signals */
GPIO(EC_HUB2_RESET_L, PIN(C, 5), GPIO_ODR_LOW)
GPIO(EC_HUB3_RESET_L, PIN(B, 10), GPIO_ODR_LOW)
+GPIO(USBC_DATA_OCP_NOTIFY, PIN(C, 2), GPIO_OUT_HIGH)
+GPIO(HUB_BPWRDET, PIN(C, 1), GPIO_OUT_LOW)
/* USB-A Current limit switches, set default to 1.5A */
-GPIO(TP73, PIN(C, 0), GPIO_OUT_LOW)
+GPIO(GBE_RESET_EC, PIN(C, 0), GPIO_OUT_LOW)
GPIO(EC_DFU_MUX_CTRL, PIN(C, 3), GPIO_OUT_HIGH)
-GPIO(EC_STATUS_LED1, PIN(C, 1), GPIO_OUT_HIGH)
-GPIO(EC_STATUS_LED2, PIN(C, 2), GPIO_OUT_HIGH)
GPIO(USB3_A5_CDP_EN, PIN(B, 9), GPIO_OUT_LOW)
GPIO(USB3_A6_CDP_EN, PIN(C, 13), GPIO_OUT_LOW)
-GPIO(TP41, PIN(B, 12), GPIO_OUT_LOW)
+
/* Write protect */
GPIO(EC_FLASH_WP_ODL, PIN(A, 3), GPIO_ODR_HIGH)
diff --git a/board/gingerbread/board.h b/board/gingerbread/board.h
index d0b2994d31..cee6cb45d9 100644
--- a/board/gingerbread/board.h
+++ b/board/gingerbread/board.h
@@ -59,6 +59,7 @@
#include "registers.h"
#define GPIO_DP_HPD GPIO_DDI_MST_IN_HPD
+#define GPIO_BPWR_DET GPIO_TP71
#define GPIO_TRIGGER_1 GPIO_EC_HUB1_RESET_L
#define GPIO_TRIGGER_2 GPIO_EC_HUB2_RESET_L
diff --git a/board/gingerbread/gpio.inc b/board/gingerbread/gpio.inc
index 9d2e3df5d9..5b7b3a9619 100644
--- a/board/gingerbread/gpio.inc
+++ b/board/gingerbread/gpio.inc
@@ -73,6 +73,7 @@ GPIO(FLASH_SPI1_MOSI, PIN(A, 7), GPIO_INT_BOTH)
/* misc signals */
GPIO(EC_DFU_MUX_CTRL, PIN(A, 8), GPIO_OUT_HIGH)
+GPIO(TP71, PIN(B, 0), GPIO_OUT_LOW)
/*
* I2C SCL/SDA pins. These will normally be under control of the peripheral from
diff --git a/board/quiche/board.c b/board/quiche/board.c
index 429c2257e9..e49b2e1b1a 100644
--- a/board/quiche/board.c
+++ b/board/quiche/board.c
@@ -89,6 +89,11 @@ static void board_pwr_btn_interrupt(enum gpio_signal signal)
{
baseboard_power_button_evt(gpio_get_level(signal));
}
+
+static void board_usbc_usb3_interrupt(enum gpio_signal signal)
+{
+ baseboard_usbc_usb3_irq();
+}
#endif /* SECTION_IS_RW */
#include "gpio_list.h" /* Must come after other header files. */
@@ -100,6 +105,7 @@ static void board_pwr_btn_interrupt(enum gpio_signal signal)
*/
const struct power_seq board_power_seq[] = {
{GPIO_EN_AC_JACK, 1, 20},
+ {GPIO_EC_DFU_MUX_CTRL, 0, 0},
{GPIO_EN_PP5000_A, 1, 31},
{GPIO_MST_LP_CTL_L, 1, 0},
{GPIO_EN_PP3300_B, 1, 1},
@@ -306,9 +312,19 @@ uint16_t tcpc_get_alert_status(void)
return status;
}
+static void board_usb_pd_dp_ocp_reset(void)
+{
+ gpio_set_level(GPIO_USBC_ALTMODE_OCP_NOTIFY, 1);
+}
+DECLARE_DEFERRED(board_usb_pd_dp_ocp_reset);
+
void board_overcurrent_event(int port, int is_overcurrented)
{
- /* TODO(b/174825406): check correct operation for honeybuns */
+ if (port == USB_PD_PORT_DP) {
+ gpio_set_level(GPIO_USBC_ALTMODE_OCP_NOTIFY, !is_overcurrented);
+ hook_call_deferred(&board_usb_pd_dp_ocp_reset_data,
+ USB_HUB_OCP_RESET_MSEC);
+ }
}
int dock_get_mf_preference(void)
diff --git a/board/quiche/board.h b/board/quiche/board.h
index 70ed82474c..336b6fcd7e 100644
--- a/board/quiche/board.h
+++ b/board/quiche/board.h
@@ -49,9 +49,12 @@
#define GPIO_DP_HPD GPIO_DDI_MST_IN_HPD
#define GPIO_USBC_UF_ATTACHED_SRC GPIO_USBC_UF_MUX_VBUS_EN
+#define GPIO_BPWR_DET GPIO_TP73
+#define GPIO_USB_HUB_OCP_NOTIFY GPIO_USBC_DATA_OCP_NOTIFY
+#define GPIO_UFP_PLUG_DET GPIO_MST_UFP_PLUG_DET
-#define GPIO_TRIGGER_1 GPIO_TP41
-#define GPIO_TRIGGER_2 GPIO_TP73
+#define GPIO_TRIGGER_1 GPIO_EC_STATUS_LED1
+#define GPIO_TRIGGER_2 GPIO_EC_STATUS_LED2
enum debug_gpio {
TRIGGER_1 = 0,
diff --git a/board/quiche/gpio.inc b/board/quiche/gpio.inc
index d47f54db74..fcd837854f 100644
--- a/board/quiche/gpio.inc
+++ b/board/quiche/gpio.inc
@@ -15,6 +15,7 @@ GPIO_INT(USBC_DP_PPC_INT_ODL, PIN(E, 7), GPIO_INT_FALLING | GPIO_PULL_U
GPIO_INT(DDI_MST_IN_HPD, PIN(C, 14), GPIO_INT_BOTH, hpd_interrupt)
GPIO_INT(USBC_UF_MUX_VBUS_EN, PIN(C, 12), GPIO_INT_BOTH, board_uf_manage_vbus_interrupt)
GPIO_INT(PWR_BTN, PIN(A, 0), GPIO_INT_BOTH, board_pwr_btn_interrupt)
+GPIO_INT(USBC_UF_PPC_INT_ODL, PIN(B, 5), GPIO_INT_FALLING | GPIO_PULL_UP, board_usbc_usb3_interrupt)
#endif
/* Power sequencing signals */
@@ -32,6 +33,7 @@ GPIO(EN_PP5000_HSPORT, PIN(D, 0), GPIO_OUT_LOW)
GPIO(MST_LP_CTL_L, PIN(D, 10), GPIO_ODR_LOW)
GPIO(MST_RST_L, PIN(E, 14), GPIO_ODR_LOW)
GPIO(MST_HUB_LANE_SWITCH, PIN(C, 15), GPIO_OUT_HIGH)
+GPIO(MST_UFP_PLUG_DET, PIN(B, 12), GPIO_OUT_LOW)
/* Display Demux signals */
GPIO(DEMUX_DUAL_DP_MODE, PIN(B, 0), GPIO_OUT_LOW)
@@ -49,6 +51,8 @@ GPIO(USBC_UF_RESET_L, PIN(D, 2), GPIO_ODR_LOW)
/* USB Hubs signals */
GPIO(EC_HUB2_RESET_L, PIN(C, 5), GPIO_ODR_LOW)
GPIO(EC_HUB3_RESET_L, PIN(B, 10), GPIO_ODR_LOW)
+GPIO(USBC_ALTMODE_OCP_NOTIFY, PIN(F, 0), GPIO_OUT_HIGH)
+GPIO(USBC_DATA_OCP_NOTIFY, PIN(F, 1), GPIO_OUT_HIGH)
/* USB-A Current limit switches, set default to 1.5A */
GPIO(TP73, PIN(C, 0), GPIO_OUT_LOW)
@@ -57,7 +61,6 @@ GPIO(EC_STATUS_LED1, PIN(C, 1), GPIO_OUT_HIGH)
GPIO(EC_STATUS_LED2, PIN(C, 2), GPIO_OUT_HIGH)
GPIO(USB3_A5_CDP_EN, PIN(B, 9), GPIO_OUT_LOW)
GPIO(USB3_A6_CDP_EN, PIN(C, 13), GPIO_OUT_LOW)
-GPIO(TP41, PIN(B, 12), GPIO_OUT_LOW)
/* Write protect */
GPIO(EC_FLASH_WP_ODL, PIN(A, 3), GPIO_ODR_HIGH)
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