diff options
560 files changed, 9552 insertions, 4306 deletions
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 8936070470..6fe0eda1b1 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -24,7 +24,7 @@ cache: - .cache/pip - venv/ - modules/ - - zephyr/main + - zephyr/ # The directory structure is: @@ -34,11 +34,9 @@ cache: before_script: - export MODULES_DIR="$CI_PROJECT_DIR/modules" - mkdir -p "${MODULES_DIR}" - - export ZEPHYR_ROOT="$CI_PROJECT_DIR/zephyr/main" - - mkdir -p "${ZEPHYR_ROOT}" - - test -d "${ZEPHYR_ROOT}/v2.6" || git clone --depth 1 -b chromeos-v2.6 https://chromium.googlesource.com/chromiumos/third_party/zephyr "${ZEPHYR_ROOT}/v2.6" - - test -d "${ZEPHYR_ROOT}/v2.7" || git clone --depth 1 -b chromeos-v2.7 https://chromium.googlesource.com/chromiumos/third_party/zephyr "${ZEPHYR_ROOT}/v2.7" - - test -d "${ZEPHYR_ROOT}/v2.8" || git clone --depth 1 -b chromeos-v2.8 https://chromium.googlesource.com/chromiumos/third_party/zephyr "${ZEPHYR_ROOT}/v2.8" + - export ZEPHYR_BASE="${CI_PROJECT_DIR}/zephyr/main" + - mkdir -p "${ZEPHYR_BASE}" + - test -d "${ZEPHYR_BASE}/.git" || git clone --depth 1 -b chromeos-v2.7 https://chromium.googlesource.com/chromiumos/third_party/zephyr "${ZEPHYR_BASE}" - test -d "${MODULES_DIR}/cmsis" || git clone --depth 1 -b chromeos-main https://chromium.googlesource.com/chromiumos/third_party/zephyr/cmsis "${MODULES_DIR}/cmsis" - test -d "${MODULES_DIR}/hal_stm32" || git clone --depth 1 -b chromeos-main https://chromium.googlesource.com/chromiumos/third_party/zephyr/hal_stm32 "${MODULES_DIR}/hal_stm32" - test -d "${MODULES_DIR}/nanopb" || git clone --depth 1 -b main https://chromium.googlesource.com/chromiumos/third_party/zephyr/nanopb "${MODULES_DIR}/nanopb" @@ -48,7 +46,6 @@ before_script: - python3 -m pip install zephyr/zmake --user - python3 -m pip install pyyaml - export BUILD_DIR=build - - export ZEPHYR_DIR=/zephyr - export PATH="$PATH:$HOME/.local/bin" - export PYTHONIOENCODING=utf-8 - export EC_DIR=/builds/zephyr-ec/ec @@ -62,10 +59,10 @@ seed_cache: - .cache/pip - venv/ - modules/ - - zephyr/main + - zephyr/ policy: push script: - - ls "${MODULES_DIR}" "${ZEPHYR_ROOT}" + - ls "${MODULES_DIR}" "${ZEPHYR_BASE}" # Users of this template must set: # $PROJECT to the project to build. E.g., "lazor" @@ -73,7 +70,7 @@ seed_cache: stage: build needs: ["seed_cache"] script: - - zmake --zephyr-root "${ZEPHYR_ROOT}" + - zmake --zephyr-base "${ZEPHYR_BASE}" --modules-dir "${MODULES_DIR}" -l DEBUG configure -b -B "${BUILD_DIR}/${PROJECT}" -t ${TOOLCHAIN:-zephyr} "${PROJECT}" @@ -115,6 +112,11 @@ hayato: PROJECT: "hayato" <<: *build_template +hayato_coverage: + variables: + PROJECT: "hayato" + <<: *coverage_template + herobrine_npcx9: variables: PROJECT: "herobrine_npcx9" @@ -165,7 +167,7 @@ zephyr_coverage: stage: test needs: ["seed_cache"] script: - - zmake --zephyr-root "${ZEPHYR_ROOT}" + - zmake --zephyr-base "${ZEPHYR_BASE}" --modules-dir "${MODULES_DIR}" -l DEBUG coverage "${BUILD_DIR}/zcoverage" artifacts: @@ -180,7 +182,11 @@ merged_coverage: needs: ["ec_coverage", "zephyr_coverage"] script: - lcov -o build/merged.info -a build/coverage/lcov.info -a build/zcoverage/lcov.info - - lcov -o build/merged_no_zephyr.info -r build/merged.info "${ZEPHYR_ROOT}/*" "${MODULES_DIR}/*" "zephyr/drivers/*" '/usr/include/x86_64-linux-gnu/*' + - lcov -o build/merged_no_zephyr.info -r build/merged.info + "${ZEPHYR_BASE}/**" "${MODULES_DIR}/**" + 'zephyr/drivers/**' 'zephyr/include/drivers/**' + 'zephyr/shim/chip/**' 'zephyr/shim/core/**' + '/usr/include/x86_64-linux-gnu/**' artifacts: paths: - build/*.info @@ -192,6 +198,6 @@ testall: stage: test needs: ["seed_cache"] script: - - zmake --zephyr-root "${ZEPHYR_ROOT}" + - zmake --zephyr-base "${ZEPHYR_BASE}" --modules-dir "${MODULES_DIR}" -l DEBUG testall diff --git a/baseboard/asurada/baseboard.c b/baseboard/asurada/baseboard.c index c89348a562..c0ba896e61 100644 --- a/baseboard/asurada/baseboard.c +++ b/baseboard/asurada/baseboard.c @@ -71,10 +71,34 @@ int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"bat_chg", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, - {"sensor", IT83XX_I2C_CH_B, 400, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, - {"usb0", IT83XX_I2C_CH_C, 400, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, - {"usb1", IT83XX_I2C_CH_E, 400, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, + { + .name = "bat_chg", + .port = IT83XX_I2C_CH_A, + .kbps = 100, + .scl = GPIO_I2C_A_SCL, + .sda = GPIO_I2C_A_SDA + }, + { + .name = "sensor", + .port = IT83XX_I2C_CH_B, + .kbps = 400, + .scl = GPIO_I2C_B_SCL, + .sda = GPIO_I2C_B_SDA + }, + { + .name = "usb0", + .port = IT83XX_I2C_CH_C, + .kbps = 400, + .scl = GPIO_I2C_C_SCL, + .sda = GPIO_I2C_C_SDA + }, + { + .name = "usb1", + .port = IT83XX_I2C_CH_E, + .kbps = 400, + .scl = GPIO_I2C_E_SCL, + .sda = GPIO_I2C_E_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/baseboard/brask/baseboard.h b/baseboard/brask/baseboard.h index 19f8aef126..e402ba7516 100644 --- a/baseboard/brask/baseboard.h +++ b/baseboard/brask/baseboard.h @@ -41,7 +41,7 @@ #define CONFIG_BOARD_RESET_AFTER_POWER_ON /* Host communication */ -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define CONFIG_HOSTCMD_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST diff --git a/baseboard/brya/baseboard.h b/baseboard/brya/baseboard.h index 9d12792dbe..129fb5836e 100644 --- a/baseboard/brya/baseboard.h +++ b/baseboard/brya/baseboard.h @@ -45,7 +45,7 @@ #define CONFIG_BOARD_RESET_AFTER_POWER_ON /* Host communication */ -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 /* diff --git a/baseboard/cherry/baseboard.c b/baseboard/cherry/baseboard.c index 9cd2ccbef5..b29cc9ccce 100644 --- a/baseboard/cherry/baseboard.c +++ b/baseboard/cherry/baseboard.c @@ -357,10 +357,34 @@ const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"bat_chg", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, - {"sensor", IT83XX_I2C_CH_B, 400, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, - {"usb0", IT83XX_I2C_CH_C, 400, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, - {"usb1", IT83XX_I2C_CH_E, 1000, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, + { + .name = "bat_chg", + .port = IT83XX_I2C_CH_A, + .kbps = 100, + .scl = GPIO_I2C_A_SCL, + .sda = GPIO_I2C_A_SDA + }, + { + .name = "sensor", + .port = IT83XX_I2C_CH_B, + .kbps = 400, + .scl = GPIO_I2C_B_SCL, + .sda = GPIO_I2C_B_SDA + }, + { + .name = "usb0", + .port = IT83XX_I2C_CH_C, + .kbps = 400, + .scl = GPIO_I2C_C_SCL, + .sda = GPIO_I2C_C_SDA + }, + { + .name = "usb1", + .port = IT83XX_I2C_CH_E, + .kbps = 1000, + .scl = GPIO_I2C_E_SCL, + .sda = GPIO_I2C_E_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/baseboard/cherry/baseboard.h b/baseboard/cherry/baseboard.h index 2a4705e541..6f5a98b786 100644 --- a/baseboard/cherry/baseboard.h +++ b/baseboard/cherry/baseboard.h @@ -208,6 +208,11 @@ EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) | \ EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) +/* And the MKBP events */ +#define CONFIG_MKBP_EVENT_WAKEUP_MASK \ + (BIT(EC_MKBP_EVENT_KEY_MATRIX) | \ + BIT(EC_MKBP_EVENT_HOST_EVENT)) + #ifndef __ASSEMBLER__ #include "gpio_signal.h" diff --git a/baseboard/corsola/baseboard.c b/baseboard/corsola/baseboard.c deleted file mode 100644 index 4d8fea6c7c..0000000000 --- a/baseboard/corsola/baseboard.c +++ /dev/null @@ -1,82 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Corsola baseboard-specific configuration */ - -#include "adc.h" -#include "button.h" -#include "charge_manager.h" -#include "charger.h" -#include "charger.h" -#include "charge_state.h" -#include "charge_state_v2.h" -#include "chipset.h" -#include "common.h" -#include "console.h" -#include "driver/accel_lis2dw12.h" -#include "driver/accelgyro_icm426xx.h" -#include "driver/bc12/mt6360.h" -#include "driver/charger/isl923x.h" -#include "driver/ppc/syv682x.h" -#include "driver/tcpm/it83xx_pd.h" -#include "driver/temp_sensor/thermistor.h" -#include "extpower.h" -#include "gpio.h" -#include "hooks.h" -#include "i2c.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "motion_sense.h" -#include "power_button.h" -#include "power.h" -#include "regulator.h" -#include "spi.h" -#include "switch.h" -#include "tablet_mode.h" -#include "task.h" -#include "temp_sensor.h" -#include "timer.h" -#include "uart.h" - -#include "gpio_list.h" - -/* Wake-up pins for hibernate */ -enum gpio_signal hibernate_wake_pins[] = { - GPIO_AC_PRESENT, - GPIO_LID_OPEN, - GPIO_POWER_BUTTON_L, -}; -int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -/* - * I2C channels (A, B, and C) are using the same timing registers (00h~07h) - * at default. - * In order to set frequency independently for each channels, - * We use timing registers 09h~0Bh, and the supported frequency will be: - * 50KHz, 100KHz, 400KHz, or 1MHz. - * I2C channels (D, E and F) can be set different frequency on different ports. - * The I2C(D/E/F) frequency depend on the frequency of SMBus Module and - * the individual prescale register. - * The frequency of SMBus module is 24MHz on default. - * The allowed range of I2C(D/E/F) frequency is as following setting. - * SMBus Module Freq = PLL_CLOCK / ((IT83XX_ECPM_SCDCR2 & 0x0F) + 1) - * (SMBus Module Freq / 510) <= I2C Freq <= (SMBus Module Freq / 8) - * Channel D has multi-function and can be used as UART interface. - * Channel F is reserved for EC debug. - */ - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"bat_chg", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, - {"sensor", IT83XX_I2C_CH_B, 400, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, - {"usb0", IT83XX_I2C_CH_C, 400, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, - {"usb1", IT83XX_I2C_CH_E, 400, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -int board_allow_i2c_passthru(int port) -{ - return (port == I2C_PORT_VIRTUAL_BATTERY); -} diff --git a/baseboard/corsola/baseboard.h b/baseboard/corsola/baseboard.h deleted file mode 100644 index 95d3b1d20c..0000000000 --- a/baseboard/corsola/baseboard.h +++ /dev/null @@ -1,196 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Corsola board configuration */ - -#ifndef __CROS_EC_BASEBOARD_H -#define __CROS_EC_BASEBOARD_H - -/* IT81202-bx config */ -/* - * NOTE: we need to make correct VCC voltage selection here if EC's VCC isn't - * connect to 1.8v on other versions. - */ -#define CONFIG_IT83XX_VCC_1P8V - -/* - * On power-on, H1 releases the EC from reset but then quickly asserts and - * releases the reset a second time. This means the EC sees 2 resets: - * (1) power-on reset, (2) reset-pin reset. This config will - * allow the second reset to be treated as a power-on. - */ -#define CONFIG_BOARD_RESET_AFTER_POWER_ON -#define CONFIG_CHIPSET_MT8192 -#define CONFIG_EXTPOWER_GPIO -#define CONFIG_HIBERNATE_WAKE_PINS_DYNAMIC -#define CONFIG_POWER_SLEEP_FAILURE_DETECTION -#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE - -/* Chipset */ -#define CONFIG_CMD_AP_RESET_LOG -#define CONFIG_CMD_POWERINDEBUG -#define CONFIG_HOST_COMMAND_STATUS -#define CONFIG_LOW_POWER_IDLE -#define CONFIG_LOW_POWER_S0 -#define CONFIG_POWER_BUTTON -#define CONFIG_POWER_COMMON -#define CONFIG_PWM -#define CONFIG_VBOOT_HASH -#define CONFIG_VOLUME_BUTTONS -#define CONFIG_WP_ACTIVE_HIGH - -/* Battery */ -#define CONFIG_BATTERY_CUT_OFF -#define CONFIG_BATTERY_FUEL_GAUGE -#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_ODL -#define CONFIG_BATTERY_SMART - -/* BC12 */ -#define CONFIG_BC12_DETECT_MT6360 -#define CONFIG_BC12_DETECT_PI3USB9201 -#undef CONFIG_BC12_SINGLE_DRIVER -#define CONFIG_USB_CHARGER - -/* Charger */ -#define ADC_AMON_BMON ADC_CHARGER_AMON_R /* ADC name remap */ -#define ADC_PSYS ADC_CHARGER_PMON /* ADC name remap */ -#define CONFIG_CHARGE_MANAGER -#define CONFIG_CHARGER -#define CONFIG_CHARGE_RAMP_HW -#define CONFIG_CHARGER_DISCHARGE_ON_AC -#define CONFIG_CHARGER_INPUT_CURRENT 512 -#define CONFIG_CHARGER_ISL9238C -#define CONFIG_CHARGER_MAINTAIN_VBAT -#define CONFIG_CHARGER_OTG -#define CONFIG_CHARGER_PSYS -#define CONFIG_CHARGER_PSYS_READ -#define CONFIG_CHARGER_SENSE_RESISTOR 10 /* BOARD_RS2 */ -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20 /* BOARD_RS1 */ -#define CONFIG_CMD_CHARGER_ADC_AMON_BMON - -/* Keyboard */ -#define CONFIG_CMD_KEYBOARD -#define CONFIG_KEYBOARD_COL2_INVERTED -#define CONFIG_KEYBOARD_PROTOCOL_MKBP -#define CONFIG_MKBP_USE_GPIO - -/* I2C */ -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER -#define CONFIG_I2C_PASSTHRU_RESTRICTED -#define CONFIG_I2C_VIRTUAL_BATTERY -#define I2C_PORT_CHARGER IT83XX_I2C_CH_A -#define I2C_PORT_BATTERY IT83XX_I2C_CH_A -#define I2C_PORT_POWER IT83XX_I2C_CH_A -#define I2C_PORT_ACCEL IT83XX_I2C_CH_B -#define I2C_PORT_PPC0 IT83XX_I2C_CH_C -#define I2C_PORT_PPC1 IT83XX_I2C_CH_E -#define I2C_PORT_USB_MUX0 IT83XX_I2C_CH_C -#define I2C_PORT_USB_MUX1 IT83XX_I2C_CH_E -#define I2C_PORT_VIRTUAL_BATTERY I2C_PORT_BATTERY -#define CONFIG_SMBUS_PEC - -/* LED */ -#define CONFIG_LED_COMMON - -/* PD / USB-C / PPC */ -#define CONFIG_CMD_PPC_DUMP -#define CONFIG_HOSTCMD_PD_CONTROL -#define CONFIG_IT83XX_TUNE_CC_PHY -#define CONFIG_USB_MUX_VIRTUAL -#define CONFIG_USBC_PPC -#define CONFIG_USBC_PPC_DEDICATED_INT -#define CONFIG_USBC_PPC_POLARITY -#define CONFIG_USBC_PPC_SYV682C -#define CONFIG_USBC_PPC_VCONN -#define CONFIG_USBC_SS_MUX -#define CONFIG_USBC_VCONN -#define CONFIG_USBC_VCONN_SWAP -#define CONFIG_USB_DRP_ACC_TRYSRC -#define CONFIG_USB_MUX_IT5205 /* C0 */ -#define CONFIG_USB_MUX_PS8743 /* C1 */ -#define CONFIG_USB_PD_ALT_MODE -#define CONFIG_USB_PD_ALT_MODE_DFP -#define CONFIG_USB_PD_DECODE_SOP -#define CONFIG_USB_PD_DISCHARGE -#define CONFIG_USB_PD_DISCHARGE_PPC -#define CONFIG_USB_PD_DP_HPD_GPIO -#define CONFIG_USB_PD_DP_HPD_GPIO_CUSTOM -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_FRS_PPC -#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT 2 -#define CONFIG_USB_PD_LOGGING -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define CONFIG_USB_PD_REV30 -#define CONFIG_USB_PD_TCPC_LOW_POWER -#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP -#define CONFIG_USB_PD_TCPM_TCPCI -#define CONFIG_USB_PD_TCPMV2 -#define CONFIG_USB_PD_TRY_SRC -#define CONFIG_USB_PD_VBUS_DETECT_PPC -#define CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT -#define CONFIG_USB_PID 0x5053 -#define CONFIG_USB_POWER_DELIVERY - -/* USB-A */ -#define CONFIG_USB_PORT_POWER_DUMB -#define CONFIG_USB_PORT_POWER_DUMB_CUSTOM_HOOK -#define USB_PORT_COUNT USBA_PORT_COUNT - -/* UART */ -#undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 4096 - -/* Sensor */ -#ifdef HAS_TASK_MOTIONSENSE -#define CONFIG_CMD_ACCEL_INFO -#define CONFIG_CMD_ACCELS - -#define CONFIG_ACCEL_FIFO -#define CONFIG_ACCEL_FIFO_SIZE 256 -#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3) -#define CONFIG_ACCEL_INTERRUPTS -#endif - -/* SPI / Host Command */ -#define CONFIG_SPI - -/* MKBP */ -#define CONFIG_MKBP_EVENT - -#define CONFIG_KEYBOARD_PROTOCOL_MKBP -#define CONFIG_MKBP_USE_GPIO - -/* Voltage regulator control */ -#define CONFIG_HOSTCMD_REGULATOR - -/* Define the host events which are allowed to wakeup AP in S3. */ -#define CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK \ - (EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_HANG_DETECT) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) - -/* And the MKBP events */ -#define CONFIG_MKBP_EVENT_WAKEUP_MASK \ - (BIT(EC_MKBP_EVENT_KEY_MATRIX) | \ - BIT(EC_MKBP_EVENT_HOST_EVENT)) - -#include "baseboard_common.h" - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" -#include "power/mt8192.h" - -void board_reset_pd_mcu(void); -enum board_sub_board board_get_sub_board(void); -void usb_a0_interrupt(enum gpio_signal signal); - -#endif /* !__ASSEMBLER__ */ -#endif /* __CROS_EC_BASEBOARD_H */ diff --git a/baseboard/corsola/baseboard_common.h b/baseboard/corsola/baseboard_common.h deleted file mode 100644 index c0328ba4e1..0000000000 --- a/baseboard/corsola/baseboard_common.h +++ /dev/null @@ -1,44 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Corsola baseboard-specific onfiguration common to ECOS and Zephyr */ - -#ifndef __CROS_EC_BASEBOARD_COMMON_H -#define __CROS_EC_BASEBOARD_COMMON_H - -/* GPIO name remapping */ -#define GPIO_EN_HDMI_PWR GPIO_EC_X_GPIO1 -#define GPIO_USB_C1_FRS_EN GPIO_EC_X_GPIO1 -#define GPIO_USB_C1_PPC_INT_ODL GPIO_X_EC_GPIO2 -#define GPIO_PS185_EC_DP_HPD GPIO_X_EC_GPIO2 -#define GPIO_USB_C1_DP_IN_HPD GPIO_EC_X_GPIO3 -#define GPIO_PS185_PWRDN_ODL GPIO_EC_X_GPIO3 - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" - -enum board_sub_board { - SUB_BOARD_NONE = -1, - SUB_BOARD_TYPEC, - SUB_BOARD_HDMI, - SUB_BOARD_COUNT, -}; - -/** - * board_get_version() - Get the board version - * - * Read the ADC to obtain the board version - * - * @return board version in the range 0 to 14 inclusive - */ -int board_get_version(void); - -void ppc_interrupt(enum gpio_signal signal); -void bc12_interrupt(enum gpio_signal signal); -void x_ec_interrupt(enum gpio_signal signal); - -#endif /* !__ASSEMBLER__ */ -#endif /* __CROS_EC_BASEBOARD_COMMON_H */ diff --git a/baseboard/corsola/board_id.c b/baseboard/corsola/board_id.c deleted file mode 100644 index c39cf050a8..0000000000 --- a/baseboard/corsola/board_id.c +++ /dev/null @@ -1,107 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "adc.h" -#include "common.h" -#include "console.h" -#include "gpio.h" -#include "hooks.h" -#include "timer.h" -#include "util.h" - -/** - * Conversion based on following table: - * - * ID | Rp | Rd | Voltage - * | kOhm | kOhm | mV - * ---+------+------+-------- - * 0 | 51.1 | 2.2 | 136.2 - * 1 | 51.1 | 6.81 | 388.1 - * 2 | 51.1 | 11 | 584.5 - * 3 | 57.6 | 18 | 785.7 - * 4 | 51.1 | 22 | 993.2 - * 5 | 51.1 | 30 | 1220.7 - * 6 | 51.1 | 39.2 | 1432.6 - * 7 | 56 | 56 | 1650.0 - * 8 | 47 | 61.9 | 1875.8 - * 9 | 47 | 80.6 | 2084.5 - * 10 | 56 | 124 | 2273.3 - * 11 | 51.1 | 150 | 2461.5 - * 12 | 47 | 200 | 2672.1 - * 13 | 47 | 330 | 2888.6 - * 14 | 47 | 680 | 3086.7 - */ -const static int voltage_map[] = { - 136, - 388, - 584, - 785, - 993, - 1220, - 1432, - 1650, - 1875, - 2084, - 2273, - 2461, - 2672, - 2888, - 3086, -}; - -const int threshold_mv = 100; - -/** - * Convert ADC value to board id using the voltage table above. - * - * @param ch ADC channel to read, usually ADC_BOARD_ID_0 or ADC_BOARD_ID_1. - * - * @return a non-negative board id, or negative value if error. - */ -static int adc_value_to_numeric_id(enum adc_channel ch) -{ - int mv; - - gpio_set_level(GPIO_EN_EC_ID_ODL, 0); - /* Wait to allow cap charge */ - msleep(10); - - mv = adc_read_channel(ch); - if (mv == ADC_READ_ERROR) - mv = adc_read_channel(ch); - - gpio_set_level(GPIO_EN_EC_ID_ODL, 1); - - if (mv == ADC_READ_ERROR) - return -EC_ERROR_UNKNOWN; - - for (int i = 0; i < ARRAY_SIZE(voltage_map); i++) { - if (IN_RANGE(mv, voltage_map[i] - threshold_mv, - voltage_map[i] + threshold_mv)) - return i; - } - - return -EC_ERROR_UNKNOWN; -} - -static int version = -1; - -/* b/163963220: Cache ADC value before board_hibernate_late() reads it */ -static void board_version_init(void) -{ - version = adc_value_to_numeric_id(ADC_BOARD_ID_0); - if (version < 0) { - ccprints("WARN:BOARD_ID_0"); - ccprints("Assuming board id = 0"); - - version = 0; - } -} -DECLARE_HOOK(HOOK_INIT, board_version_init, HOOK_PRIO_INIT_ADC + 1); - -__override int board_get_version(void) -{ - return version; -} diff --git a/baseboard/corsola/build.mk b/baseboard/corsola/build.mk deleted file mode 100644 index ce7b7272bd..0000000000 --- a/baseboard/corsola/build.mk +++ /dev/null @@ -1,15 +0,0 @@ -# -*- makefile -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Baseboard specific files build -# - -baseboard-y=baseboard.o -baseboard-y+=board_chipset.o -baseboard-y+=board_id.o -baseboard-y+=hibernate.o -baseboard-y+=regulator.o -baseboard-y+=usbc_config.o -baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o diff --git a/baseboard/dedede/baseboard.c b/baseboard/dedede/baseboard.c index 5bd80ca53b..54c7a6a24a 100644 --- a/baseboard/dedede/baseboard.c +++ b/baseboard/dedede/baseboard.c @@ -185,7 +185,7 @@ __override int power_signal_get_level(enum gpio_signal signal) if (signal == GPIO_PG_EC_ALL_SYS_PWRGD) return intel_x86_get_pg_ec_all_sys_pwrgd(); - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) { + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) { /* Check signal is from GPIOs or VWs */ if (espi_signal_is_vw(signal)) return espi_vw_get_wire((enum espi_vw_signal)signal); diff --git a/baseboard/dedede/baseboard.h b/baseboard/dedede/baseboard.h index 7357b1a5ce..529e011f32 100644 --- a/baseboard/dedede/baseboard.h +++ b/baseboard/dedede/baseboard.h @@ -121,7 +121,7 @@ /* EC Modules */ #define CONFIG_ADC #define CONFIG_CRC8 -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_EVENTS #define CONFIG_I2C #define CONFIG_I2C_CONTROLLER diff --git a/baseboard/dedede/variant_ec_it8320.c b/baseboard/dedede/variant_ec_it8320.c index e8560a8bc0..29c7758c6a 100644 --- a/baseboard/dedede/variant_ec_it8320.c +++ b/baseboard/dedede/variant_ec_it8320.c @@ -76,31 +76,46 @@ BUILD_ASSERT(ARRAY_SIZE(vcmp_list) == VCMP_COUNT); /* I2C Ports */ const struct i2c_port_t i2c_ports[] = { { - "eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA }, { - "battery", I2C_PORT_BATTERY, 100, GPIO_EC_I2C_BATTERY_SCL, - GPIO_EC_I2C_BATTERY_SDA + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_EC_I2C_BATTERY_SCL, + .sda = GPIO_EC_I2C_BATTERY_SDA }, #ifdef HAS_TASK_MOTIONSENSE { - "sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA }, #endif #if CONFIG_USB_PD_PORT_MAX_COUNT > 1 { - "sub_usbc1", I2C_PORT_SUB_USB_C1, 1000, - GPIO_EC_I2C_SUB_USB_C1_SCL, GPIO_EC_I2C_SUB_USB_C1_SDA + .name = "sub_usbc1", + .port = I2C_PORT_SUB_USB_C1, + .kbps = 1000, + .scl = GPIO_EC_I2C_SUB_USB_C1_SCL, + .sda = GPIO_EC_I2C_SUB_USB_C1_SDA }, #endif { - "usbc0", I2C_PORT_USB_C0, 1000, GPIO_EC_I2C_USB_C0_SCL, - GPIO_EC_I2C_USB_C0_SDA + .name = "usbc0", + .port = I2C_PORT_USB_C0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_SCL, + .sda = GPIO_EC_I2C_USB_C0_SDA }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/baseboard/dedede/variant_ec_npcx796fc.c b/baseboard/dedede/variant_ec_npcx796fc.c index c34de929a7..aa2709b33b 100644 --- a/baseboard/dedede/variant_ec_npcx796fc.c +++ b/baseboard/dedede/variant_ec_npcx796fc.c @@ -163,36 +163,54 @@ DECLARE_HOOK(HOOK_LID_CHANGE, enable_adc_irqs_via_lid, HOOK_PRIO_DEFAULT); /* I2C Ports */ __attribute__((weak)) const struct i2c_port_t i2c_ports[] = { { - "eeprom", I2C_PORT_EEPROM, 1000, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 1000, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA }, { - "battery", I2C_PORT_BATTERY, 100, GPIO_EC_I2C_BATTERY_SCL, - GPIO_EC_I2C_BATTERY_SDA + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_EC_I2C_BATTERY_SCL, + .sda = GPIO_EC_I2C_BATTERY_SDA }, #ifdef HAS_TASK_MOTIONSENSE { - "sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA }, #endif { - "usbc0", I2C_PORT_USB_C0, 1000, GPIO_EC_I2C_USB_C0_SCL, - GPIO_EC_I2C_USB_C0_SDA + .name = "usbc0", + .port = I2C_PORT_USB_C0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_SCL, + .sda = GPIO_EC_I2C_USB_C0_SDA }, #if CONFIG_USB_PD_PORT_MAX_COUNT > 1 { - "sub_usbc1", I2C_PORT_SUB_USB_C1, 1000, - GPIO_EC_I2C_SUB_USB_C1_SCL, GPIO_EC_I2C_SUB_USB_C1_SDA + .name = "sub_usbc1", + .port = I2C_PORT_SUB_USB_C1, + .kbps = 1000, + .scl = GPIO_EC_I2C_SUB_USB_C1_SCL, + .sda = GPIO_EC_I2C_SUB_USB_C1_SDA }, #endif #ifdef BOARD_BUGZZY { - "lcd", I2C_PORT_LCD, 400, GPIO_EC_I2C_LCD_SCL, - GPIO_EC_I2C_LCD_SDA + .name = "lcd", + .port = I2C_PORT_LCD, + .kbps = 400, + .scl = GPIO_EC_I2C_LCD_SCL, + .sda = GPIO_EC_I2C_LCD_SDA }, #endif }; diff --git a/baseboard/goroh/baseboard.c b/baseboard/goroh/baseboard.c index ee88d1e713..8fd32b315c 100644 --- a/baseboard/goroh/baseboard.c +++ b/baseboard/goroh/baseboard.c @@ -109,10 +109,34 @@ DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"bat_chg", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, - {"sensor", IT83XX_I2C_CH_B, 400, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, - {"usb0", IT83XX_I2C_CH_C, 400, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, - {"usb1", IT83XX_I2C_CH_E, 400, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, + { + .name = "bat_chg", + .port = IT83XX_I2C_CH_A, + .kbps = 100, + .scl = GPIO_I2C_A_SCL, + .sda = GPIO_I2C_A_SDA + }, + { + .name = "sensor", + .port = IT83XX_I2C_CH_B, + .kbps = 400, + .scl = GPIO_I2C_B_SCL, + .sda = GPIO_I2C_B_SDA + }, + { + .name = "usb0", + .port = IT83XX_I2C_CH_C, + .kbps = 400, + .scl = GPIO_I2C_C_SCL, + .sda = GPIO_I2C_C_SDA + }, + { + .name = "usb1", + .port = IT83XX_I2C_CH_E, + .kbps = 400, + .scl = GPIO_I2C_E_SCL, + .sda = GPIO_I2C_E_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); @@ -243,3 +267,17 @@ void lid_angle_peripheral_enable(int enable) } } #endif + +/* Called on AP S5 -> S3 transition */ +static void board_chipset_startup(void) +{ + gpio_set_level(GPIO_EN_USB_C1_MUX_PWR, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); + +/* Called on AP S3 -> S5 transition */ +static void board_chipset_shutdown(void) +{ + gpio_set_level(GPIO_EN_USB_C1_MUX_PWR, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT); diff --git a/baseboard/goroh/baseboard.h b/baseboard/goroh/baseboard.h index 812d102d74..e4d854537b 100644 --- a/baseboard/goroh/baseboard.h +++ b/baseboard/goroh/baseboard.h @@ -30,6 +30,8 @@ #define CONFIG_CBI_EEPROM /* Chipset */ +#define CONFIG_CMD_AP_RESET_LOG +#define CONFIG_HOSTCMD_AP_RESET #define CONFIG_HOST_COMMAND_STATUS #define CONFIG_LOW_POWER_IDLE #define CONFIG_LOW_POWER_S0 @@ -104,7 +106,6 @@ #define CONFIG_USBC_VCONN #define CONFIG_USBC_VCONN_SWAP #define CONFIG_USB_DRP_ACC_TRYSRC -#define CONFIG_USB_MUX_IT5205 /* C0 */ #define CONFIG_USBC_RETIMER_PS8818 /* C1 */ #define CONFIG_USB_PD_ALT_MODE #define CONFIG_USB_PD_ALT_MODE_DFP diff --git a/baseboard/goroh/usbc_config.c b/baseboard/goroh/usbc_config.c index 4c02528285..5a49d2ee2d 100644 --- a/baseboard/goroh/usbc_config.c +++ b/baseboard/goroh/usbc_config.c @@ -45,34 +45,57 @@ struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); /* USB Mux */ - -__overridable int board_c1_ps8818_mux_init(const struct usb_mux *me) +static int goroh_usb_c0_init_mux(const struct usb_mux *me) { - /* enable C1 mux power */ - GPIO_SET_LEVEL(GPIO_EN_USB_C1_MUX_PWR, 1); - return 0; + return virtual_usb_mux_driver.init(me); } -__overridable int board_c1_ps8818_mux_set(const struct usb_mux *me, - mux_state_t mux_state) +static int goroh_usb_c0_set_mux(const struct usb_mux *me, mux_state_t mux_state, + bool *ack_required) { - if (mux_state == USB_PD_MUX_NONE) - GPIO_SET_LEVEL(GPIO_EN_USB_C1_MUX_PWR, 0); + /* + * b/188376636: Inverse C0 polarity. + * Goroh rev0 CC1/CC2 SBU1/SBU2 are reversed. + * We report inversed polarity to the SoC and SoC we reverse the SBU + * accordingly. + */ + mux_state = mux_state ^ USB_PD_MUX_POLARITY_INVERTED; - return 0; + return virtual_usb_mux_driver.set(me, mux_state, ack_required); + +} + +static int goroh_usb_c0_get_mux(const struct usb_mux *me, + mux_state_t *mux_state) +{ + return virtual_usb_mux_driver.get(me, mux_state); } +static struct usb_mux_driver goroh_usb_c0_mux_driver = { + .init = goroh_usb_c0_init_mux, + .set = goroh_usb_c0_set_mux, + .get = goroh_usb_c0_get_mux, +}; + +static const struct usb_mux goroh_usb_c1_ps8818_retimer = { + .usb_port = USBC_PORT_C1, + .i2c_port = I2C_PORT_USB_C1, + .i2c_addr_flags = PS8818_I2C_ADDR_FLAGS, + .driver = &ps8818_usb_retimer_driver, + .next_mux = NULL, +}; + const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - /* C0 no mux */ + [USBC_PORT_C0] = { + .usb_port = USBC_PORT_C0, + .driver = &goroh_usb_c0_mux_driver, + .hpd_update = &virtual_hpd_update, }, - { + [USBC_PORT_C1] = { .usb_port = USBC_PORT_C1, - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = PS8818_I2C_ADDR_FLAGS, - .driver = &ps8818_usb_retimer_driver, - .board_init = &board_c1_ps8818_mux_init, - .board_set = &board_c1_ps8818_mux_set, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, + .next_mux = &goroh_usb_c1_ps8818_retimer, }, }; BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); diff --git a/baseboard/grunt/baseboard.h b/baseboard/grunt/baseboard.h index c97ece285f..5a79c48c63 100644 --- a/baseboard/grunt/baseboard.h +++ b/baseboard/grunt/baseboard.h @@ -36,7 +36,7 @@ #define CONFIG_BACKLIGHT_LID_ACTIVE_LOW #define CONFIG_CMD_AP_RESET_LOG #define CONFIG_HIBERNATE_PSL -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_HOSTCMD_SKUID #define CONFIG_I2C #define CONFIG_I2C_BUS_MAY_BE_UNPOWERED diff --git a/baseboard/guybrush/baseboard.h b/baseboard/guybrush/baseboard.h index 6960524822..9f010c2bf3 100644 --- a/baseboard/guybrush/baseboard.h +++ b/baseboard/guybrush/baseboard.h @@ -80,7 +80,6 @@ #define CONFIG_STEINHART_HART_3V3_30K9_47K_4050B #define CONFIG_THROTTLE_AP #define CONFIG_TEMP_SENSOR_SB_TSI -#define CONFIG_TEMP_SENSOR_TMP112 #define CONFIG_THERMISTOR #define CONFIG_CPU_PROCHOT_ACTIVE_LOW #define GPIO_CPU_PROCHOT GPIO_PROCHOT_ODL @@ -92,7 +91,7 @@ /* Host communication */ #define CONFIG_CMD_CHARGEN -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_MKBP_EVENT #define CONFIG_MKBP_USE_GPIO_AND_HOST_EVENT #define GPIO_EC_INT_L GPIO_EC_SOC_INT_L diff --git a/baseboard/hatch/baseboard.c b/baseboard/hatch/baseboard.c index dd93e581cf..58ae6032eb 100644 --- a/baseboard/hatch/baseboard.c +++ b/baseboard/hatch/baseboard.c @@ -52,25 +52,85 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { #ifdef CONFIG_ACCEL_FIFO - {"sensor", I2C_PORT_SENSOR, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, #endif - {"ppc0", I2C_PORT_PPC0, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, + { + .name = "ppc0", + .port = I2C_PORT_PPC0, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, #if CONFIG_USB_PD_PORT_MAX_COUNT > 1 - {"tcpc1", I2C_PORT_TCPC1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, #endif - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, #ifdef BOARD_AKEMI - {"thermal", I2C_PORT_THERMAL, 400, GPIO_I2C4_SCL, GPIO_I2C4_SDA}, + { + .name = "thermal", + .port = I2C_PORT_THERMAL, + .kbps = 400, + .scl = GPIO_I2C4_SCL, + .sda = GPIO_I2C4_SDA + }, #endif #ifdef BOARD_JINLON - {"thermal", I2C_PORT_THERMAL, 100, GPIO_I2C4_SCL, GPIO_I2C4_SDA}, + { + .name = "thermal", + .port = I2C_PORT_THERMAL, + .kbps = 100, + .scl = GPIO_I2C4_SCL, + .sda = GPIO_I2C4_SDA + }, #endif #ifdef BOARD_MUSHU - {"f75303_temp", I2C_PORT_THERMAL, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"gpu_temp", I2C_PORT_GPU, 100, GPIO_I2C4_SCL, GPIO_I2C4_SDA}, + { + .name = "f75303_temp", + .port = I2C_PORT_THERMAL, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "gpu_temp", + .port = I2C_PORT_GPU, + .kbps = 100, + .scl = GPIO_I2C4_SCL, + .sda = GPIO_I2C4_SDA + }, #endif - {"power", I2C_PORT_POWER, 100, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, - {"eeprom", I2C_PORT_EEPROM, 100, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 100, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/baseboard/herobrine/baseboard.h b/baseboard/herobrine/baseboard.h index 108f7f8cf5..ae5b2a3d33 100644 --- a/baseboard/herobrine/baseboard.h +++ b/baseboard/herobrine/baseboard.h @@ -42,7 +42,7 @@ #undef CONFIG_PECI -#define CONFIG_HOSTCMD_SHI +#define CONFIG_HOST_INTERFACE_SHI #define CONFIG_HOST_COMMAND_STATUS #define CONFIG_HOSTCMD_SECTION_SORTED #define CONFIG_KEYBOARD_COL2_INVERTED diff --git a/baseboard/honeybuns/baseboard.c b/baseboard/honeybuns/baseboard.c index df56697fbf..e7df1b6ef4 100644 --- a/baseboard/honeybuns/baseboard.c +++ b/baseboard/honeybuns/baseboard.c @@ -89,8 +89,20 @@ __maybe_unused static void board_power_sequence(int enable) /******************************************************************************/ /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { - {"i2c1", I2C_PORT_I2C1, 400, GPIO_EC_I2C1_SCL, GPIO_EC_I2C1_SDA}, - {"i2c3", I2C_PORT_I2C3, 400, GPIO_EC_I2C3_SCL, GPIO_EC_I2C3_SDA}, + { + .name = "i2c1", + .port = I2C_PORT_I2C1, + .kbps = 400, + .scl = GPIO_EC_I2C1_SCL, + .sda = GPIO_EC_I2C1_SDA + }, + { + .name = "i2c3", + .port = I2C_PORT_I2C3, + .kbps = 400, + .scl = GPIO_EC_I2C3_SCL, + .sda = GPIO_EC_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/baseboard/honeybuns/usb_pd_policy.c b/baseboard/honeybuns/usb_pd_policy.c index ef2350a03d..faaef9083f 100644 --- a/baseboard/honeybuns/usb_pd_policy.c +++ b/baseboard/honeybuns/usb_pd_policy.c @@ -369,20 +369,16 @@ static void usb_tc_connect(void) { int port = TASK_ID_TO_PD_PORT(task_get_current()); + /* Clear data role swap attempt counter at each usbc attach */ + pd_dr_swap_attempt_count[port] = 0; + /* * The EC needs to indicate to the USB hub when the host port is * attached so that the USB-EP can be properly enumerated. GPIO_BPWR_DET * is used for this purpose. */ - if (port == USB_PD_PORT_HOST) { + if (port == USB_PD_PORT_HOST) gpio_set_level(GPIO_BPWR_DET, 1); -#ifdef GPIO_UFP_PLUG_DET - gpio_set_level(GPIO_UFP_PLUG_DET, 0); -#endif - } - - /* Clear data role swap attempt counter at each usbc attach */ - pd_dr_swap_attempt_count[port] = 0; } DECLARE_HOOK(HOOK_USB_PD_CONNECT, usb_tc_connect, HOOK_PRIO_DEFAULT); @@ -391,12 +387,8 @@ static void usb_tc_disconnect(void) int port = TASK_ID_TO_PD_PORT(task_get_current()); /* Only the host port disconnect is relevant */ - if (port == USB_PD_PORT_HOST) { + if (port == USB_PD_PORT_HOST) gpio_set_level(GPIO_BPWR_DET, 0); -#ifdef GPIO_UFP_PLUG_DET - gpio_set_level(GPIO_UFP_PLUG_DET, 1); -#endif - } } DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, usb_tc_disconnect, HOOK_PRIO_DEFAULT); diff --git a/baseboard/intelrvp/baseboard.h b/baseboard/intelrvp/baseboard.h index 853c1e30ff..6c9cef25fb 100644 --- a/baseboard/intelrvp/baseboard.h +++ b/baseboard/intelrvp/baseboard.h @@ -122,7 +122,7 @@ /* SoC / PCH */ #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define CONFIG_MKBP_EVENT diff --git a/baseboard/ite_evb/baseboard.h b/baseboard/ite_evb/baseboard.h index 7fe309491c..23b3f80fba 100644 --- a/baseboard/ite_evb/baseboard.h +++ b/baseboard/ite_evb/baseboard.h @@ -30,7 +30,7 @@ #define CONFIG_SPI_CONTROLLER #define CONFIG_SPI_FLASH_PORT 0 #define CONFIG_UART_HOST -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC /* Optional console commands */ #define CONFIG_CMD_FLASH diff --git a/baseboard/kalista/baseboard.c b/baseboard/kalista/baseboard.c index f6a6b23110..b06547106a 100644 --- a/baseboard/kalista/baseboard.c +++ b/baseboard/kalista/baseboard.c @@ -128,11 +128,41 @@ const struct mft_t mft_channels[] = { BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); const struct i2c_port_t i2c_ports[] = { - {"tcpc", I2C_PORT_TCPC0, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA}, - {"backlight", I2C_PORT_BACKLIGHT, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"pmic", I2C_PORT_PMIC, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"thermal", I2C_PORT_THERMAL, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "tcpc", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C0_0_SCL, + .sda = GPIO_I2C0_0_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_I2C0_1_SCL, + .sda = GPIO_I2C0_1_SDA + }, + { + .name = "backlight", + .port = I2C_PORT_BACKLIGHT, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "pmic", + .port = I2C_PORT_PMIC, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "thermal", + .port = I2C_PORT_THERMAL, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/baseboard/kalista/baseboard.h b/baseboard/kalista/baseboard.h index 94ced2f989..717d26b313 100644 --- a/baseboard/kalista/baseboard.h +++ b/baseboard/kalista/baseboard.h @@ -63,7 +63,7 @@ #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/baseboard/kukui/emmc_ite.c b/baseboard/kukui/emmc_ite.c index 8c3e63064c..b0e1f6b3de 100644 --- a/baseboard/kukui/emmc_ite.c +++ b/baseboard/kukui/emmc_ite.c @@ -101,7 +101,7 @@ static void emmc_send_data_over_spi(uint8_t *tx, int tx_size, int rst_tx) IT83XX_SPI_CPUWTFDB0 = *(uint32_t *)(tx + i); /* * After writing data to TX FIFO is finished, this bit will - * be to indicate the SPI slave controller. + * be to indicate the SPI peripheral controller. */ IT83XX_SPI_TXFCR = IT83XX_SPI_TXFS; /* End CPU access TX FIFO */ diff --git a/baseboard/octopus/baseboard.h b/baseboard/octopus/baseboard.h index f0ecab4d87..cb75bd0c1e 100644 --- a/baseboard/octopus/baseboard.h +++ b/baseboard/octopus/baseboard.h @@ -249,7 +249,7 @@ /* Common SoC / PCH defines */ #define CONFIG_CHIPSET_GEMINILAKE #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI /* TODO(b/74123961): Enable Virtual Wires after bringup */ #define CONFIG_POWER_COMMON #define CONFIG_POWER_S0IX diff --git a/baseboard/octopus/variant_ec_ite8320.c b/baseboard/octopus/variant_ec_ite8320.c index 459ea113b3..72c0021e89 100644 --- a/baseboard/octopus/variant_ec_ite8320.c +++ b/baseboard/octopus/variant_ec_ite8320.c @@ -28,10 +28,40 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /******************************************************************************/ /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { - {"power", IT83XX_I2C_CH_A, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"sensor", IT83XX_I2C_CH_B, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"usbc0", IT83XX_I2C_CH_C, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"usbc1", IT83XX_I2C_CH_E, 400, GPIO_I2C4_SCL, GPIO_I2C4_SDA}, - {"eeprom", IT83XX_I2C_CH_F, 100, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, + { + .name = "power", + .port = IT83XX_I2C_CH_A, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "sensor", + .port = IT83XX_I2C_CH_B, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "usbc0", + .port = IT83XX_I2C_CH_C, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "usbc1", + .port = IT83XX_I2C_CH_E, + .kbps = 400, + .scl = GPIO_I2C4_SCL, + .sda = GPIO_I2C4_SDA + }, + { + .name = "eeprom", + .port = IT83XX_I2C_CH_F, + .kbps = 100, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/baseboard/octopus/variant_ec_npcx796fb.c b/baseboard/octopus/variant_ec_npcx796fb.c index bccb360563..8c3cbd2460 100644 --- a/baseboard/octopus/variant_ec_npcx796fb.c +++ b/baseboard/octopus/variant_ec_npcx796fb.c @@ -31,13 +31,49 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /******************************************************************************/ /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { - {"battery", I2C_PORT_BATTERY, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"eeprom", I2C_PORT_EEPROM, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"charger", I2C_PORT_CHARGER, 100, GPIO_I2C4_SCL, GPIO_I2C4_SDA}, + { + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "charger", + .port = I2C_PORT_CHARGER, + .kbps = 100, + .scl = GPIO_I2C4_SCL, + .sda = GPIO_I2C4_SDA + }, #ifndef VARIANT_OCTOPUS_NO_SENSORS - {"sensor", I2C_PORT_SENSOR, 100, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 100, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, #endif }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/baseboard/trogdor/baseboard.h b/baseboard/trogdor/baseboard.h index 32d797e03a..d361aeaac8 100644 --- a/baseboard/trogdor/baseboard.h +++ b/baseboard/trogdor/baseboard.h @@ -41,7 +41,7 @@ #undef CONFIG_PECI -#define CONFIG_HOSTCMD_SHI +#define CONFIG_HOST_INTERFACE_SHI #define CONFIG_HOST_COMMAND_STATUS #define CONFIG_HOSTCMD_SECTION_SORTED #define CONFIG_KEYBOARD_COL2_INVERTED diff --git a/baseboard/volteer/baseboard.h b/baseboard/volteer/baseboard.h index 31764d9c12..fd90b20b9e 100644 --- a/baseboard/volteer/baseboard.h +++ b/baseboard/volteer/baseboard.h @@ -43,7 +43,7 @@ #define CONFIG_BOARD_RESET_AFTER_POWER_ON /* Host communication */ -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 /* Chipset config */ diff --git a/baseboard/zork/baseboard.h b/baseboard/zork/baseboard.h index d84ebbcef8..e97bcb4e45 100644 --- a/baseboard/zork/baseboard.h +++ b/baseboard/zork/baseboard.h @@ -38,7 +38,7 @@ #define CONFIG_CMD_AP_RESET_LOG #define CONFIG_CPU_PROCHOT_ACTIVE_LOW #define CONFIG_HIBERNATE_PSL -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_I2C #define CONFIG_I2C_CONTROLLER #define CONFIG_I2C_UPDATE_IF_CHANGED diff --git a/board/adlrvpp_ite/gpio.inc b/board/adlrvpp_ite/gpio.inc index 59af6cf877..00b4aefa3e 100644 --- a/board/adlrvpp_ite/gpio.inc +++ b/board/adlrvpp_ite/gpio.inc @@ -77,11 +77,11 @@ GPIO(USBC_TCPC_ALRT_P3, PIN(J, 3), GPIO_INPUT) GPIO(USBC_TCPC_PPC_ALRT_P3, PIN(E, 6), GPIO_INPUT) #endif -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(ESPI_RST_R, PIN(D, 2), GPIO_INPUT) #endif -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* enable 1.8v input of EC's espi_reset pin, and then this pin takes effect. */ GPIO_INT(ESPI_RST_R, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) /* eSPI_reset# */ #endif @@ -112,7 +112,7 @@ GPIO(SYS_PWROK_EC, PIN(D, 1), GPIO_OUT_LOW) GPIO(DSW_PWROK_EC, PIN(L, 6), GPIO_OUT_LOW) /* Host communication GPIOs */ -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(PLT_RST_L, PIN(H, 6), GPIO_INPUT | GPIO_PULL_UP) /* PCH_PLTRST_L */ #endif GPIO(PCH_WAKE_N, PIN(J, 0), GPIO_ODR_HIGH) diff --git a/board/adlrvpp_mchp1521/gpio.inc b/board/adlrvpp_mchp1521/gpio.inc index fd20e16568..5ec398903e 100644 --- a/board/adlrvpp_mchp1521/gpio.inc +++ b/board/adlrvpp_mchp1521/gpio.inc @@ -105,7 +105,7 @@ UNIMPLEMENTED(EN_PP5000) GPIO(SMC_WAKE_SCI_N, PIN(0114), GPIO_ODR_HIGH) /* EC_INT_L pin */ GPIO(EC_TRACE_DATA_0, PIN(0200), GPIO_ODR_HIGH) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(ESPI_RST_EC_R_N, PIN(061), GPIO_INPUT) #endif diff --git a/board/adlrvpp_mchp1727/gpio.inc b/board/adlrvpp_mchp1727/gpio.inc index 1eea86462c..42973648b4 100644 --- a/board/adlrvpp_mchp1727/gpio.inc +++ b/board/adlrvpp_mchp1727/gpio.inc @@ -83,7 +83,7 @@ GPIO(USBC_TCPC_PPC_ALRT_P3, PIN(0142), GPIO_INPUT) /* Host communication GPIOs */ GPIO(SMC_WAKE_SCI_N_MECC, PIN(051), GPIO_ODR_HIGH) GPIO(EC_PCH_MKBP_INT_ODL, PIN(0127), GPIO_ODR_HIGH) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(LPC_ESPI_RST_N, PIN(061), GPIO_INPUT) GPIO(PLT_RST_L, PIN(052), GPIO_INPUT) /* PCH_PLTRST_L */ #endif diff --git a/board/adlrvpp_npcx/gpio.inc b/board/adlrvpp_npcx/gpio.inc index a059b1c6b6..4a696e4c09 100644 --- a/board/adlrvpp_npcx/gpio.inc +++ b/board/adlrvpp_npcx/gpio.inc @@ -62,7 +62,7 @@ GPIO(USBC_TCPC_PPC_ALRT_P3, PIN(F, 3), GPIO_INPUT) /* Host communication GPIOs */ GPIO(SMC_WAKE_SCI_N_MECC, PIN(A, 4), GPIO_ODR_HIGH) GPIO(EC_PCH_MKBP_INT_ODL, PIN(F, 5), GPIO_ODR_HIGH) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(LPC_ESPI_RST_N, PIN(5, 4), GPIO_INPUT | GPIO_SEL_1P8V) GPIO(PLT_RST_L, PIN(A, 2), GPIO_INPUT | GPIO_SEL_1P8V) /* PCH_PLTRST_L */ #endif diff --git a/board/akemi/board.h b/board/akemi/board.h index 524607d8bb..af580a02b0 100644 --- a/board/akemi/board.h +++ b/board/akemi/board.h @@ -16,7 +16,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/aleena/board.c b/board/aleena/board.c index 0343a399c5..460c73fcdd 100644 --- a/board/aleena/board.c +++ b/board/aleena/board.c @@ -35,12 +35,48 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /* I2C port map. */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"thermal", I2C_PORT_THERMAL_AP, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"kblight", I2C_PORT_KBLIGHT, 100, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "thermal", + .port = I2C_PORT_THERMAL_AP, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "kblight", + .port = I2C_PORT_KBLIGHT, + .kbps = 100, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/ambassador/board.c b/board/ambassador/board.c index 698acf70bb..a5abbaa130 100644 --- a/board/ambassador/board.c +++ b/board/ambassador/board.c @@ -286,11 +286,41 @@ const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { /******************************************************************************/ /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { - {"ina", I2C_PORT_INA, 400, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"ppc0", I2C_PORT_PPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"power", I2C_PORT_POWER, 400, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "ina", + .port = I2C_PORT_INA, + .kbps = 400, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "ppc0", + .port = I2C_PORT_PPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 400, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/ambassador/board.h b/board/ambassador/board.h index 4ca9966873..14b9260509 100644 --- a/board/ambassador/board.h +++ b/board/ambassador/board.h @@ -38,7 +38,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO diff --git a/board/ampton/gpio.inc b/board/ampton/gpio.inc index 724d9a98d9..8b0a433842 100644 --- a/board/ampton/gpio.inc +++ b/board/ampton/gpio.inc @@ -32,7 +32,7 @@ GPIO_INT(RSMRST_L_PGOOD, PIN(F, 1), GPIO_INT_BOTH, power_signal_interrupt) /* PM GPIO_INT(ALL_SYS_PGOOD, PIN(F, 0), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_PWROK_OD */ GPIO_INT(AC_PRESENT, PIN(A, 7), GPIO_INT_BOTH, extpower_interrupt) /* ACOK_OD */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* enable 1.8v input of EC's espi_reset pin, and then this pin takes effect. */ GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) /* eSPI_reset# */ #endif diff --git a/board/anahera/ec.tasklist b/board/anahera/ec.tasklist index bfcf0a6416..187609f36e 100644 --- a/board/anahera/ec.tasklist +++ b/board/anahera/ec.tasklist @@ -18,6 +18,7 @@ TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ diff --git a/board/anahera/usbc_config.c b/board/anahera/usbc_config.c index 00b6589a46..aae3a4493b 100644 --- a/board/anahera/usbc_config.c +++ b/board/anahera/usbc_config.c @@ -208,12 +208,16 @@ static void board_tcpc_init(void) int i; /* Don't reset TCPCs after initial reset */ - if (!system_jumped_late()) { + if (!system_jumped_late()) board_reset_pd_mcu(); - for (i = 0; i < CONFIG_IO_EXPANDER_PORT_COUNT; ++i) - ioex_init(i); - } + /* + * These IO expander pins are implemented using the + * C0/C1 TCPCs, so they must be set up after the TCPCs has + * been taken out of reset. + */ + for (i = 0; i < CONFIG_IO_EXPANDER_PORT_COUNT; ++i) + ioex_init(i); /* Enable PPC interrupts. */ gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); diff --git a/board/arcada_ish/board.h b/board/arcada_ish/board.h index ce735bd268..0064086619 100644 --- a/board/arcada_ish/board.h +++ b/board/arcada_ish/board.h @@ -62,7 +62,7 @@ #define CONFIG_DMA_PAGING /* Host command over HECI */ -#define CONFIG_HOSTCMD_HECI +#define CONFIG_HOST_INTERFACE_HECI /* I2C ports */ #define I2C_PORT_SENSOR ISH_I2C0 diff --git a/board/atlas/board.c b/board/atlas/board.c index 4881ed6898..64d0789dd9 100644 --- a/board/atlas/board.c +++ b/board/atlas/board.c @@ -139,16 +139,41 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, - GPIO_EC_I2C0_POWER_SCL, GPIO_EC_I2C0_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, - GPIO_EC_I2C1_USB_C0_SCL, GPIO_EC_I2C1_USB_C0_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 1000, - GPIO_EC_I2C2_USB_C1_SCL, GPIO_EC_I2C2_USB_C1_SDA}, - {"sensor", I2C_PORT_SENSOR, 100, - GPIO_EC_I2C3_SENSOR_3V3_SCL, GPIO_EC_I2C3_SENSOR_3V3_SDA}, - {"battery", I2C_PORT_BATTERY, 100, - GPIO_EC_I2C4_BATTERY_SCL, GPIO_EC_I2C4_BATTERY_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C0_POWER_SCL, + .sda = GPIO_EC_I2C0_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C1_USB_C0_SCL, + .sda = GPIO_EC_I2C1_USB_C0_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 1000, + .scl = GPIO_EC_I2C2_USB_C1_SCL, + .sda = GPIO_EC_I2C2_USB_C1_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 100, + .scl = GPIO_EC_I2C3_SENSOR_3V3_SCL, + .sda = GPIO_EC_I2C3_SENSOR_3V3_SDA + }, + { + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_EC_I2C4_BATTERY_SCL, + .sda = GPIO_EC_I2C4_BATTERY_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/atlas/board.h b/board/atlas/board.h index df2a2ee2c2..6fdf77b0f0 100644 --- a/board/atlas/board.h +++ b/board/atlas/board.h @@ -54,7 +54,7 @@ #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_CPU_PROCHOT_ACTIVE_LOW -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 diff --git a/board/baklava/board.c b/board/baklava/board.c index 35a27d0c21..12365e0ff6 100644 --- a/board/baklava/board.c +++ b/board/baklava/board.c @@ -262,6 +262,31 @@ int dock_get_mf_preference(void) { return MF_ON; } + +static void board_usb_tc_connect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* + * The EC needs to indicate to the MST hub when the host port is + * attached. GPIO_UFP_PLUG_DET is used for this purpose. + */ + if (port == USB_PD_PORT_HOST) + gpio_set_level(GPIO_UFP_PLUG_DET, 0); +} +DECLARE_HOOK(HOOK_USB_PD_CONNECT, board_usb_tc_connect, HOOK_PRIO_DEFAULT); + +static void board_usb_tc_disconnect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* Only the host port disconnect is relevant */ + if (port == USB_PD_PORT_HOST) + gpio_set_level(GPIO_UFP_PLUG_DET, 1); +} +DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, board_usb_tc_disconnect, \ + HOOK_PRIO_DEFAULT); + #endif /* SECTION_IS_RW */ static void board_init(void) diff --git a/board/bds/board.c b/board/bds/board.c index 91da893a52..aedc570d51 100644 --- a/board/bds/board.c +++ b/board/bds/board.c @@ -33,7 +33,11 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"lightbar", 5, 400}, + { + .name = "lightbar", + .port = 5, + .kbps = 400 + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/bds/board.h b/board/bds/board.h index c859089f04..21dc2ad598 100644 --- a/board/bds/board.h +++ b/board/bds/board.h @@ -19,7 +19,7 @@ /* Modules we want to exclude */ #undef CONFIG_LID_SWITCH -#undef CONFIG_HOSTCMD_LPC +#undef CONFIG_HOST_INTERFACE_LPC #undef CONFIG_PECI #undef CONFIG_SWITCH diff --git a/board/boldar/ec.tasklist b/board/boldar/ec.tasklist index 292de51cdb..3e20d8ae39 100644 --- a/board/boldar/ec.tasklist +++ b/board/boldar/ec.tasklist @@ -16,6 +16,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/brask/gpio.inc b/board/brask/gpio.inc index 49403519c6..9282b915cd 100644 --- a/board/brask/gpio.inc +++ b/board/brask/gpio.inc @@ -128,7 +128,7 @@ GPIO(LED_RED_L, PIN(C, 4), GPIO_OUT_LOW) GPIO(USB_C0_C2_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW) GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) GPIO(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INPUT) -GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW) +GPIO(USB_C1_RT_RST_R_L, PIN(0, 2), GPIO_OUT_LOW) /* GPIO02_P2 to PU */ /* GPIO03_P2 to PU */ diff --git a/board/brask/usbc_config.c b/board/brask/usbc_config.c index 8363c71f88..a8c952df6f 100644 --- a/board/brask/usbc_config.c +++ b/board/brask/usbc_config.c @@ -111,7 +111,7 @@ struct kb800x_control_t kb800x_control[] = { [USBC_PORT_C0] = { }, [USBC_PORT_C1] = { - .retimer_rst_gpio = GPIO_USB_C1_RT_RST_R_ODL, + .retimer_rst_gpio = GPIO_USB_C1_RT_RST_R_L, }, [USBC_PORT_C2] = { }, @@ -249,7 +249,7 @@ void board_reset_pd_mcu(void) */ gpio_set_level(tcpc_rst, 0); - gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); + gpio_set_level(GPIO_USB_C1_RT_RST_R_L, 0); /* * delay for power-on to reset-off and min. assertion time @@ -258,7 +258,7 @@ void board_reset_pd_mcu(void) msleep(20); gpio_set_level(tcpc_rst, 1); - gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1); + gpio_set_level(GPIO_USB_C1_RT_RST_R_L, 1); /* wait for chips to come up */ diff --git a/board/brya/ec.tasklist b/board/brya/ec.tasklist index e4ad7a05a8..260f6561d9 100644 --- a/board/brya/ec.tasklist +++ b/board/brya/ec.tasklist @@ -20,6 +20,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ diff --git a/board/brya/generated-gpio.inc b/board/brya/generated-gpio.inc index 4daa60c5c9..f4772188a5 100644 --- a/board/brya/generated-gpio.inc +++ b/board/brya/generated-gpio.inc @@ -120,5 +120,6 @@ UNUSED(PIN(D, 6)) /* GPOD6/CR_SOUT3/SHDF_ESPI_L */ UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */ UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */ UNUSED(PIN(6, 6)) /* GPIO66 */ +UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */ /* Pre-configured PSL balls: J8 K6 */ diff --git a/board/brya/usbc_config.c b/board/brya/usbc_config.c index f653a93d1f..7f54cde5a5 100644 --- a/board/brya/usbc_config.c +++ b/board/brya/usbc_config.c @@ -354,29 +354,23 @@ void board_reset_pd_mcu(void) msleep(50); } -static void enable_ioex(int ioex) -{ - ioex_init(ioex); -} - static void board_tcpc_init(void) { /* Don't reset TCPCs after initial reset */ - if (!system_jumped_late()) { + if (!system_jumped_late()) board_reset_pd_mcu(); - /* - * These IO expander pins are implemented using the - * C0/C2 TCPC, so they must be set up after the TCPC has - * been taken out of reset. - */ - if (get_board_id() == 1) { - enable_ioex(IOEX_ID_1_C0_NCT38XX); - enable_ioex(IOEX_ID_1_C2_NCT38XX); - } else { - enable_ioex(IOEX_C0_NCT38XX); - enable_ioex(IOEX_C2_NCT38XX); - } + /* + * These IO expander pins are implemented using the + * C0/C2 TCPC, so they must be set up after the TCPC has + * been taken out of reset. + */ + if (get_board_id() == 1) { + ioex_init(IOEX_ID_1_C0_NCT38XX); + ioex_init(IOEX_ID_1_C2_NCT38XX); + } else { + ioex_init(IOEX_C0_NCT38XX); + ioex_init(IOEX_C2_NCT38XX); } /* Enable PPC interrupts. */ diff --git a/board/bugzzy/board.c b/board/bugzzy/board.c index 315f3a738b..16e19aa6a0 100644 --- a/board/bugzzy/board.c +++ b/board/bugzzy/board.c @@ -871,6 +871,11 @@ static void lcd_reset_change_deferred(void) if (signal != 0) return; + signal = gpio_get_level(GPIO_EN_PP1800_PANEL_S0); + + if (signal == 0) + return; + i2c_write8(I2C_PORT_LCD, I2C_ADDR_ISL98607_FLAGS, ISL98607_REG_ENABLE, ISL97607_VP_VN_VBST_DIS); diff --git a/board/burnet/board.c b/board/burnet/board.c index f98955a19d..fbb531fef1 100644 --- a/board/burnet/board.c +++ b/board/burnet/board.c @@ -69,13 +69,32 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 100, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct i2c_port_t i2c_bitbang_ports[] = { - {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv}, + { + .name = "battery", + .port = 2, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA, + .drv = &bitbang_drv + }, }; const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); diff --git a/board/burnet/board.h b/board/burnet/board.h index 3f92864907..f59d3d5972 100644 --- a/board/burnet/board.h +++ b/board/burnet/board.h @@ -89,7 +89,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/careena/board.c b/board/careena/board.c index ea2a886c03..e8171b1be0 100644 --- a/board/careena/board.c +++ b/board/careena/board.c @@ -30,11 +30,41 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /* I2C port map. */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"thermal", I2C_PORT_THERMAL_AP, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "thermal", + .port = I2C_PORT_THERMAL_AP, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/cerise/board.c b/board/cerise/board.c index 78ab8f6de8..4430d22533 100644 --- a/board/cerise/board.c +++ b/board/cerise/board.c @@ -67,13 +67,32 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 100, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct i2c_port_t i2c_bitbang_ports[] = { - {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv}, + { + .name = "battery", + .port = 2, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA, + .drv = &bitbang_drv + }, }; const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); diff --git a/board/cerise/board.h b/board/cerise/board.h index 5cf8c06f01..ce2b692ae8 100644 --- a/board/cerise/board.h +++ b/board/cerise/board.h @@ -86,7 +86,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/cherry/board.h b/board/cherry/board.h index 9db5042085..cafe99da3f 100644 --- a/board/cherry/board.h +++ b/board/cherry/board.h @@ -15,6 +15,7 @@ /* Optional features */ #define CONFIG_SYSTEM_UNLOCKED #define CONFIG_LTO +#define CONFIG_PRESERVE_LOGS /* * TODO: Remove this option once the VBAT no longer keeps high when diff --git a/board/chronicler/battery.c b/board/chronicler/battery.c index 82347953ba..aee0095765 100644 --- a/board/chronicler/battery.c +++ b/board/chronicler/battery.c @@ -32,41 +32,7 @@ * address, mask, and disconnect value need to be provided. */ const struct board_batt_params board_battery_info[] = { - /* Fujitsu CP813907-01 Battery Information */ - [BATTERY_FUJITSU_CP813907] = { - .fuel_gauge = { - .manuf_name = "Fujitsu", - .device_name = "CP813907-01", - .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x10, 0x10 }, - }, - .fet = { - .reg_addr = 0x00, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, - } - }, - .batt_info = { - .voltage_max = 13200, /* mV */ - .voltage_normal = 11550, /* mV */ - .voltage_min = 9000, /* mV */ - .precharge_current = 128, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 55, - .discharging_min_c = -20, - .discharging_max_c = 60, - }, - }, - /* NVT CP813907-01 Battery Information */ - /* - * NVT CP813907-01 Battery only use to support early - * stage battery, all battery for PVT will update - * manufacturer name to Fujitsu. See b/190685811. - */ [BATTERY_NVT_CP813907] = { .fuel_gauge = { .manuf_name = "NVT", @@ -97,4 +63,4 @@ const struct board_batt_params board_battery_info[] = { }; BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_FUJITSU_CP813907; +const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_NVT_CP813907; diff --git a/board/chronicler/board.h b/board/chronicler/board.h index 1a205d06ae..87d1c2a21f 100644 --- a/board/chronicler/board.h +++ b/board/chronicler/board.h @@ -137,7 +137,6 @@ #include "usbc_config.h" enum battery_type { - BATTERY_FUJITSU_CP813907, BATTERY_NVT_CP813907, BATTERY_TYPE_COUNT }; diff --git a/board/chronicler/ec.tasklist b/board/chronicler/ec.tasklist index c7a977f0ff..df7495f2a1 100644 --- a/board/chronicler/ec.tasklist +++ b/board/chronicler/ec.tasklist @@ -15,6 +15,7 @@ TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/coachz/board.c b/board/coachz/board.c index 81a749c1d1..01c4d85b95 100644 --- a/board/coachz/board.c +++ b/board/coachz/board.c @@ -191,18 +191,48 @@ static void ks_interrupt(enum gpio_signal s) /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 1000, GPIO_EC_I2C_USB_C1_PD_SCL, - GPIO_EC_I2C_USB_C1_PD_SDA}, - {"wlc", I2C_PORT_WLC, 400, GPIO_EC_I2C_WLC_SCL, - GPIO_EC_I2C_WLC_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "wlc", + .port = I2C_PORT_WLC, + .kbps = 400, + .scl = GPIO_EC_I2C_WLC_SCL, + .sda = GPIO_EC_I2C_WLC_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/coffeecake/board.c b/board/coffeecake/board.c index 2939a65125..b344a5f745 100644 --- a/board/coffeecake/board.c +++ b/board/coffeecake/board.c @@ -31,7 +31,13 @@ void vbus_event(enum gpio_signal signal); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"charger", I2C_PORT_SY21612, 400, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, + { + .name = "charger", + .port = I2C_PORT_SY21612, + .kbps = 400, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/coffeecake/board.h b/board/coffeecake/board.h index d655466a14..cabbb0bf4e 100644 --- a/board/coffeecake/board.h +++ b/board/coffeecake/board.h @@ -32,7 +32,7 @@ #define CONFIG_RWSIG #define CONFIG_RWSIG_TYPE_USBPD1 #define CONFIG_SHA256 -/* TODO(tbroch) Re-enable once STM spi master can be inhibited at boot so it +/* TODO(tbroch) Re-enable once STM spi controller can be inhibited at boot so it doesn't interfere with HDMI loading its f/w */ #undef CONFIG_SPI_FLASH #define CONFIG_SPI_CS_GPIO GPIO_PD_MCDP_SPI_CS_L diff --git a/board/collis/ec.tasklist b/board/collis/ec.tasklist index e76bd368eb..ca6d9fbf14 100644 --- a/board/collis/ec.tasklist +++ b/board/collis/ec.tasklist @@ -16,6 +16,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/copano/ec.tasklist b/board/copano/ec.tasklist index 292de51cdb..3e20d8ae39 100644 --- a/board/copano/ec.tasklist +++ b/board/copano/ec.tasklist @@ -16,6 +16,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/coral/board.c b/board/coral/board.c index a563071294..17fd01da0e 100644 --- a/board/coral/board.c +++ b/board/coral/board.c @@ -154,16 +154,41 @@ const struct pwm_t pwm_channels[] = { BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); const struct i2c_port_t i2c_ports[] = { - {"tcpc0", NPCX_I2C_PORT0_0, 400, - GPIO_EC_I2C_USB_C0_PD_SCL, GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", NPCX_I2C_PORT0_1, 400, - GPIO_EC_I2C_USB_C1_PD_SCL, GPIO_EC_I2C_USB_C1_PD_SDA}, - {"accelgyro", I2C_PORT_GYRO, 400, - GPIO_EC_I2C_GYRO_SCL, GPIO_EC_I2C_GYRO_SDA}, - {"sensors", NPCX_I2C_PORT2, 400, - GPIO_EC_I2C_SENSOR_SCL, GPIO_EC_I2C_SENSOR_SDA}, - {"batt", NPCX_I2C_PORT3, 100, - GPIO_EC_I2C_POWER_SCL, GPIO_EC_I2C_POWER_SDA}, + { + .name = "tcpc0", + .port = NPCX_I2C_PORT0_0, + .kbps = 400, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = NPCX_I2C_PORT0_1, + .kbps = 400, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "accelgyro", + .port = I2C_PORT_GYRO, + .kbps = 400, + .scl = GPIO_EC_I2C_GYRO_SCL, + .sda = GPIO_EC_I2C_GYRO_SDA + }, + { + .name = "sensors", + .port = NPCX_I2C_PORT2, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, + { + .name = "batt", + .port = NPCX_I2C_PORT3, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/coral/board.h b/board/coral/board.h index 0def402993..bac1a2c5f5 100644 --- a/board/coral/board.h +++ b/board/coral/board.h @@ -105,7 +105,7 @@ #define CONFIG_USBC_VCONN_SWAP /* SoC / PCH */ -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_CHIPSET_APOLLOLAKE #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_POWER_BUTTON diff --git a/board/coral/gpio.inc b/board/coral/gpio.inc index 0f3acc3375..da15615c86 100644 --- a/board/coral/gpio.inc +++ b/board/coral/gpio.inc @@ -62,7 +62,7 @@ GPIO(EC_I2C_POWER_SCL, PIN(D, 1), GPIO_INPUT) * Pin 57 (SER_IRQ) defaults to LPC mode, but we also have EC_PCH_KB_INT_ODL * (Pin B0) in case it doesn't work (Set CONFIG_KEYBOARD_IRQ_GPIO in this case). * - * See also the NO_LPC_ESPI bit in DEVALT1 and the CONFIG_HOSTCMD_SHI option. + * See also the NO_LPC_ESPI bit in DEVALT1 and the CONFIG_HOST_INTERFACE_SHI option. */ GPIO(PCH_SMI_L, PIN(A, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_SMI_ODL */ diff --git a/board/corori/board.c b/board/corori/board.c index 03f9641d9f..dc946fa4f9 100644 --- a/board/corori/board.c +++ b/board/corori/board.c @@ -447,30 +447,45 @@ DECLARE_HOOK(HOOK_AC_CHANGE, board_extpower, HOOK_PRIO_DEFAULT); const struct i2c_port_t i2c_ports[] = { { - "eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA }, { - "battery", I2C_PORT_BATTERY, 100, GPIO_EC_I2C_BATTERY_SCL, - GPIO_EC_I2C_BATTERY_SDA + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_EC_I2C_BATTERY_SCL, + .sda = GPIO_EC_I2C_BATTERY_SDA }, #ifdef HAS_TASK_MOTIONSENSE { - "sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA }, #endif { - "usbc0", I2C_PORT_USB_C0, 1000, GPIO_EC_I2C_USB_C0_SCL, - GPIO_EC_I2C_USB_C0_SDA + .name = "usbc0", + .port = I2C_PORT_USB_C0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_SCL, + .sda = GPIO_EC_I2C_USB_C0_SDA }, #if CONFIG_USB_PD_PORT_MAX_COUNT > 1 { - "sub_usbc1", I2C_PORT_SUB_USB_C1, 1000, - GPIO_EC_I2C_SUB_USB_C1_SCL, GPIO_EC_I2C_SUB_USB_C1_SDA + .name = "sub_usbc1", + .port = I2C_PORT_SUB_USB_C1, + .kbps = 1000, + .scl = GPIO_EC_I2C_SUB_USB_C1_SCL, + .sda = GPIO_EC_I2C_SUB_USB_C1_SDA }, #endif }; diff --git a/board/damu/board.c b/board/damu/board.c index ca3979949a..b5867377a5 100644 --- a/board/damu/board.c +++ b/board/damu/board.c @@ -67,13 +67,32 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 100, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct i2c_port_t i2c_bitbang_ports[] = { - {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv}, + { + .name = "battery", + .port = 2, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA, + .drv = &bitbang_drv + }, }; const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); diff --git a/board/damu/board.h b/board/damu/board.h index 6df8bb2a7a..f127df251f 100644 --- a/board/damu/board.h +++ b/board/damu/board.h @@ -85,7 +85,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/delbin/ec.tasklist b/board/delbin/ec.tasklist index 292de51cdb..3e20d8ae39 100644 --- a/board/delbin/ec.tasklist +++ b/board/delbin/ec.tasklist @@ -16,6 +16,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/dewatt/board.c b/board/dewatt/board.c index 60c2bba17a..c5b334c1ef 100644 --- a/board/dewatt/board.c +++ b/board/dewatt/board.c @@ -12,8 +12,7 @@ #include "common.h" #include "cros_board_info.h" #include "driver/accelgyro_bmi_common.h" -#include "driver/accelgyro_bmi160.h" -#include "driver/accelgyro_bmi323.h" +#include "driver/accelgyro_bmi260.h" #include "driver/accel_bma422.h" #include "driver/retimer/ps8811.h" #include "driver/retimer/ps8818.h" @@ -47,15 +46,15 @@ static struct accelgyro_saved_data_t g_bma422_data; /* Matrix to rotate accelrator into standard reference frame */ const mat33_fp_t base_standard_ref = { - { FLOAT_TO_FP(-1), 0, 0}, - { 0, FLOAT_TO_FP(1), 0}, - { 0, 0, FLOAT_TO_FP(-1)} + { 0, FLOAT_TO_FP(-1), 0}, + { FLOAT_TO_FP(1), 0, 0}, + { 0, 0, FLOAT_TO_FP(1)} }; const mat33_fp_t lid_standard_ref = { - { 0, FLOAT_TO_FP(-1), 0}, { FLOAT_TO_FP(-1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} + { 0, FLOAT_TO_FP(-1), 0}, + { 0, 0, FLOAT_TO_FP(1)} }; /* @@ -79,14 +78,14 @@ struct motion_sensor_t motion_sensors[] = { [BASE_ACCEL] = { .name = "Base Accel", .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI323, + .chip = MOTIONSENSE_CHIP_BMI260, .type = MOTIONSENSE_TYPE_ACCEL, .location = MOTIONSENSE_LOC_BASE, - .drv = &bmi3xx_drv, + .drv = &bmi260_drv, .mutex = &g_base_mutex, .drv_data = &g_bmi_data, .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI3_ADDR_I2C_PRIM, + .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, .rot_standard_ref = &base_standard_ref, .min_frequency = BMI_ACCEL_MIN_FREQ, .max_frequency = BMI_ACCEL_MAX_FREQ, @@ -94,12 +93,12 @@ struct motion_sensor_t motion_sensors[] = { .config = { /* EC use accel for angle detection */ [SENSOR_CONFIG_EC_S0] = { - .odr = 12500 | ROUND_UP_FLAG, + .odr = 10000 | ROUND_UP_FLAG, .ec_rate = 100 * MSEC, }, /* Sensor on in S3 */ [SENSOR_CONFIG_EC_S3] = { - .odr = 12500 | ROUND_UP_FLAG, + .odr = 10000 | ROUND_UP_FLAG, .ec_rate = 0, }, }, @@ -135,14 +134,14 @@ struct motion_sensor_t motion_sensors[] = { [BASE_GYRO] = { .name = "Base Gyro", .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI323, + .chip = MOTIONSENSE_CHIP_BMI260, .type = MOTIONSENSE_TYPE_GYRO, .location = MOTIONSENSE_LOC_BASE, - .drv = &bmi3xx_drv, + .drv = &bmi260_drv, .mutex = &g_base_mutex, .drv_data = &g_bmi_data, .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI3_ADDR_I2C_PRIM, + .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, .default_range = 1000, /* dps */ .rot_standard_ref = &base_standard_ref, .min_frequency = BMI_GYRO_MIN_FREQ, @@ -151,52 +150,6 @@ struct motion_sensor_t motion_sensors[] = { }; unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); -struct motion_sensor_t bmi160_base_accel = { - .name = "Base Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI160, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_BASE, - .drv = &bmi160_drv, - .mutex = &g_base_mutex, - .drv_data = &g_bmi_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, - .rot_standard_ref = &base_standard_ref, - .min_frequency = BMI_ACCEL_MIN_FREQ, - .max_frequency = BMI_ACCEL_MAX_FREQ, - .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 10000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - /* Sensor on in S3 */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - .ec_rate = 0, - }, - }, -}; - -struct motion_sensor_t bmi160_base_gyro = { - .name = "Base Gyro", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI160, - .type = MOTIONSENSE_TYPE_GYRO, - .location = MOTIONSENSE_LOC_BASE, - .drv = &bmi160_drv, - .mutex = &g_base_mutex, - .drv_data = &g_bmi_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, - .default_range = 1000, /* dps */ - .rot_standard_ref = &base_standard_ref, - .min_frequency = BMI_GYRO_MIN_FREQ, - .max_frequency = BMI_GYRO_MAX_FREQ, -}; - __override enum ec_error_list board_a1_ps8811_retimer_init(const struct usb_mux *me) { @@ -317,15 +270,8 @@ static int base_gyro_config; static void board_update_motion_sensor_config(void) { if (board_is_convertible()) { - if (get_board_version() == 1) { - motion_sensors[BASE_ACCEL] = bmi160_base_accel; - motion_sensors[BASE_GYRO] = bmi160_base_gyro; - base_gyro_config = BASE_GYRO_BMI160; - ccprints("BASE GYRO is BMI160"); - } else { - base_gyro_config = BASE_GYRO_BMI323; - ccprints("BASE GYRO is BMI323"); - } + base_gyro_config = BASE_GYRO_BMI260; + ccprints("BASE GYRO is BMI260"); motion_sensor_count = ARRAY_SIZE(motion_sensors); /* Enable Base Accel and Gyro interrupt */ @@ -341,12 +287,9 @@ static void board_update_motion_sensor_config(void) void motion_interrupt(enum gpio_signal signal) { switch (base_gyro_config) { - case BASE_GYRO_BMI160: - bmi160_interrupt(signal); - break; - case BASE_GYRO_BMI323: + case BASE_GYRO_BMI260: default: - bmi3xx_interrupt(signal); + bmi260_interrupt(signal); break; } } diff --git a/board/dewatt/board.h b/board/dewatt/board.h index 0743103a66..0aba330819 100644 --- a/board/dewatt/board.h +++ b/board/dewatt/board.h @@ -18,11 +18,8 @@ #define CONFIG_KEYBOARD_REFRESH_ROW3 /* Sensors */ -#define CONFIG_ACCELGYRO_BMI160 -#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) -#define CONFIG_ACCELGYRO_BMI3XX -#define CONFIG_ACCELGYRO_BMI3XX_INT_EVENT \ +#define CONFIG_ACCELGYRO_BMI260 +#define CONFIG_ACCELGYRO_BMI260_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) #define CONFIG_ACCEL_INTERRUPTS #define CONFIG_ACCEL_BMA4XX @@ -56,6 +53,9 @@ #define CONFIG_LED_COMMON #define CONFIG_LED_ONOFF_STATES +/* Thermal Config */ +#define CONFIG_TEMP_SENSOR_TMP112 + #ifndef __ASSEMBLER__ #include "gpio_signal.h" @@ -72,8 +72,7 @@ enum battery_type { enum base_accelgyro_type { BASE_GYRO_NONE = 0, - BASE_GYRO_BMI160 = 1, - BASE_GYRO_BMI323 = 2, + BASE_GYRO_BMI260 = 1, }; /* ADC Channels */ diff --git a/board/discovery-stm32f072/board.h b/board/discovery-stm32f072/board.h index d3f51f6691..78d1b25b47 100644 --- a/board/discovery-stm32f072/board.h +++ b/board/discovery-stm32f072/board.h @@ -51,7 +51,7 @@ /* Enable control of SPI over USB */ #define CONFIG_SPI_CONTROLLER -#define CONFIG_SPI_FLASH_PORT 0 /* First SPI master port */ +#define CONFIG_SPI_FLASH_PORT 0 /* First SPI controller port */ #define CONFIG_USB_SPI diff --git a/board/dooly/board.c b/board/dooly/board.c index 5f854ca647..064c44a857 100644 --- a/board/dooly/board.c +++ b/board/dooly/board.c @@ -532,13 +532,55 @@ const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { /******************************************************************************/ /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { - {"ina", I2C_PORT_INA, 400, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"ppc0", I2C_PORT_PPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"ppc1", I2C_PORT_PPC1, 400, GPIO_I2C2_SCL, GPIO_I2C1_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 400, GPIO_I2C4_SCL, GPIO_I2C3_SDA}, - {"power", I2C_PORT_POWER, 400, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "ina", + .port = I2C_PORT_INA, + .kbps = 400, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "ppc0", + .port = I2C_PORT_PPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "ppc1", + .port = I2C_PORT_PPC1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 400, + .scl = GPIO_I2C4_SCL, + .sda = GPIO_I2C4_SDA + }, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 400, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/dooly/board.h b/board/dooly/board.h index 4e0f4a5481..d5baf98410 100644 --- a/board/dooly/board.h +++ b/board/dooly/board.h @@ -73,7 +73,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO diff --git a/board/drallion_ish/board.h b/board/drallion_ish/board.h index dab93426a6..53da677775 100644 --- a/board/drallion_ish/board.h +++ b/board/drallion_ish/board.h @@ -60,7 +60,7 @@ #define CONFIG_DMA_PAGING /* Host command over HECI */ -#define CONFIG_HOSTCMD_HECI +#define CONFIG_HOST_INTERFACE_HECI /* I2C ports */ #define I2C_PORT_SENSOR ISH_I2C0 diff --git a/board/dratini/board.h b/board/dratini/board.h index 12074e3447..dfa234cb86 100644 --- a/board/dratini/board.h +++ b/board/dratini/board.h @@ -17,7 +17,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 2048 diff --git a/board/drobit/ec.tasklist b/board/drobit/ec.tasklist index 2c9a9e8e32..c1b0295d37 100644 --- a/board/drobit/ec.tasklist +++ b/board/drobit/ec.tasklist @@ -15,6 +15,7 @@ TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/eldrid/ec.tasklist b/board/eldrid/ec.tasklist index 292de51cdb..3e20d8ae39 100644 --- a/board/eldrid/ec.tasklist +++ b/board/eldrid/ec.tasklist @@ -16,6 +16,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/elemi/ec.tasklist b/board/elemi/ec.tasklist index 2c9a9e8e32..c1b0295d37 100644 --- a/board/elemi/ec.tasklist +++ b/board/elemi/ec.tasklist @@ -15,6 +15,7 @@ TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/elm/board.c b/board/elm/board.c index f4f1e3be2e..4e1a680659 100644 --- a/board/elm/board.c +++ b/board/elm/board.c @@ -108,9 +108,21 @@ int anx7688_passthru_allowed(const struct i2c_port_t *port, /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"battery", I2C_PORT_BATTERY, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"pd", I2C_PORT_PD_MCU, 1000, GPIO_I2C1_SCL, GPIO_I2C1_SDA, - anx7688_passthru_allowed} + { + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "pd", + .port = I2C_PORT_PD_MCU, + .kbps = 1000, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA, + .passthru_allowed = anx7688_passthru_allowed + } }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/elm/board.h b/board/elm/board.h index 319241642c..d5d28bcd1b 100644 --- a/board/elm/board.h +++ b/board/elm/board.h @@ -170,7 +170,7 @@ #define I2C_PORT_TCPC 1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* First SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* First SPI controller port (SPI2) */ /* Timer selection */ #define TIM_CLOCK32 2 diff --git a/board/endeavour/board.c b/board/endeavour/board.c index f208da3819..98d805f60a 100644 --- a/board/endeavour/board.c +++ b/board/endeavour/board.c @@ -85,10 +85,34 @@ const struct mft_t mft_channels[] = { BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); const struct i2c_port_t i2c_ports[] = { - {"pse", I2C_PORT_PSE, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA}, - {"pmic", I2C_PORT_PMIC, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"thermal", I2C_PORT_THERMAL, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "pse", + .port = I2C_PORT_PSE, + .kbps = 400, + .scl = GPIO_I2C0_0_SCL, + .sda = GPIO_I2C0_0_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_I2C0_1_SCL, + .sda = GPIO_I2C0_1_SDA + }, + { + .name = "pmic", + .port = I2C_PORT_PMIC, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "thermal", + .port = I2C_PORT_THERMAL, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/endeavour/board.h b/board/endeavour/board.h index fd1b3e5b9c..9b0107b2c4 100644 --- a/board/endeavour/board.h +++ b/board/endeavour/board.h @@ -58,7 +58,7 @@ #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/eve/board.c b/board/eve/board.c index f73118e8f2..a972cb4ebc 100644 --- a/board/eve/board.c +++ b/board/eve/board.c @@ -192,11 +192,41 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA}, - {"accelgyro", I2C_PORT_GYRO, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"sensors", I2C_PORT_LID_ACCEL, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"batt", I2C_PORT_BATTERY, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C0_0_SCL, + .sda = GPIO_I2C0_0_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 400, + .scl = GPIO_I2C0_1_SCL, + .sda = GPIO_I2C0_1_SDA + }, + { + .name = "accelgyro", + .port = I2C_PORT_GYRO, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "sensors", + .port = I2C_PORT_LID_ACCEL, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "batt", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/eve/board.h b/board/eve/board.h index 64e299bc54..5dcb9fc32f 100644 --- a/board/eve/board.h +++ b/board/eve/board.h @@ -72,7 +72,7 @@ #define CONFIG_CHIPSET_SKYLAKE #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/felwinter/board.h b/board/felwinter/board.h index 8f7c03dfb7..60997bc1ae 100644 --- a/board/felwinter/board.h +++ b/board/felwinter/board.h @@ -10,11 +10,6 @@ #include "compile_time_macros.h" -/* - * Early brya boards are not set up for vivaldi - */ -#undef CONFIG_KEYBOARD_VIVALDI - /* Baseboard features */ #include "baseboard.h" diff --git a/board/felwinter/ec.tasklist b/board/felwinter/ec.tasklist index 41d86da3d6..6d995d6b44 100644 --- a/board/felwinter/ec.tasklist +++ b/board/felwinter/ec.tasklist @@ -19,6 +19,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ diff --git a/board/felwinter/fans.c b/board/felwinter/fans.c index d966056331..9a29f0f1d1 100644 --- a/board/felwinter/fans.c +++ b/board/felwinter/fans.c @@ -30,16 +30,10 @@ static const struct fan_conf fan_conf_0 = { .enable_gpio = GPIO_EN_PP5000_FAN, }; -/* - * TOOD(b/180681346): need to update for real fan - * - * Prototype fan spins at about 7200 RPM at 100% PWM. - * Set minimum at around 30% PWM. - */ static const struct fan_rpm fan_rpm_0 = { - .rpm_min = 2200, - .rpm_start = 2200, - .rpm_max = 7200, + .rpm_min = 2000, + .rpm_start = 2000, + .rpm_max = 5200, }; const struct fan_t fans[FAN_CH_COUNT] = { diff --git a/board/felwinter/gpio.inc b/board/felwinter/gpio.inc index ba7116847a..7f65c3fd62 100644 --- a/board/felwinter/gpio.inc +++ b/board/felwinter/gpio.inc @@ -129,6 +129,7 @@ UNUSED(PIN(D, 4)) /* GPIOD4 */ UNUSED(PIN(C, 6)) /* GPIOC6 */ UNUSED(PIN(6, 2)) /* GPIO62 */ UNUSED(PIN(B, 1)) /* GPIOB1 */ +UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */ /* Pre-configured PSL balls: J8 K6 */ @@ -143,7 +144,9 @@ GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW) /* GPIO02_P2 to PU */ /* GPIO03_P2 to PU */ +IOEX(USB_C1_RT_RST_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 2), GPIO_ODR_LOW) IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 4), GPIO_ODR_HIGH) +IOEX(USB_C1_FRS_EN, EXPIN(IOEX_C1_NCT38XX, 0, 6), GPIO_LOW) IOEX(USB_C2_RT_RST_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 2), GPIO_ODR_LOW) IOEX(USB_C2_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 4), GPIO_ODR_HIGH) diff --git a/board/felwinter/pwm.c b/board/felwinter/pwm.c index 985305449b..1312135a2c 100644 --- a/board/felwinter/pwm.c +++ b/board/felwinter/pwm.c @@ -24,8 +24,8 @@ const struct pwm_t pwm_channels[] = { }, [PWM_CH_FAN] = { .channel = 5, - .flags = PWM_CONFIG_OPEN_DRAIN, - .freq = 25000 + .flags = PWM_CONFIG_OPEN_DRAIN | PWM_CONFIG_DSLEEP, + .freq = 1000 }, }; BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); diff --git a/board/felwinter/usbc_config.c b/board/felwinter/usbc_config.c index bb2e6c2218..b8657c4785 100644 --- a/board/felwinter/usbc_config.c +++ b/board/felwinter/usbc_config.c @@ -164,7 +164,7 @@ const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { }, [USBC_PORT_C1] = { .i2c_port = I2C_PORT_USB_C1_BC12, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS, }, }; BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); @@ -210,7 +210,7 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) int rst_signal; if (me->usb_port == USBC_PORT_C1) - rst_signal = GPIO_USB_C1_RT_RST_R_ODL; + rst_signal = IOEX_USB_C1_RT_RST_ODL; else if (me->usb_port == USBC_PORT_C2) rst_signal = IOEX_USB_C2_RT_RST_ODL; else diff --git a/board/fennel/board.c b/board/fennel/board.c index 0706813592..60024e7a9f 100644 --- a/board/fennel/board.c +++ b/board/fennel/board.c @@ -68,13 +68,32 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct i2c_port_t i2c_bitbang_ports[] = { - {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv}, + { + .name = "battery", + .port = 2, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA, + .drv = &bitbang_drv + }, }; const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); diff --git a/board/fennel/board.h b/board/fennel/board.h index 697480770c..dc73b2e132 100644 --- a/board/fennel/board.h +++ b/board/fennel/board.h @@ -91,7 +91,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/fizz/board.c b/board/fizz/board.c index 5b830b9150..975401d5a1 100644 --- a/board/fizz/board.c +++ b/board/fizz/board.c @@ -164,11 +164,41 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"tcpc", NPCX_I2C_PORT0_0, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA}, - {"eeprom", NPCX_I2C_PORT0_1, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA}, - {"charger", NPCX_I2C_PORT1, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"pmic", NPCX_I2C_PORT2, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"thermal", NPCX_I2C_PORT3, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "tcpc", + .port = NPCX_I2C_PORT0_0, + .kbps = 400, + .scl = GPIO_I2C0_0_SCL, + .sda = GPIO_I2C0_0_SDA + }, + { + .name = "eeprom", + .port = NPCX_I2C_PORT0_1, + .kbps = 400, + .scl = GPIO_I2C0_1_SCL, + .sda = GPIO_I2C0_1_SDA + }, + { + .name = "charger", + .port = NPCX_I2C_PORT1, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "pmic", + .port = NPCX_I2C_PORT2, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "thermal", + .port = NPCX_I2C_PORT3, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/fizz/board.h b/board/fizz/board.h index 8e8cbcd823..ad1ca85cac 100644 --- a/board/fizz/board.h +++ b/board/fizz/board.h @@ -70,7 +70,7 @@ #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/fusb307bgevb/board.c b/board/fusb307bgevb/board.c index 41b12d5a82..f3f4da1a74 100644 --- a/board/fusb307bgevb/board.c +++ b/board/fusb307bgevb/board.c @@ -241,7 +241,13 @@ BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT); * I2C interface. */ const struct i2c_port_t i2c_ports[] = { - {"tcpc", I2C_PORT_TCPC, 400 /* kHz */, GPIO_I2C2_SCL, GPIO_I2C2_SDA} + { + .name = "tcpc", + .port = I2C_PORT_TCPC, + .kbps = 400 /* kHz */, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + } }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/genesis/board.c b/board/genesis/board.c index a846478ecb..5305c8d630 100644 --- a/board/genesis/board.c +++ b/board/genesis/board.c @@ -133,12 +133,48 @@ const struct pwm_t pwm_channels[] = { /******************************************************************************/ /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { - {"ina", I2C_PORT_INA, 400, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"ppc0", I2C_PORT_PPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"pse", I2C_PORT_PSE, 400, GPIO_I2C4_SCL, GPIO_I2C4_SDA}, - {"power", I2C_PORT_POWER, 400, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "ina", + .port = I2C_PORT_INA, + .kbps = 400, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "ppc0", + .port = I2C_PORT_PPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "pse", + .port = I2C_PORT_PSE, + .kbps = 400, + .scl = GPIO_I2C4_SCL, + .sda = GPIO_I2C4_SDA + }, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 400, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/genesis/board.h b/board/genesis/board.h index 7c32579440..8a31b9500b 100644 --- a/board/genesis/board.h +++ b/board/genesis/board.h @@ -38,7 +38,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO diff --git a/board/gimble/board.h b/board/gimble/board.h index 96c8e6326d..03c0782bea 100644 --- a/board/gimble/board.h +++ b/board/gimble/board.h @@ -184,6 +184,7 @@ #define CONFIG_CHARGE_RAMP_SW #define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 #define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_BQ25710_PSYS_SENSING /* PROCHOT defines */ #define BATT_MAX_CONTINUE_DISCHARGE_WATT 45 diff --git a/board/gimble/ec.tasklist b/board/gimble/ec.tasklist index 23753ee899..9207f8729d 100644 --- a/board/gimble/ec.tasklist +++ b/board/gimble/ec.tasklist @@ -19,6 +19,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ diff --git a/board/gimble/gpio.inc b/board/gimble/gpio.inc index faec39af08..dfd3b472a6 100644 --- a/board/gimble/gpio.inc +++ b/board/gimble/gpio.inc @@ -125,6 +125,7 @@ UNUSED(PIN(A, 0)) /* F_CS0_L/GPIOA0 */ UNUSED(PIN(9, 6)) /* F_DIO1/GPIO96 */ UNUSED(PIN(7, 0)) /* GPIO70/PS2_DAT0 */ UNUSED(PIN(8, 1)) /* PECI DATA/GPIO81 */ +UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */ /* Pre-configured PSL balls: J8 K6 */ diff --git a/board/gingerbread/board.c b/board/gingerbread/board.c index 6a2ae0c683..4c4911dbf2 100644 --- a/board/gingerbread/board.c +++ b/board/gingerbread/board.c @@ -152,6 +152,20 @@ struct ppc_config_t ppc_chips[] = { #endif #ifdef SECTION_IS_RW + +/* TUSB1064 set mux board tuning for DP Rx path */ +static int board_tusb1064_dp_rx_eq_set(const struct usb_mux *me, + mux_state_t mux_state) +{ + int rv = EC_SUCCESS; + + /* DP specific config */ + if (mux_state & USB_PD_MUX_DP_ENABLED) + rv = tusb1064_set_dp_rx_eq(me, TUSB1064_DP_EQ_RX_8_9_DB); + + return rv; +} + /* * TCPCs: 2 USBC/PD ports * port 0 -> host port -> STM32G4 UCPD @@ -178,6 +192,7 @@ const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { .i2c_port = I2C_PORT_I2C1, .i2c_addr_flags = TUSB1064_I2C_ADDR0_FLAGS, .driver = &tusb1064_usb_mux_driver, + .board_set = &board_tusb1064_dp_rx_eq_set, }, [USB_PD_PORT_DP] = { .usb_port = USB_PD_PORT_DP, @@ -311,6 +326,34 @@ int dock_get_mf_preference(void) return mf; } +static void board_usb_tc_connect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* + * The EC needs to keep the USB hubs in reset until the host port is + * attached so that the USB-EP can be properly enumerated. + */ + if (port == USB_PD_PORT_HOST) { + gpio_set_level(GPIO_EC_HUB1_RESET_L, 1); + gpio_set_level(GPIO_EC_HUB2_RESET_L, 1); + } +} +DECLARE_HOOK(HOOK_USB_PD_CONNECT, board_usb_tc_connect, HOOK_PRIO_DEFAULT); + +static void board_usb_tc_disconnect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* Only the host port disconnect is relevant */ + if (port == USB_PD_PORT_HOST) { + gpio_set_level(GPIO_EC_HUB1_RESET_L, 0); + gpio_set_level(GPIO_EC_HUB2_RESET_L, 0); + } +} +DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, board_usb_tc_disconnect, \ + HOOK_PRIO_DEFAULT); + #endif /* SECTION_IS_RW */ static void board_init(void) diff --git a/board/gingerbread/gpio.inc b/board/gingerbread/gpio.inc index 5b7b3a9619..6226ff747e 100644 --- a/board/gingerbread/gpio.inc +++ b/board/gingerbread/gpio.inc @@ -57,8 +57,8 @@ GPIO(DEBUG_GPIO1, PIN(B, 13), GPIO_OUT_LOW) * USB CDP enables. */ GPIO(USB3_A1_CDP_EN, PIN(E, 7), GPIO_OUT_LOW) GPIO(USB3_A2_CDP_EN, PIN(E, 8), GPIO_OUT_LOW) -GPIO(USB3_P3_CDP_EN, PIN(D, 1), GPIO_OUT_LOW) -GPIO(USB3_P4_CDP_EN, PIN(E, 12), GPIO_OUT_LOW) +GPIO(USB3_P3_CDP_EN, PIN(D, 1), GPIO_OUT_HIGH) +GPIO(USB3_P4_CDP_EN, PIN(E, 12), GPIO_OUT_HIGH) /* Write protect */ GPIO(EC_FLASH_WP_ODL, PIN(A, 3), GPIO_ODR_HIGH) diff --git a/board/goroh/gpio.inc b/board/goroh/gpio.inc index fe454d035e..9d10ea37bd 100644 --- a/board/goroh/gpio.inc +++ b/board/goroh/gpio.inc @@ -81,8 +81,8 @@ GPIO(EN_PP1800_VDDIO_PMC_X, PIN(B, 7), GPIO_OUT_LOW) GPIO(EC_INT_L, PIN(E, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_AP_INT_ODL */ /* USB and USBC Signals */ -GPIO(USB_C0_HPD_3V3, PIN(J, 0), GPIO_OUT_LOW) -GPIO(USB_C1_HPD_3V3, PIN(J, 1), GPIO_OUT_LOW) +GPIO(USB_C1_HPD_3V3, PIN(J, 0), GPIO_OUT_LOW) +GPIO(USB_C0_HPD_3V3, PIN(J, 1), GPIO_OUT_LOW) GPIO(USB_C1_HPD_IN, PIN(J, 2), GPIO_OUT_LOW) GPIO(EN_USB_C1_MUX_PWR, PIN(F, 0), GPIO_OUT_LOW) GPIO(USB_C0_SBU1_DC, PIN(H, 4), GPIO_OUT_LOW) diff --git a/board/grunt/board.c b/board/grunt/board.c index 45aa4f4421..0efa8b9696 100644 --- a/board/grunt/board.c +++ b/board/grunt/board.c @@ -29,12 +29,48 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /* I2C port map. */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"thermal", I2C_PORT_THERMAL_AP, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"kblight", I2C_PORT_KBLIGHT, 100, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "thermal", + .port = I2C_PORT_THERMAL_AP, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "kblight", + .port = I2C_PORT_KBLIGHT, + .kbps = 100, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/guybrush/board.h b/board/guybrush/board.h index f3900adc43..dc6a7e882a 100644 --- a/board/guybrush/board.h +++ b/board/guybrush/board.h @@ -55,6 +55,9 @@ #define CONFIG_LED_COMMON #define CONFIG_LED_ONOFF_STATES +/* Thermal Config */ +#define CONFIG_TEMP_SENSOR_TMP112 + #ifndef __ASSEMBLER__ #include "gpio_signal.h" diff --git a/board/hammer/board.c b/board/hammer/board.c index b68498acfb..b9667a9916 100644 --- a/board/hammer/board.c +++ b/board/hammer/board.c @@ -90,11 +90,21 @@ void usb_spi_board_disable(struct usb_spi_config const *config) {} #ifdef CONFIG_I2C /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 400, - GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA}, + { + .name = "master", + .port = I2C_PORT_MASTER, + .kbps = 400, + .scl = GPIO_MASTER_I2C_SCL, + .sda = GPIO_MASTER_I2C_SDA + }, #ifdef BOARD_WAND - {"charger", I2C_PORT_CHARGER, 100, - GPIO_CHARGER_I2C_SCL, GPIO_CHARGER_I2C_SDA}, + { + .name = "charger", + .port = I2C_PORT_CHARGER, + .kbps = 100, + .scl = GPIO_CHARGER_I2C_SCL, + .sda = GPIO_CHARGER_I2C_SDA + }, #endif }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/hammer/variants.h b/board/hammer/variants.h index 2a8c831ef5..355e725a8e 100644 --- a/board/hammer/variants.h +++ b/board/hammer/variants.h @@ -56,12 +56,11 @@ #define CONFIG_USB_HID_KEYBOARD_VIVALDI #define CONFIG_USB_HID_KB_NUM_TOP_ROW_KEYS 10 #define HAS_I2C_TOUCHPAD -/* TODO: update correct parameters */ -#define CONFIG_USB_HID_TOUCHPAD_LOGICAL_MAX_X 3282 -#define CONFIG_USB_HID_TOUCHPAD_LOGICAL_MAX_Y 1793 +#define CONFIG_USB_HID_TOUCHPAD_LOGICAL_MAX_X 2644 +#define CONFIG_USB_HID_TOUCHPAD_LOGICAL_MAX_Y 1440 #define CONFIG_USB_HID_TOUCHPAD_LOGICAL_MAX_PRESSURE 511 -#define CONFIG_USB_HID_TOUCHPAD_PHYSICAL_MAX_X 1042 /* tenth of mm */ -#define CONFIG_USB_HID_TOUCHPAD_PHYSICAL_MAX_Y 569 /* tenth of mm */ +#define CONFIG_USB_HID_TOUCHPAD_PHYSICAL_MAX_X 839 /* tenth of mm */ +#define CONFIG_USB_HID_TOUCHPAD_PHYSICAL_MAX_Y 457 /* tenth of mm */ #define CONFIG_TOUCHPAD_VIRTUAL_SIZE (64*1024) #elif defined(BOARD_DON) #define HAS_I2C_TOUCHPAD @@ -75,12 +74,11 @@ #define CONFIG_USB_HID_KEYBOARD_VIVALDI #define CONFIG_USB_HID_KB_NUM_TOP_ROW_KEYS 10 #define HAS_I2C_TOUCHPAD -/* TODO: update correct parameters */ -#define CONFIG_USB_HID_TOUCHPAD_LOGICAL_MAX_X 3282 -#define CONFIG_USB_HID_TOUCHPAD_LOGICAL_MAX_Y 1793 +#define CONFIG_USB_HID_TOUCHPAD_LOGICAL_MAX_X 2644 +#define CONFIG_USB_HID_TOUCHPAD_LOGICAL_MAX_Y 1440 #define CONFIG_USB_HID_TOUCHPAD_LOGICAL_MAX_PRESSURE 511 -#define CONFIG_USB_HID_TOUCHPAD_PHYSICAL_MAX_X 1042 /* tenth of mm */ -#define CONFIG_USB_HID_TOUCHPAD_PHYSICAL_MAX_Y 569 /* tenth of mm */ +#define CONFIG_USB_HID_TOUCHPAD_PHYSICAL_MAX_X 839 /* tenth of mm */ +#define CONFIG_USB_HID_TOUCHPAD_PHYSICAL_MAX_Y 457 /* tenth of mm */ #define CONFIG_TOUCHPAD_VIRTUAL_SIZE (64*1024) #elif defined(BOARD_MAGNEMITE) #define HAS_NO_TOUCHPAD diff --git a/board/hatch/board.h b/board/hatch/board.h index 487c8c25eb..3867ffd819 100644 --- a/board/hatch/board.h +++ b/board/hatch/board.h @@ -16,7 +16,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/hatch_fp/board_rw.c b/board/hatch_fp/board_rw.c index 4c83c8723c..00a6b89b19 100644 --- a/board/hatch_fp/board_rw.c +++ b/board/hatch_fp/board_rw.c @@ -35,7 +35,9 @@ static void configure_fp_sensor_spi(void) /* Configure SPI GPIOs */ gpio_config_module(MODULE_SPI_CONTROLLER, 1); - /* Set all SPI master signal pins to very high speed: B12/13/14/15 */ + /* Set all SPI controller signal pins to very high speed: + * B12/13/14/15 + */ STM32_GPIO_OSPEEDR(GPIO_B) |= 0xff000000; /* Enable clocks to SPI2 module (master) */ diff --git a/board/helios/board.h b/board/helios/board.h index dcda6e01fe..a29dda1adf 100644 --- a/board/helios/board.h +++ b/board/helios/board.h @@ -16,7 +16,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/herobrine_npcx9/board.c b/board/herobrine_npcx9/board.c index f63f5c7991..fea8bf3a88 100644 --- a/board/herobrine_npcx9/board.c +++ b/board/herobrine_npcx9/board.c @@ -64,18 +64,48 @@ __override struct keyboard_scan_config keyscan_config = { /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 1000, GPIO_EC_I2C_USB_C1_PD_SCL, - GPIO_EC_I2C_USB_C1_PD_SDA}, - {"rtc", I2C_PORT_RTC, 400, GPIO_EC_I2C_RTC_SCL, - GPIO_EC_I2C_RTC_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "rtc", + .port = I2C_PORT_RTC, + .kbps = 400, + .scl = GPIO_EC_I2C_RTC_SCL, + .sda = GPIO_EC_I2C_RTC_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/hoho/board.h b/board/hoho/board.h index 8e6ec34b3d..635abfbeda 100644 --- a/board/hoho/board.h +++ b/board/hoho/board.h @@ -24,7 +24,7 @@ #define CONFIG_RWSIG #define CONFIG_RWSIG_TYPE_USBPD1 #define CONFIG_SHA256 -/* TODO(tbroch) Re-enable once STM spi master can be inhibited at boot so it +/* TODO(tbroch) Re-enable once STM spi controller can be inhibited at boot so it doesn't interfere with HDMI loading its f/w */ #undef CONFIG_SPI_FLASH #define CONFIG_SPI_CS_GPIO GPIO_PD_MCDP_SPI_CS_L diff --git a/board/homestar/board.c b/board/homestar/board.c index 47ac34af2c..6fb748e168 100644 --- a/board/homestar/board.c +++ b/board/homestar/board.c @@ -119,16 +119,41 @@ static void switchcap_interrupt(enum gpio_signal signal) /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 1000, GPIO_EC_I2C_USB_C1_PD_SCL, - GPIO_EC_I2C_USB_C1_PD_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/host/board.c b/board/host/board.c index 191fd832e1..b681ca98fb 100644 --- a/board/host/board.c +++ b/board/host/board.c @@ -62,15 +62,45 @@ test_mockable void fps_event(enum gpio_signal signal) /* I2C ports */ const struct i2c_port_t i2c_ports[] = { #ifdef I2C_PORT_BATTERY - {"battery", I2C_PORT_BATTERY, 100, 0, 0}, + { + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = 0, + .sda = 0 + }, #elif defined I2C_PORT_LIGHTBAR - {"lightbar", I2C_PORT_LIGHTBAR, 100, 0, 0}, + { + .name = "lightbar", + .port = I2C_PORT_LIGHTBAR, + .kbps = 100, + .scl = 0, + .sda = 0 + }, #elif defined I2C_PORT_HOST_TCPC - {"tcpc", I2C_PORT_HOST_TCPC, 100, 0, 0}, + { + .name = "tcpc", + .port = I2C_PORT_HOST_TCPC, + .kbps = 100, + .scl = 0, + .sda = 0 + }, #elif defined I2C_PORT_EEPROM - {"eeprom", I2C_PORT_EEPROM, 100, 0, 0}, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 100, + .scl = 0, + .sda = 0 + }, #elif defined I2C_PORT_WLC - {"wlc", I2C_PORT_WLC, 100, 0, 0}, + { + .name = "wlc", + .port = I2C_PORT_WLC, + .kbps = 100, + .scl = 0, + .sda = 0 + }, #endif }; diff --git a/board/icarus/board.c b/board/icarus/board.c index bffad091fa..b1f9c3ef5d 100644 --- a/board/icarus/board.c +++ b/board/icarus/board.c @@ -87,9 +87,27 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", IT83XX_I2C_CH_C, 400, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, - {"other", IT83XX_I2C_CH_B, 100, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, - {"battery", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, + { + .name = "typec", + .port = IT83XX_I2C_CH_C, + .kbps = 400, + .scl = GPIO_I2C_C_SCL, + .sda = GPIO_I2C_C_SDA + }, + { + .name = "other", + .port = IT83XX_I2C_CH_B, + .kbps = 100, + .scl = GPIO_I2C_B_SCL, + .sda = GPIO_I2C_B_SDA + }, + { + .name = "battery", + .port = IT83XX_I2C_CH_A, + .kbps = 100, + .scl = GPIO_I2C_A_SCL, + .sda = GPIO_I2C_A_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/it83xx_evb/gpio.inc b/board/it83xx_evb/gpio.inc index 52df89e5cb..505f91ad64 100644 --- a/board/it83xx_evb/gpio.inc +++ b/board/it83xx_evb/gpio.inc @@ -9,7 +9,7 @@ * Note: Those with interrupt handlers must be declared first. */ GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(PCH_PLTRST_L, PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) #endif GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_PULL_DOWN, lid_interrupt) diff --git a/board/it8xxx2_evb/gpio.inc b/board/it8xxx2_evb/gpio.inc index 8a7f593ab6..e5e7d5e942 100644 --- a/board/it8xxx2_evb/gpio.inc +++ b/board/it8xxx2_evb/gpio.inc @@ -9,7 +9,7 @@ * Note: Those with interrupt handlers must be declared first. */ GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(PCH_PLTRST_L, PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) #endif GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt) diff --git a/board/it8xxx2_pdevb/board.h b/board/it8xxx2_pdevb/board.h index 8646c6c7b3..d23898f3aa 100644 --- a/board/it8xxx2_pdevb/board.h +++ b/board/it8xxx2_pdevb/board.h @@ -31,7 +31,7 @@ #undef CONFIG_SPI_CONTROLLER #undef CONFIG_SPI_FLASH_PORT #undef CONFIG_UART_HOST -#undef CONFIG_HOSTCMD_LPC +#undef CONFIG_HOST_INTERFACE_LPC #undef CONFIG_CMD_MMAPINFO #undef CONFIG_SWITCH diff --git a/board/jacuzzi/board.c b/board/jacuzzi/board.c index ec6515544d..f31f712386 100644 --- a/board/jacuzzi/board.c +++ b/board/jacuzzi/board.c @@ -67,17 +67,42 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, #ifdef BOARD_JACUZZI - {"other", 1, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "other", + .port = 1, + .kbps = 100, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, #else /* Juniper */ - {"other", 1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "other", + .port = 1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, #endif }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct i2c_port_t i2c_bitbang_ports[] = { - {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv}, + { + .name = "battery", + .port = 2, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA, + .drv = &bitbang_drv + }, }; const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); diff --git a/board/jacuzzi/board.h b/board/jacuzzi/board.h index ef8a02a3dc..6270b308f6 100644 --- a/board/jacuzzi/board.h +++ b/board/jacuzzi/board.h @@ -102,7 +102,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/jinlon/board.h b/board/jinlon/board.h index 944413591b..1e3d287009 100644 --- a/board/jinlon/board.h +++ b/board/jinlon/board.h @@ -19,7 +19,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/jslrvp_ite/gpio.inc b/board/jslrvp_ite/gpio.inc index 5c0219263e..387020100e 100644 --- a/board/jslrvp_ite/gpio.inc +++ b/board/jslrvp_ite/gpio.inc @@ -37,7 +37,7 @@ GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interrupt) /* UAR GPIO_INT(WP_L, PIN(I, 4), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* enable 1.8v input of EC's espi_reset pin, and then this pin takes effect. */ GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) /* eSPI_reset# */ #endif @@ -72,7 +72,7 @@ UNIMPLEMENTED(EN_VCCIO_EXT) /* Host communication GPIOs */ GPIO(PCH_WAKE_L, PIN(J, 0), GPIO_ODR_HIGH) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(PCH_PLTRST_L, PIN(E, 3), GPIO_INPUT | GPIO_PULL_UP) #endif @@ -139,7 +139,7 @@ GPIO(NC_PMIC_EN, PIN(H, 3), GPIO_INPUT) /* Used if Base EC is present */ GPIO(NC_EC_BASE_DET, PIN(I, 3), GPIO_INPUT) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INPUT) #endif diff --git a/board/kakadu/board.c b/board/kakadu/board.c index 8d91d06832..9ac5ed8de4 100644 --- a/board/kakadu/board.c +++ b/board/kakadu/board.c @@ -71,8 +71,20 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/kano/board.h b/board/kano/board.h index 6b65edf174..c72249c0f3 100644 --- a/board/kano/board.h +++ b/board/kano/board.h @@ -3,18 +3,13 @@ * found in the LICENSE file. */ -/* Brya board configuration */ +/* Kano board configuration */ #ifndef __CROS_EC_BOARD_H #define __CROS_EC_BOARD_H #include "compile_time_macros.h" -/* - * Early brya boards are not set up for vivaldi - */ -#undef CONFIG_KEYBOARD_VIVALDI - /* Baseboard features */ #include "baseboard.h" diff --git a/board/kano/build.mk b/board/kano/build.mk index 6d1303a15a..df453187bf 100644 --- a/board/kano/build.mk +++ b/board/kano/build.mk @@ -22,5 +22,4 @@ board-y+=keyboard.o board-y+=led.o board-y+=pwm.o board-y+=sensors.o -board-y+=tune_mp2964.o board-y+=usbc_config.o diff --git a/board/kano/ec.tasklist b/board/kano/ec.tasklist index 7634667963..f52567d9fa 100644 --- a/board/kano/ec.tasklist +++ b/board/kano/ec.tasklist @@ -19,6 +19,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ diff --git a/board/kano/fw_config.c b/board/kano/fw_config.c index fb8acb635d..a13dadeb5d 100644 --- a/board/kano/fw_config.c +++ b/board/kano/fw_config.c @@ -11,20 +11,19 @@ #define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) -static union brya_cbi_fw_config fw_config; +static union kano_cbi_fw_config fw_config; BUILD_ASSERT(sizeof(fw_config) == sizeof(uint32_t)); /* - * FW_CONFIG defaults for brya if the CBI.FW_CONFIG data is not + * FW_CONFIG defaults for kano if the CBI.FW_CONFIG data is not * initialized. */ -static const union brya_cbi_fw_config fw_config_defaults = { - .usb_db = DB_USB3_PS8815, +static const union kano_cbi_fw_config fw_config_defaults = { .kb_bl = KEYBOARD_BACKLIGHT_ENABLED, }; /**************************************************************************** - * Brya FW_CONFIG access + * Kano FW_CONFIG access */ void board_init_fw_config(void) { @@ -36,25 +35,21 @@ void board_init_fw_config(void) if (get_board_id() == 0) { /* * Early boards have a zero'd out FW_CONFIG, so replace - * it with a sensible default value. If DB_USB_ABSENT2 - * was used as an alternate encoding of DB_USB_ABSENT to - * avoid the zero check, then fix it. + * it with a sensible default value. */ if (fw_config.raw_value == 0) { CPRINTS("CBI: FW_CONFIG is zero, using board defaults"); fw_config = fw_config_defaults; - } else if (fw_config.usb_db == DB_USB_ABSENT2) { - fw_config.usb_db = DB_USB_ABSENT; } } } -union brya_cbi_fw_config get_fw_config(void) +union kano_cbi_fw_config get_fw_config(void) { return fw_config; } -enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void) +bool ec_cfg_has_kblight(void) { - return fw_config.usb_db; + return (fw_config.kb_bl == KEYBOARD_BACKLIGHT_ENABLED); } diff --git a/board/kano/fw_config.h b/board/kano/fw_config.h index 6e4eb3ef58..8402b5568d 100644 --- a/board/kano/fw_config.h +++ b/board/kano/fw_config.h @@ -3,36 +3,28 @@ * found in the LICENSE file. */ -#ifndef __BOARD_BRYA_FW_CONFIG_H_ -#define __BOARD_BRYA_FW_CONFIG_H_ +#ifndef __BOARD_KANO_FW_CONFIG_H_ +#define __BOARD_KANO_FW_CONFIG_H_ #include <stdint.h> /**************************************************************************** - * CBI FW_CONFIG layout for Brya board. + * CBI FW_CONFIG layout for Kano board. * - * Source of truth is the project/brya/brya/config.star configuration file. + * Source of truth is the project/brya/kano/config.star configuration file. */ -enum ec_cfg_usb_db_type { - DB_USB_ABSENT = 0, - DB_USB3_PS8815 = 1, - DB_USB_ABSENT2 = 15 -}; - enum ec_cfg_keyboard_backlight_type { KEYBOARD_BACKLIGHT_DISABLED = 0, KEYBOARD_BACKLIGHT_ENABLED = 1 }; -union brya_cbi_fw_config { +union kano_cbi_fw_config { struct { - enum ec_cfg_usb_db_type usb_db : 4; - uint32_t sd_db : 2; - uint32_t lte_db : 1; enum ec_cfg_keyboard_backlight_type kb_bl : 1; uint32_t audio : 3; - uint32_t reserved_1 : 21; + uint32_t ufc : 2; + uint32_t reserved_1 : 26; }; uint32_t raw_value; }; @@ -42,13 +34,14 @@ union brya_cbi_fw_config { * * @return the FW_CONFIG for the board. */ -union brya_cbi_fw_config get_fw_config(void); +union kano_cbi_fw_config get_fw_config(void); /** - * Get the USB daughter board type from FW_CONFIG. + * Check if the FW_CONFIG has enabled keyboard backlight. * - * @return the USB daughter board type. + * @return true if board supports keyboard backlight, false if the board + * doesn't support it. */ -enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void); +bool ec_cfg_has_kblight(void); -#endif /* __BOARD_BRYA_FW_CONFIG_H_ */ +#endif /* __BOARD_KANO_FW_CONFIG_H_ */ diff --git a/board/kano/gpio.inc b/board/kano/gpio.inc index e5b452ced3..cfcc6bbd3f 100644 --- a/board/kano/gpio.inc +++ b/board/kano/gpio.inc @@ -117,6 +117,7 @@ UNUSED(PIN(D, 6)) /* GPOD6/CR_SOUT3/SHDF_ESPI_L */ UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */ UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */ UNUSED(PIN(6, 6)) /* GPIO66 */ +UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */ /* Pre-configured PSL balls: J8 K6 */ diff --git a/board/kano/usbc_config.h b/board/kano/usbc_config.h index 87e601ee3e..38fce7d2cf 100644 --- a/board/kano/usbc_config.h +++ b/board/kano/usbc_config.h @@ -3,7 +3,7 @@ * found in the LICENSE file. */ -/* Brya board-specific USB-C configuration */ +/* Kano board-specific USB-C configuration */ #ifndef __CROS_EC_USBC_CONFIG_H #define __CROS_EC_USBC_CONFIG_H diff --git a/board/kappa/board.c b/board/kappa/board.c index 963ade7430..f3c17f32c3 100644 --- a/board/kappa/board.c +++ b/board/kappa/board.c @@ -65,13 +65,32 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 100, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct i2c_port_t i2c_bitbang_ports[] = { - {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv}, + { + .name = "battery", + .port = 2, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA, + .drv = &bitbang_drv + }, }; const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); diff --git a/board/katsu/board.c b/board/katsu/board.c index 6484778b13..5f91f64348 100644 --- a/board/katsu/board.c +++ b/board/katsu/board.c @@ -70,8 +70,20 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/kindred/board.h b/board/kindred/board.h index dd63efb390..89cd18bcc0 100644 --- a/board/kindred/board.h +++ b/board/kindred/board.h @@ -18,7 +18,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/kingler/board.c b/board/kingler/board.c deleted file mode 100644 index e01d64c386..0000000000 --- a/board/kingler/board.c +++ /dev/null @@ -1,188 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Corsola board configuration */ - -#include "adc.h" -#include "button.h" -#include "charge_manager.h" -#include "charge_state_v2.h" -#include "charger.h" -#include "chipset.h" -#include "common.h" -#include "console.h" -#include "driver/accel_lis2dw12.h" -#include "driver/accelgyro_icm_common.h" -#include "driver/accelgyro_icm426xx.h" -#include "gpio.h" -#include "hooks.h" -#include "i2c.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "motion_sense.h" -#include "power.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "regulator.h" -#include "spi.h" -#include "switch.h" -#include "tablet_mode.h" -#include "task.h" -#include "timer.h" -#include "uart.h" - -/* Initialize board. */ -static void board_init(void) -{ - /* Enable motion sensor interrupt */ - gpio_enable_interrupt(GPIO_BASE_IMU_INT_L); - gpio_enable_interrupt(GPIO_LID_ACCEL_INT_L); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -/* Sensor */ -static struct mutex g_base_mutex; -static struct mutex g_lid_mutex; - -static struct stprivate_data g_lis2dwl_data; -static struct icm_drv_data_t g_icm426xx_data; - -struct motion_sensor_t motion_sensors[] = { - /* - * Note: icm426xx: supports accelerometer and gyro sensor - * Requirement: accelerometer sensor must init before gyro sensor - * DO NOT change the order of the following table. - */ - [BASE_ACCEL] = { - .name = "Base Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_ICM426XX, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_BASE, - .drv = &icm426xx_drv, - .mutex = &g_base_mutex, - .drv_data = &g_icm426xx_data, - .port = I2C_PORT_ACCEL, - .i2c_spi_addr_flags = ICM426XX_ADDR0_FLAGS, - .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs. */ - .rot_standard_ref = NULL, - .min_frequency = ICM426XX_ACCEL_MIN_FREQ, - .max_frequency = ICM426XX_ACCEL_MAX_FREQ, - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 10000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - }, - }, - [BASE_GYRO] = { - .name = "Base Gyro", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_ICM426XX, - .type = MOTIONSENSE_TYPE_GYRO, - .location = MOTIONSENSE_LOC_BASE, - .drv = &icm426xx_drv, - .mutex = &g_base_mutex, - .port = I2C_PORT_ACCEL, - .i2c_spi_addr_flags = ICM426XX_ADDR0_FLAGS, - .default_range = 1000, /* dps */ - .rot_standard_ref = NULL, - .min_frequency = ICM426XX_GYRO_MIN_FREQ, - .max_frequency = ICM426XX_GYRO_MAX_FREQ, - }, - [LID_ACCEL] = { - .name = "Lid Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_LIS2DWL, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_LID, - .drv = &lis2dw12_drv, - .mutex = &g_lid_mutex, - .drv_data = &g_lis2dwl_data, - .int_signal = GPIO_LID_ACCEL_INT_L, - .port = I2C_PORT_ACCEL, - .i2c_spi_addr_flags = LIS2DWL_ADDR1_FLAGS, - .flags = MOTIONSENSE_FLAG_INT_SIGNAL, - .rot_standard_ref = NULL, /* identity matrix */ - .default_range = 2, /* g */ - .min_frequency = LIS2DW12_ODR_MIN_VAL, - .max_frequency = LIS2DW12_ODR_MAX_VAL, - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 12500 | ROUND_UP_FLAG, - }, - /* Sensor on for lid angle detection */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - }, - }, -}; -const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); - -void motion_interrupt(enum gpio_signal signal) -{ - icm426xx_interrupt(signal); -} - -/* ADC channels. Must be in the exactly same order as in enum adc_channel. */ -const struct adc_t adc_channels[] = { - /* Convert to mV (3000mV/1024). */ - {"VBUS_C0", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH0}, - {"BOARD_ID_0", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH1}, - {"BOARD_ID_1", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH2}, - /* AMON/BMON gain = 17.97 */ - {"CHARGER_AMON_R", ADC_MAX_MVOLT * 1000 / 17.97, ADC_READ_MAX + 1, 0, - CHIP_ADC_CH3}, - {"VBUS_C1", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH5}, - {"CHARGER_PMON", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH6}, -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -/* PWM */ - -/* - * PWM channels. Must be in the exactly same order as in enum pwm_channel. - * There total three 16 bits clock prescaler registers for all pwm channels, - * so use the same frequency and prescaler register setting is required if - * number of pwm channel greater than three. - */ -const struct pwm_t pwm_channels[] = { - [PWM_CH_LED1] = { - .channel = 0, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, - .freq_hz = 324, /* maximum supported frequency */ - .pcfsr_sel = PWM_PRESCALER_C4 - }, - [PWM_CH_LED2] = { - .channel = 1, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, - .freq_hz = 324, /* maximum supported frequency */ - .pcfsr_sel = PWM_PRESCALER_C4 - }, - [PWM_CH_LED3] = { - .channel = 2, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, - .freq_hz = 324, /* maximum supported frequency */ - .pcfsr_sel = PWM_PRESCALER_C4 - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -static void board_suspend(void) -{ - gpio_set_level(GPIO_EN_5V_USM, 0); -} -DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_suspend, HOOK_PRIO_DEFAULT); - -static void board_resume(void) -{ - gpio_set_level(GPIO_EN_5V_USM, 1); -} -DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_resume, HOOK_PRIO_DEFAULT); diff --git a/board/kingler/board.h b/board/kingler/board.h deleted file mode 100644 index 857e654787..0000000000 --- a/board/kingler/board.h +++ /dev/null @@ -1,118 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Krabby board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -#include "baseboard.h" - -/* Chipset config */ - -/* Optional features */ -#define CONFIG_LTO - -/* - * TODO: Remove this option once the VBAT no longer keeps high when - * system's power isn't presented. - */ -#define CONFIG_IT83XX_RESET_PD_CONTRACT_IN_BRAM - -/* BC12 */ -/* TODO(b/159583342): remove after rev0 deprecated */ -#define CONFIG_MT6360_BC12_GPIO - -/* LED */ -#define CONFIG_LED_ONOFF_STATES -#define CONFIG_LED_ONOFF_STATES_BAT_LOW 10 - -/* PD / USB-C / PPC */ -#define CONFIG_USB_PD_DEBUG_LEVEL 3 -#define PD_MAX_CURRENT_MA 3000 -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_VOLTAGE_MV 15000 -#define PD_MAX_POWER_MW 45000 -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ - -/* Optional console commands */ -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_SCRATCHPAD -#define CONFIG_CMD_STACKOVERFLOW - -#define CONFIG_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV 9000 - -/* Sensor */ -#define CONFIG_GMR_TABLET_MODE -#define CONFIG_TABLET_MODE -#define CONFIG_TABLET_MODE_SWITCH -#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L - -#define CONFIG_ACCELGYRO_BMI160 /* Base accel */ -#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) -#define CONFIG_ACCELGYRO_ICM426XX /* Base accel */ -#define CONFIG_ACCELGYRO_ICM426XX_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) - -#define CONFIG_ACCEL_LIS2DWL -#define CONFIG_ACCEL_LIS2DW_AS_BASE -#define CONFIG_ACCEL_LIS2DW12_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL) - -#define CONFIG_LID_ANGLE -#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL -#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL -#define CONFIG_LID_ANGLE_UPDATE - -#define CONFIG_ACCEL_FORCE_MODE_MASK 0 - -/* SPI / Host Command */ -#undef CONFIG_HOSTCMD_DEBUG_MODE -#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF - -/* USB-A */ -#define USBA_PORT_COUNT 1 - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -enum battery_type { - BATTERY_C235, - BATTERY_TYPE_COUNT, -}; - -enum sensor_id { - BASE_ACCEL = 0, - BASE_GYRO, - LID_ACCEL, - SENSOR_COUNT, -}; - -enum adc_channel { - ADC_VBUS_C0, /* ADC 0 */ - ADC_BOARD_ID_0, /* ADC 1 */ - ADC_BOARD_ID_1, /* ADC 2 */ - ADC_CHARGER_AMON_R, /* ADC 3 */ - ADC_VBUS_C1, /* ADC 5 */ - ADC_CHARGER_PMON, /* ADC 6 */ - - /* Number of ADC channels */ - ADC_CH_COUNT, -}; - -enum pwm_channel { - PWM_CH_LED1, - PWM_CH_LED2, - PWM_CH_LED3, - PWM_CH_COUNT, -}; - -void motion_interrupt(enum gpio_signal signal); - -#endif /* !__ASSEMBLER__ */ -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/kingler/build.mk b/board/kingler/build.mk deleted file mode 100644 index b355dfd90d..0000000000 --- a/board/kingler/build.mk +++ /dev/null @@ -1,16 +0,0 @@ -# -*- makefile -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build - -# the IC is ITE IT8xxx2 -CHIP:=it83xx -CHIP_FAMILY:=it8xxx2 -CHIP_VARIANT:=it81202bx_1024 -BASEBOARD:=corsola - -board-y=led.o -board-y+=battery.o board.o -board-y+=usbc_config.o diff --git a/board/kingler/ec.tasklist b/board/kingler/ec.tasklist deleted file mode 100644 index 75dbb1a828..0000000000 --- a/board/kingler/ec.tasklist +++ /dev/null @@ -1,22 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * See CONFIG_TASK_LIST in config.h for details. - */ -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(PDCMD, pd_command_task, NULL, 1024) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, 1024) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, 1280) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, 1280) \ - diff --git a/board/kingler/gpio.inc b/board/kingler/gpio.inc deleted file mode 100644 index 1d4700c1c1..0000000000 --- a/board/kingler/gpio.inc +++ /dev/null @@ -1,160 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/* Wake Source interrupts */ -GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP | - GPIO_HIB_WAKE_HIGH, power_button_interrupt) /* H1_EC_PWR_BTN_ODL */ -GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, - lid_interrupt) -GPIO_INT(TABLET_MODE_L, PIN(J, 7), GPIO_INT_BOTH, - gmr_tablet_switch_isr) - -/* Chipset interrupts */ -GPIO_INT(AP_EC_WARM_RST_REQ, PIN(D, 3), GPIO_INT_RISING | GPIO_SEL_1P8V, - chipset_reset_request_interrupt) - -/* Power sequencing interrupts */ -GPIO_INT(AP_EC_WATCHDOG_L, PIN(C, 7), GPIO_INT_BOTH | GPIO_SEL_1P8V, - chipset_watchdog_interrupt) -GPIO_INT(AP_IN_SLEEP_L, PIN(F, 2), - GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) -GPIO_INT(PMIC_EC_PWRGD, PIN(F, 3), - GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) - -/* Sensor Interrupts */ -GPIO_INT(BASE_IMU_INT_L, PIN(J, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, - motion_interrupt) -GPIO_INT(LID_ACCEL_INT_L, PIN(J, 3), GPIO_INT_FALLING | GPIO_SEL_1P8V, - lis2dw12_interrupt) -GPIO(ALS_RGB_INT_ODL, PIN(F, 0), GPIO_INPUT) - -/* USB-C interrupts */ -/* TODO: driver not ready */ -GPIO(USB_C0_PPC_INT_ODL, PIN(D, 1), GPIO_INT_BOTH) -GPIO_INT(USB_C0_BC12_INT_ODL,PIN(J, 6), GPIO_INT_FALLING, bc12_interrupt) -GPIO_INT(USB_C1_BC12_INT_L, PIN(J, 4), GPIO_INT_FALLING, bc12_interrupt) - -/* Volume button interrupts */ -GPIO_INT(VOLUME_DOWN_L, PIN(D, 5), GPIO_INT_BOTH | GPIO_PULL_UP, - button_interrupt) /* EC_VOLDN_BTN_ODL */ -GPIO_INT(VOLUME_UP_L, PIN(D, 6), GPIO_INT_BOTH | GPIO_PULL_UP, - button_interrupt) /* EC_VOLUP_BTN_ODL */ - -/* Other interrupts */ -GPIO_INT(AP_XHCI_INIT_DONE, PIN(D, 2), GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, - usb_a0_interrupt) -GPIO_INT(AC_PRESENT, PIN(E, 5), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, - extpower_interrupt) /* AC_OK / AC_PRESENT in rev1+ */ -GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, - uart_deepsleep_interrupt) /* UART_DEBUG_TX_EC_RX */ -GPIO_INT(WP, PIN(I, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, - switch_interrupt) /* EC_FLASH_WP_OD */ -GPIO_INT(SPI0_CS, PIN(M, 5), GPIO_INT_FALLING, - spi_event) /* SPI slave Chip Select -- AP_SPI_EC_CS_L */ -GPIO_INT(X_EC_GPIO2, PIN(B, 2), GPIO_ODR_HIGH, x_ec_interrupt) - -/* Power Sequencing Signals */ -GPIO(EC_PMIC_EN_ODL, PIN(D, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) -GPIO(EC_PMIC_WATCHDOG_L, PIN(H, 0), GPIO_ODR_LOW | GPIO_SEL_1P8V) -GPIO(EN_PP5000_A, PIN(C, 6), GPIO_OUT_HIGH) -GPIO(PG_MT6315_PROC_ODL, PIN(E, 1), GPIO_INPUT) -GPIO(PG_MT6360_ODL, PIN(F, 1), GPIO_INPUT) -GPIO(PG_PP5000_A_ODL, PIN(A, 6), GPIO_INPUT) -GPIO(EN_ULP, PIN(E, 3), GPIO_OUT_LOW) -GPIO(SYS_RST_ODL, PIN(B, 6), GPIO_ODR_LOW) -GPIO(EC_BL_EN_OD, PIN(B, 5), GPIO_ODR_LOW | GPIO_SEL_1P8V) - -/* MKBP event synchronization */ -GPIO(EC_INT_L, PIN(E, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_AP_INT_ODL */ - -/* USB and USBC Signals */ -GPIO(DP_AUX_PATH_SEL, PIN(G, 0), GPIO_OUT_HIGH) -GPIO(EC_AP_DP_HPD_ODL, PIN(J, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) -GPIO(EN_PP5000_USB_A0_VBUS, PIN(B, 7), GPIO_OUT_LOW) -GPIO(USB_C0_FRS_EN, PIN(H, 3), GPIO_OUT_LOW) - -/* Misc Signals */ -GPIO(EC_BATT_PRES_ODL, PIN(C, 0), GPIO_INPUT) -GPIO(BC12_DET_EN, PIN(J, 5), GPIO_OUT_LOW) /* EN_USB_C0_BC12_DET */ -GPIO(EN_EC_ID_ODL, PIN(H, 5), GPIO_ODR_LOW) -GPIO(ENTERING_RW, PIN(C, 5), GPIO_OUT_LOW) /* EC_ENTERING_RW */ -GPIO(EN_5V_USM, PIN(D, 7), GPIO_OUT_LOW) - -/* I2C pins - Alternate function below configures I2C module on these pins */ -GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT) /* I2C_CHG_BATT_SCL */ -GPIO(I2C_A_SDA, PIN(B, 4), GPIO_INPUT) /* I2C_CHG_BATT_SDA */ -GPIO(I2C_B_SCL, PIN(C, 1), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SCL */ -GPIO(I2C_B_SDA, PIN(C, 2), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SDA */ -GPIO(I2C_C_SCL, PIN(F, 6), GPIO_INPUT) /* I2C_USB_C0_SCL */ -GPIO(I2C_C_SDA, PIN(F, 7), GPIO_INPUT) /* I2C_USB_C0_SCL */ -GPIO(I2C_E_SCL, PIN(E, 0), GPIO_INPUT) /* I2C_USB_C1_SCL */ -GPIO(I2C_E_SDA, PIN(E, 7), GPIO_INPUT) /* I2C_USB_C1_SDA */ - -/* SPI pins - Alternate function below configures SPI module on these pins */ - -/* NC / TP */ - -/* Keyboard pins */ - -/* Subboards HDMI/TYPEC */ -GPIO(EC_X_GPIO1, PIN(H, 4), GPIO_OUT_LOW) -GPIO(EC_X_GPIO3, PIN(J, 1), GPIO_INPUT) - -/* Alternate functions GPIO definitions */ -ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0) /* I2C A */ -ALTERNATE(PIN_MASK(C, 0x06), 1, MODULE_I2C, GPIO_SEL_1P8V) /* I2C B */ -ALTERNATE(PIN_MASK(F, 0xC0), 1, MODULE_I2C, 0) /* I2C C */ -ALTERNATE(PIN_MASK(E, 0x81), 1, MODULE_I2C, 0) /* I2C E */ - -/* UART */ -ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, 0) /* EC to Servo */ - -/* PWM */ -ALTERNATE(PIN_MASK(A, 0x07), 1, MODULE_PWM, 0) /* PWM 0~2 */ - -/* ADC */ -ALTERNATE(PIN_MASK(I, 0x6F), 0, MODULE_ADC, 0) /* ADC 0,1,2,3,5,6 */ - -/* SPI */ -ALTERNATE(PIN_MASK(M, 0x33), 0, MODULE_SPI, 0) /* SPI */ - -/* Unimplemented Pins */ -GPIO(SET_VMC_VOLT_AT_1V8, PIN(D, 4), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) -GPIO(PACKET_MODE_EN, PIN(A, 3), GPIO_INPUT | GPIO_PULL_DOWN) -/* b/160218054: behavior not defined */ -/* *_ODL pin has external pullup so don't pull it down. */ -GPIO(USB_A0_FAULT_ODL, PIN(A, 7), GPIO_INPUT) -GPIO(CHARGER_PROCHOT_ODL, PIN(C, 3), GPIO_INPUT) -GPIO(PG_MT6315_GPU_ODL, PIN(H, 6), GPIO_INPUT) -GPIO(EN_PP3000_SD_U, PIN(G, 1), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) -/* reserved for future use */ -GPIO(CCD_MODE_ODL, PIN(C, 4), GPIO_INPUT) -/* - * ADC pins don't have internal pull-down capability, - * so we set them as output low. - */ -GPIO(NC_GPI7, PIN(I, 7), GPIO_OUT_LOW) -/* NC pins, enable internal pull-up/down to avoid floating state. */ -GPIO(NC_GPM2, PIN(M, 2), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPM3, PIN(M, 3), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPM6, PIN(M, 6), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(SPI_CLK_GPG6, PIN(G, 6), GPIO_INPUT | GPIO_PULL_UP) -/* - * These 4 pins don't have internal pull-down capability, - * so we set them as output low. - */ -GPIO(NC_GPG3, PIN(G, 3), GPIO_OUT_LOW) -GPIO(SPI_MOSI_GPG4, PIN(G, 4), GPIO_OUT_LOW) -GPIO(SPI_MISO_GPG5, PIN(G, 5), GPIO_OUT_LOW) -GPIO(SPI_CS_GPG7, PIN(G, 7), GPIO_OUT_LOW) - -UNIMPLEMENTED(USB_C0_PPC_BC12_INT_ODL) -UNIMPLEMENTED(USB_C0_PPC_FRSINFO) -UNIMPLEMENTED(USB_C1_BC12_CHARGER_INT_ODL) diff --git a/board/kingler/usbc_config.c b/board/kingler/usbc_config.c deleted file mode 100644 index 485a02c10f..0000000000 --- a/board/kingler/usbc_config.c +++ /dev/null @@ -1,28 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Krabby board-specific USB-C configuration */ - -#include "driver/tcpm/it83xx_pd.h" -#include "driver/usb_mux/ps8743.h" -#include "hooks.h" - -void board_usb_mux_init(void) -{ - if (board_get_sub_board() == SUB_BOARD_TYPEC) { - ps8743_tune_usb_eq(&usb_muxes[1], - PS8743_USB_EQ_TX_12_8_DB, - PS8743_USB_EQ_RX_12_8_DB); - ps8743_write(&usb_muxes[1], - PS8743_REG_HS_DET_THRESHOLD, - PS8743_USB_HS_THRESH_NEG_10); - } -} -DECLARE_HOOK(HOOK_INIT, board_usb_mux_init, HOOK_PRIO_INIT_I2C + 1); - -const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) -{ - return NULL; -} diff --git a/board/kingoftown/board.c b/board/kingoftown/board.c index cc0005d775..cea9b9efe9 100644 --- a/board/kingoftown/board.c +++ b/board/kingoftown/board.c @@ -53,16 +53,41 @@ __override struct keyboard_scan_config keyscan_config = { /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 1000, GPIO_EC_I2C_USB_C1_PD_SCL, - GPIO_EC_I2C_USB_C1_PD_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/kingoftown/board.h b/board/kingoftown/board.h index 1ba0ed0c34..ee773f8c7c 100644 --- a/board/kingoftown/board.h +++ b/board/kingoftown/board.h @@ -10,14 +10,6 @@ #include "baseboard.h" -/* TODO(waihong): Remove the following bringup features */ -#define CONFIG_BRINGUP -#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands. */ -#define CONFIG_USB_PD_DEBUG_LEVEL 3 -#define CONFIG_CMD_GPIO_EXTENDED -#define CONFIG_CMD_POWERINDEBUG -#define CONFIG_I2C_DEBUG - /* Internal SPI flash on NPCX7 */ #define CONFIG_FLASH_SIZE_BYTES (512 * 1024) /* 512KB internal spi flash */ diff --git a/board/kodama/board.c b/board/kodama/board.c index 33ecbba384..5ecfc794f5 100644 --- a/board/kodama/board.c +++ b/board/kodama/board.c @@ -62,14 +62,33 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA, - .flags = I2C_PORT_FLAG_DYNAMIC_SPEED}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA, + .flags = I2C_PORT_FLAG_DYNAMIC_SPEED + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct i2c_port_t i2c_bitbang_ports[] = { - {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv}, + { + .name = "battery", + .port = 2, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA, + .drv = &bitbang_drv + }, }; const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); diff --git a/board/kohaku/board.h b/board/kohaku/board.h index b8470d9ba7..5217cd6b3b 100644 --- a/board/kohaku/board.h +++ b/board/kohaku/board.h @@ -19,7 +19,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/krabby/battery.c b/board/krabby/battery.c deleted file mode 100644 index f07c38e1b8..0000000000 --- a/board/krabby/battery.c +++ /dev/null @@ -1,47 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "battery.h" -#include "battery_fuel_gauge.h" -#include "battery_smart.h" -#include "charge_manager.h" -#include "chipset.h" -#include "gpio.h" -#include "hooks.h" -#include "system.h" -#include "usb_pd.h" - -const struct board_batt_params board_battery_info[] = { - [BATTERY_C235] = { - .fuel_gauge = { - .manuf_name = "AS3GWRc3KA", - .device_name = "C235-41", - .ship_mode = { - .reg_addr = 0x0, - .reg_data = { 0x10, 0x10 }, - }, - .fet = { - .reg_addr = 0x99, - .reg_mask = 0x0c, - .disconnect_val = 0x0c, - } - }, - .batt_info = { - .voltage_max = 8800, - .voltage_normal = 7700, - .voltage_min = 6000, - .precharge_current = 256, - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = 0, - .discharging_max_c = 60, - }, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); - -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_C235; diff --git a/board/krabby/board.h b/board/krabby/board.h deleted file mode 100644 index 4e3dfc43d6..0000000000 --- a/board/krabby/board.h +++ /dev/null @@ -1,116 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Krabby board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -#include "baseboard.h" - -/* Chipset config */ - -/* Optional features */ -#define CONFIG_LTO - -/* - * TODO: Remove this option once the VBAT no longer keeps high when - * system's power isn't presented. - */ -#define CONFIG_IT83XX_RESET_PD_CONTRACT_IN_BRAM - -/* BC12 */ - -/* LED */ -#define CONFIG_LED_ONOFF_STATES -#define CONFIG_LED_ONOFF_STATES_BAT_LOW 10 - -/* PD / USB-C / PPC */ -#define CONFIG_USB_PD_DEBUG_LEVEL 3 -#define PD_MAX_CURRENT_MA 3000 -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_VOLTAGE_MV 15000 -#define PD_MAX_POWER_MW 45000 -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ - -/* Optional console commands */ -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_SCRATCHPAD -#define CONFIG_CMD_STACKOVERFLOW - -#define CONFIG_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV 9000 - -/* Sensor */ -#define CONFIG_GMR_TABLET_MODE -#define CONFIG_TABLET_MODE -#define CONFIG_TABLET_MODE_SWITCH -#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L - -#define CONFIG_ACCELGYRO_BMI160 /* Base accel */ -#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) -#define CONFIG_ACCELGYRO_ICM426XX /* Base accel */ -#define CONFIG_ACCELGYRO_ICM426XX_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) - -#define CONFIG_ACCEL_LIS2DWL -#define CONFIG_ACCEL_LIS2DW_AS_BASE -#define CONFIG_ACCEL_LIS2DW12_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL) - -#define CONFIG_LID_ANGLE -#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL -#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL -#define CONFIG_LID_ANGLE_UPDATE - -#define CONFIG_ACCEL_FORCE_MODE_MASK 0 - -/* SPI / Host Command */ -#undef CONFIG_HOSTCMD_DEBUG_MODE -#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF - -/* USB-A */ -#define USBA_PORT_COUNT 1 - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -enum battery_type { - BATTERY_C235, - BATTERY_TYPE_COUNT, -}; - -enum sensor_id { - BASE_ACCEL = 0, - BASE_GYRO, - LID_ACCEL, - SENSOR_COUNT, -}; - -enum adc_channel { - ADC_VBUS_C0, /* ADC 0 */ - ADC_BOARD_ID_0, /* ADC 1 */ - ADC_BOARD_ID_1, /* ADC 2 */ - ADC_CHARGER_AMON_R, /* ADC 3 */ - ADC_VBUS_C1, /* ADC 5 */ - ADC_CHARGER_PMON, /* ADC 6 */ - - /* Number of ADC channels */ - ADC_CH_COUNT, -}; - -enum pwm_channel { - PWM_CH_LED1, - PWM_CH_LED2, - PWM_CH_LED3, - PWM_CH_COUNT, -}; - -void motion_interrupt(enum gpio_signal signal); - -#endif /* !__ASSEMBLER__ */ -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/krabby/build.mk b/board/krabby/build.mk deleted file mode 100644 index 86903344a1..0000000000 --- a/board/krabby/build.mk +++ /dev/null @@ -1,16 +0,0 @@ -# -*- makefile -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build - -# the IC is ITE IT8xxx2 -CHIP:=it83xx -CHIP_FAMILY:=it8xxx2 -CHIP_VARIANT:=it81202bx_1024 -BASEBOARD:=corsola - -board-y=led.o -board-y+=battery.o board.o hooks.o -board-y+=usbc_config.o diff --git a/board/krabby/ec.tasklist b/board/krabby/ec.tasklist deleted file mode 100644 index 75dbb1a828..0000000000 --- a/board/krabby/ec.tasklist +++ /dev/null @@ -1,22 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * See CONFIG_TASK_LIST in config.h for details. - */ -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(PDCMD, pd_command_task, NULL, 1024) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, 1024) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, 1280) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, 1280) \ - diff --git a/board/krabby/gpio.inc b/board/krabby/gpio.inc deleted file mode 100644 index be37d43fb8..0000000000 --- a/board/krabby/gpio.inc +++ /dev/null @@ -1,157 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/* Wake Source interrupts */ -GPIO_INT(POWER_BUTTON_L, PIN(E, 4), - GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, - power_button_interrupt) /* GSC_EC_PWR_BTN_ODL */ -GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, - lid_interrupt) /* LID_OPEN_3V3 */ -GPIO_INT(TABLET_MODE_L, PIN(J, 7), GPIO_INT_BOTH, - gmr_tablet_switch_isr) - -/* Chipset interrupts */ -GPIO_INT(AP_EC_WARM_RST_REQ, PIN(D, 3), GPIO_INT_RISING | GPIO_SEL_1P8V, - chipset_reset_request_interrupt) - -/* Power sequencing interrupts */ -GPIO_INT(AP_IN_SLEEP_L, PIN(B, 6), - GPIO_INT_BOTH | GPIO_SEL_1P8V, power_signal_interrupt) - -/* Sensor Interrupts */ -GPIO_INT(BASE_IMU_INT_L, PIN(M, 3), GPIO_INT_FALLING | GPIO_SEL_1P8V, - motion_interrupt) -GPIO_INT(LID_ACCEL_INT_L, PIN(M, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, - lis2dw12_interrupt) - -/* Volume button interrupts */ -GPIO_INT(VOLUME_DOWN_L, PIN(D, 5), GPIO_INT_BOTH, - button_interrupt) /* EC_VOLDN_BTN_ODL */ -GPIO_INT(VOLUME_UP_L, PIN(D, 6), GPIO_INT_BOTH, - button_interrupt) /* EC_VOLUP_BTN_ODL */ - -/* Other interrupts */ -GPIO_INT(AP_XHCI_INIT_DONE, PIN(J, 5), - GPIO_INT_BOTH | GPIO_SEL_1P8V, - usb_a0_interrupt) -GPIO_INT(AC_PRESENT, PIN(E, 5), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, - extpower_interrupt) /* GSC_ACOK_OD */ -GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, - uart_deepsleep_interrupt) /* UART_DEBUG_TX_EC_RX */ -GPIO_INT(WP, PIN(I, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, - switch_interrupt) /* EC_FLASH_WP_OD */ -GPIO_INT(SPI0_CS, PIN(M, 5), GPIO_INT_FALLING | GPIO_SEL_1P8V, - spi_event) /* SPI slave Chip Select -- AP_EC_SPI_CS_L */ -GPIO_INT(X_EC_GPIO2, PIN(B, 2), GPIO_INT_BOTH | GPIO_ODR_HIGH, - x_ec_interrupt) - -/* USB-C interrupts */ -/* TODO: interrupt function not ready */ -GPIO(USB_C0_PPC_BC12_INT_ODL, PIN(D, 1), GPIO_INT_FALLING) -GPIO(USB_C1_BC12_CHARGER_INT_ODL, PIN(J, 4), GPIO_INT_FALLING) - -/* Power Sequencing Signals */ -GPIO(EC_PMIC_EN_ODL, PIN(D, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) -GPIO(EN_PP5000_Z2, PIN(C, 6), GPIO_OUT_HIGH) -GPIO(EN_ULP, PIN(E, 3), GPIO_OUT_LOW) -GPIO(SYS_RST_ODL, PIN(G, 1), GPIO_ODR_LOW) -GPIO(EC_BL_EN_OD, PIN(B, 5), GPIO_ODR_LOW | GPIO_SEL_1P8V) -GPIO(AP_EC_SYSRST_ODL, PIN(J, 2), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(AP_EC_WDTRST_L, PIN(C, 7), GPIO_INPUT | GPIO_SEL_1P8V) - -/* MKBP event synchronization */ -GPIO(EC_INT_L, PIN(E, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_AP_INT_ODL */ - -/* USB and USBC Signals */ -GPIO(DP_AUX_PATH_SEL, PIN(G, 0), GPIO_OUT_HIGH) -GPIO(EC_AP_DP_HPD_ODL, PIN(J, 0), GPIO_ODR_HIGH) -GPIO(EN_PP5000_USB_A0_VBUS, PIN(B, 7), GPIO_OUT_LOW) -GPIO(USB_C0_PPC_FRSINFO, PIN(F, 0), GPIO_INPUT) - -/* Misc Signals */ -GPIO(EC_BATT_PRES_ODL, PIN(C, 0), GPIO_INPUT) -GPIO(EN_EC_ID_ODL, PIN(H, 5), GPIO_ODR_LOW) -GPIO(ENTERING_RW, PIN(C, 5), GPIO_OUT_LOW) /* EC_ENTERING_RW */ -GPIO(EN_5V_USM, PIN(G, 3), GPIO_OUT_LOW) -GPIO(USB_A0_FAULT_ODL, PIN(J, 6), GPIO_INPUT) - -/* I2C pins - Alternate function below configures I2C module on these pins */ -GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_PWR_CBI_SCL */ -GPIO(I2C_A_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_PWR_CBI_SDA */ -GPIO(I2C_B_SCL, PIN(C, 1), GPIO_INPUT) /* I2C_BATT_SCL_3V3 */ -GPIO(I2C_B_SDA, PIN(C, 2), GPIO_INPUT) /* I2C_BATT_SDA_3V3 */ -GPIO(I2C_C_SCL, PIN(F, 6), GPIO_INPUT) /* I2C_USB_C0_SCL */ -GPIO(I2C_C_SDA, PIN(F, 7), GPIO_INPUT) /* I2C_USB_C0_SDA */ -GPIO(I2C_D_SCL, PIN(F, 2), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SCL */ -GPIO(I2C_D_SDA, PIN(F, 3), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SDA */ -GPIO(I2C_E_SCL, PIN(E, 0), GPIO_INPUT) /* I2C_USB_C1_SCL */ -GPIO(I2C_E_SDA, PIN(E, 7), GPIO_INPUT) /* I2C_USB_C1_SDA */ -GPIO(I2C_F_SCL, PIN(A, 4), GPIO_INPUT) /* I2C_PROG_SCL */ -GPIO(I2C_F_SDA, PIN(A, 5), GPIO_INPUT) /* I2C_PROG_SDA */ - -/* SPI pins - Alternate function below configures SPI module on these pins */ - -/* Keyboard pins */ - -/* Subboards HDMI/TYPEC */ -GPIO(EC_X_GPIO1, PIN(H, 4), GPIO_OUT_LOW) -GPIO(EC_X_GPIO3, PIN(J, 1), GPIO_INPUT) -GPIO(HDMI_PRSNT_ODL, PIN(J, 3), GPIO_INPUT) /* low -> hdmi, other -> usb */ - -/* Alternate functions GPIO definitions */ -ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0) /* I2C A */ -ALTERNATE(PIN_MASK(C, 0x06), 1, MODULE_I2C, GPIO_SEL_1P8V) /* I2C B */ -ALTERNATE(PIN_MASK(F, 0xCC), 1, MODULE_I2C, 0) /* I2C C, D */ -ALTERNATE(PIN_MASK(E, 0x81), 1, MODULE_I2C, 0) /* I2C E */ - -/* UART */ -ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, 0) /* EC to Servo */ - -/* PWM */ -ALTERNATE(PIN_MASK(A, 0x07), 1, MODULE_PWM, 0) /* PWM 0~2 */ - -/* ADC */ -ALTERNATE(PIN_MASK(I, 0b10010111), 0, MODULE_ADC, 0) /* ADC 0,1,2,4,7 */ - -/* SPI */ -ALTERNATE(PIN_MASK(M, 0x33), 0, MODULE_SPI, GPIO_SEL_1P8V) /* SPI */ - -/* Unimplemented Pins */ -GPIO(PACKET_MODE_EN, PIN(D, 4), GPIO_OUT_LOW) -GPIO(PG_PP5000_Z2_OD, PIN(D, 2), GPIO_INPUT) -GPIO(PG_MT6315_PROC_B_ODL, PIN(E, 1), GPIO_INPUT) -GPIO(EC_PEN_CHG_DIS_ODL, PIN(H, 3), GPIO_ODR_HIGH) /* 5V output */ -/* reserved for future use */ -GPIO(CCD_MODE_ODL, PIN(C, 4), GPIO_INPUT) - -/* NC pins, enable internal pull-up/down to avoid floating state. */ -GPIO(NC_GPA3, PIN(A, 3), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPA6, PIN(A, 6), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPA7, PIN(A, 7), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPC3, PIN(C, 3), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPD7, PIN(D, 7), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPF1, PIN(F, 1), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(SPI_CLK_GPG6, PIN(G, 6), GPIO_INPUT | GPIO_PULL_UP) -GPIO(NC_GPH0, PIN(H, 0), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPH6, PIN(H, 6), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPI7, PIN(I, 7), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPM6, PIN(M, 6), GPIO_INPUT | GPIO_PULL_DOWN) -/* - * These pins don't have internal pull-down capability, - * so we set them as output low. - */ -GPIO(SPI_MOSI_GPG4, PIN(G, 4), GPIO_OUT_LOW) -GPIO(SPI_MISO_GPG5, PIN(G, 5), GPIO_OUT_LOW) -GPIO(SPI_CS_GPG7, PIN(G, 7), GPIO_OUT_LOW) - -/* pins used in power/mt8192, will be removed after mt8186 code ready */ -UNIMPLEMENTED(AP_EC_WATCHDOG_L) -UNIMPLEMENTED(EC_PMIC_WATCHDOG_L) -UNIMPLEMENTED(PMIC_EC_PWRGD) diff --git a/board/krabby/led.c b/board/krabby/led.c deleted file mode 100644 index 1d3108c47b..0000000000 --- a/board/krabby/led.c +++ /dev/null @@ -1,120 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "ec_commands.h" -#include "gpio.h" -#include "led_common.h" -#include "led_onoff_states.h" -#include "chipset.h" -#include "driver/bc12/mt6360.h" - -__override const int led_charge_lvl_1 = 5; -__override const int led_charge_lvl_2 = 95; - -__override struct led_descriptor - led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { - [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0_BAT_LOW] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [STATE_FACTORY_TEST] = {{EC_LED_COLOR_WHITE, 2 * LED_ONE_SEC}, - {EC_LED_COLOR_AMBER, 2 * LED_ONE_SEC} }, -}; - -__override const struct led_descriptor - led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { - [PWR_LED_STATE_ON] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, - [PWR_LED_STATE_SUSPEND_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [PWR_LED_STATE_SUSPEND_NO_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [PWR_LED_STATE_OFF] = {{LED_OFF, LED_INDEFINITE} }, -}; - - -const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_BATTERY_LED, - EC_LED_ID_POWER_LED, -}; - -const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); - -__override void led_set_color_battery(enum ec_led_colors color) -{ - mt6360_led_set_brightness(MT6360_LED_RGB2, 50); - mt6360_led_set_brightness(MT6360_LED_RGB3, 50); - - switch (color) { - case EC_LED_COLOR_AMBER: - mt6360_led_enable(MT6360_LED_RGB2, 0); - mt6360_led_enable(MT6360_LED_RGB3, 1); - break; - case EC_LED_COLOR_WHITE: - mt6360_led_enable(MT6360_LED_RGB2, 1); - mt6360_led_enable(MT6360_LED_RGB3, 0); - break; - default: /* LED_OFF and other unsupported colors */ - mt6360_led_enable(MT6360_LED_RGB2, 0); - mt6360_led_enable(MT6360_LED_RGB3, 0); - break; - } -} - -__override void led_set_color_power(enum ec_led_colors color) -{ - mt6360_led_set_brightness(MT6360_LED_RGB1, 1); - mt6360_led_enable(MT6360_LED_RGB1, color == EC_LED_COLOR_WHITE); -} - -void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) -{ - if (led_id == EC_LED_ID_BATTERY_LED) { - brightness_range[EC_LED_COLOR_AMBER] = - MT6360_LED_BRIGHTNESS_MAX; - brightness_range[EC_LED_COLOR_WHITE] = - MT6360_LED_BRIGHTNESS_MAX; - } else if (led_id == EC_LED_ID_POWER_LED) { - brightness_range[EC_LED_COLOR_WHITE] = - MT6360_LED_BRIGHTNESS_MAX; - } -} - -int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) -{ - if (led_id == EC_LED_ID_BATTERY_LED) { - if (brightness[EC_LED_COLOR_AMBER] != 0) - led_set_color_battery(EC_LED_COLOR_AMBER); - else if (brightness[EC_LED_COLOR_WHITE] != 0) - led_set_color_battery(EC_LED_COLOR_WHITE); - else - led_set_color_battery(LED_OFF); - } else if (led_id == EC_LED_ID_POWER_LED) { - if (brightness[EC_LED_COLOR_WHITE] != 0) - led_set_color_power(EC_LED_COLOR_WHITE); - else - led_set_color_power(LED_OFF); - } - - return EC_SUCCESS; -} - -__override enum led_states board_led_get_state(enum led_states desired_state) -{ - if (desired_state == STATE_BATTERY_ERROR) { - if (chipset_in_state(CHIPSET_STATE_ON)) - return desired_state; - else if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND)) - return STATE_DISCHARGE_S3; - else - return STATE_DISCHARGE_S5; - } - return desired_state; -} diff --git a/board/krabby/usbc_config.c b/board/krabby/usbc_config.c deleted file mode 100644 index ee5d9483eb..0000000000 --- a/board/krabby/usbc_config.c +++ /dev/null @@ -1,40 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Krabby board-specific USB-C configuration */ - -#include "driver/tcpm/it83xx_pd.h" -#include "driver/usb_mux/ps8743.h" -#include "hooks.h" - -void board_usb_mux_init(void) -{ - if (board_get_sub_board() == SUB_BOARD_TYPEC) { - ps8743_tune_usb_eq(&usb_muxes[1], - PS8743_USB_EQ_TX_12_8_DB, - PS8743_USB_EQ_RX_12_8_DB); - ps8743_write(&usb_muxes[1], - PS8743_REG_HS_DET_THRESHOLD, - PS8743_USB_HS_THRESH_NEG_10); - } -} -DECLARE_HOOK(HOOK_INIT, board_usb_mux_init, HOOK_PRIO_INIT_I2C + 1); - -const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) -{ - const static struct cc_para_t - cc_parameter[CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT] = { - { - .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, - .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, - }, - { - .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, - .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, - }, - }; - - return &cc_parameter[port]; -} diff --git a/board/krabby/vif_override.xml b/board/krabby/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/krabby/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> diff --git a/board/kukui/board.c b/board/kukui/board.c index 8d386815c6..97fff0a80c 100644 --- a/board/kukui/board.c +++ b/board/kukui/board.c @@ -75,8 +75,20 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/lazor/board.c b/board/lazor/board.c index 1118f3a845..03192e1bbc 100644 --- a/board/lazor/board.c +++ b/board/lazor/board.c @@ -77,16 +77,41 @@ const int keyboard_factory_scan_pins_used = /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 1000, GPIO_EC_I2C_USB_C1_PD_SCL, - GPIO_EC_I2C_USB_C1_PD_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/liara/board.c b/board/liara/board.c index 4f8b552d1f..c8fdeff2cd 100644 --- a/board/liara/board.c +++ b/board/liara/board.c @@ -29,12 +29,48 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /* I2C port map. */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"thermal", I2C_PORT_THERMAL_AP, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"kblight", I2C_PORT_KBLIGHT, 100, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "thermal", + .port = I2C_PORT_THERMAL_AP, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "kblight", + .port = I2C_PORT_KBLIGHT, + .kbps = 100, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/lindar/ec.tasklist b/board/lindar/ec.tasklist index 292de51cdb..3e20d8ae39 100644 --- a/board/lindar/ec.tasklist +++ b/board/lindar/ec.tasklist @@ -16,6 +16,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/makomo/board.c b/board/makomo/board.c index 1bb6b134a7..8f9dbdc12c 100644 --- a/board/makomo/board.c +++ b/board/makomo/board.c @@ -66,13 +66,32 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct i2c_port_t i2c_bitbang_ports[] = { - {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv}, + { + .name = "battery", + .port = 2, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA, + .drv = &bitbang_drv + }, }; const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); diff --git a/board/makomo/board.h b/board/makomo/board.h index 844fd95292..3c620cd823 100644 --- a/board/makomo/board.h +++ b/board/makomo/board.h @@ -90,7 +90,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/marzipan/board.c b/board/marzipan/board.c index 915f96743d..753d7a2e2a 100644 --- a/board/marzipan/board.c +++ b/board/marzipan/board.c @@ -105,16 +105,41 @@ __override struct keyboard_scan_config keyscan_config = { /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 1000, GPIO_EC_I2C_USB_C1_PD_SCL, - GPIO_EC_I2C_USB_C1_PD_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/mchpevb1/board.c b/board/mchpevb1/board.c index aa74d07a0d..99e3ac9328 100644 --- a/board/mchpevb1/board.c +++ b/board/mchpevb1/board.c @@ -230,8 +230,20 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); * MCHP EVB connected to KBL RVP3 */ const struct i2c_port_t i2c_ports[] = { - {"sensors", MCHP_I2C_PORT4, 100, GPIO_SMB04_SCL, GPIO_SMB04_SDA}, - {"batt", MCHP_I2C_PORT5, 100, GPIO_SMB05_SCL, GPIO_SMB05_SDA}, + { + .name = "sensors", + .port = MCHP_I2C_PORT4, + .kbps = 100, + .scl = GPIO_SMB04_SCL, + .sda = GPIO_SMB04_SDA + }, + { + .name = "batt", + .port = MCHP_I2C_PORT5, + .kbps = 100, + .scl = GPIO_SMB05_SCL, + .sda = GPIO_SMB05_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/mchpevb1/board.h b/board/mchpevb1/board.h index de1e7a75e9..e16d0bb10f 100644 --- a/board/mchpevb1/board.h +++ b/board/mchpevb1/board.h @@ -163,7 +163,7 @@ #define CONFIG_CHIPSET_SKYLAKE #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/mchpevb1/gpio.inc b/board/mchpevb1/gpio.inc index 8be1099fbd..3949e31843 100644 --- a/board/mchpevb1/gpio.inc +++ b/board/mchpevb1/gpio.inc @@ -27,8 +27,8 @@ #define GPIO_BOTH_EDGES_PU (GPIO_INT_BOTH | GPIO_PULL_UP) -/* Only needed if CONFIG_HOSTCMD_ESPI is not set, using LPC interface to PCH */ -#ifndef CONFIG_HOSTCMD_ESPI +/* Only needed if CONFIG_HOST_INTERFACE_ESPI is not set, using LPC interface to PCH */ +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(PCH_PLTRST_L, PIN(064), GPIO_BOTH_EDGES_PU, lpcrst_interrupt) #endif diff --git a/board/metaknight/board.c b/board/metaknight/board.c index 253ce31571..e8b6b0ffbd 100644 --- a/board/metaknight/board.c +++ b/board/metaknight/board.c @@ -878,28 +878,43 @@ void motion_interrupt(enum gpio_signal signal) const struct i2c_port_t i2c_ports[] = { { - "eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA }, { - "battery", I2C_PORT_BATTERY, 100, GPIO_EC_I2C_BATTERY_SCL, - GPIO_EC_I2C_BATTERY_SDA + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_EC_I2C_BATTERY_SCL, + .sda = GPIO_EC_I2C_BATTERY_SDA }, { - "sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA }, { - "usbc0", I2C_PORT_USB_C0, 1000, GPIO_EC_I2C_USB_C0_SCL, - GPIO_EC_I2C_USB_C0_SDA + .name = "usbc0", + .port = I2C_PORT_USB_C0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_SCL, + .sda = GPIO_EC_I2C_USB_C0_SDA }, #if CONFIG_USB_PD_PORT_MAX_COUNT > 1 { - "sub_usbc1", I2C_PORT_SUB_USB_C1, 1000, - GPIO_EC_I2C_SUB_USB_C1_SCL, GPIO_EC_I2C_SUB_USB_C1_SDA + .name = "sub_usbc1", + .port = I2C_PORT_SUB_USB_C1, + .kbps = 1000, + .scl = GPIO_EC_I2C_SUB_USB_C1_SCL, + .sda = GPIO_EC_I2C_SUB_USB_C1_SDA }, #endif }; diff --git a/board/moonbuggy/board.c b/board/moonbuggy/board.c index 0ebf1380cb..889f4de898 100644 --- a/board/moonbuggy/board.c +++ b/board/moonbuggy/board.c @@ -135,12 +135,48 @@ const struct pwm_t pwm_channels[] = { /******************************************************************************/ /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { - {"ina", I2C_PORT_INA, 400, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"ppc0", I2C_PORT_PPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"pse", I2C_PORT_PSE, 400, GPIO_I2C4_SCL, GPIO_I2C4_SDA}, - {"power", I2C_PORT_POWER, 400, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "ina", + .port = I2C_PORT_INA, + .kbps = 400, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "ppc0", + .port = I2C_PORT_PPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "pse", + .port = I2C_PORT_PSE, + .kbps = 400, + .scl = GPIO_I2C4_SCL, + .sda = GPIO_I2C4_SDA + }, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 400, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/moonbuggy/board.h b/board/moonbuggy/board.h index 4ec5233f6f..6dfaa73d53 100644 --- a/board/moonbuggy/board.h +++ b/board/moonbuggy/board.h @@ -38,7 +38,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO diff --git a/board/morphius/thermal.c b/board/morphius/thermal.c index 449fd92d5d..329157b6ec 100644 --- a/board/morphius/thermal.c +++ b/board/morphius/thermal.c @@ -495,16 +495,16 @@ void board_override_fan_control(int fan, int *tmp) void thermal_protect(void) { - if ((!lid_is_open()) && (!extpower_is_present())) { - int rv1, rv2; - int thermal_sensor1, thermal_sensor2; + int rv1, rv2; + int thermal_sensor1, thermal_sensor2; - rv1 = temp_sensor_read(TEMP_SENSOR_5V_REGULATOR, - &thermal_sensor1); - rv2 = temp_sensor_read(TEMP_SENSOR_CPU, - &thermal_sensor2); + rv1 = temp_sensor_read(TEMP_SENSOR_5V_REGULATOR, + &thermal_sensor1); + rv2 = temp_sensor_read(TEMP_SENSOR_CPU, + &thermal_sensor2); - if (rv2 == EC_SUCCESS) { + if (rv2 == EC_SUCCESS) { + if ((!lid_is_open()) && (!extpower_is_present())) { if (thermal_sensor2 > C_TO_K(70)) { chipset_throttle_cpu(1); throttle_on = 1; @@ -513,9 +513,17 @@ void thermal_protect(void) chipset_throttle_cpu(0); throttle_on = 0; } + } else { + if (throttle_on == 1) { + chipset_throttle_cpu(0); + throttle_on = 0; + } } - if (rv1 == EC_SUCCESS && - thermal_sensor1 > C_TO_K(51)) + } + + if (rv1 == EC_SUCCESS) { + if ((!lid_is_open()) && (!extpower_is_present()) + && thermal_sensor1 > C_TO_K(51)) chipset_force_shutdown(CHIPSET_SHUTDOWN_THERMAL); } } diff --git a/board/mrbland/board.c b/board/mrbland/board.c index d367b82521..b94717b5a4 100644 --- a/board/mrbland/board.c +++ b/board/mrbland/board.c @@ -107,14 +107,34 @@ static void switchcap_interrupt(enum gpio_signal signal) /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/munna/board.c b/board/munna/board.c index f31c7a7e39..4e8f19eb8b 100644 --- a/board/munna/board.c +++ b/board/munna/board.c @@ -67,13 +67,32 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 2, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 2, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct i2c_port_t i2c_bitbang_ports[] = { - {"battery", 3, 100, GPIO_I2C4_SCL, GPIO_I2C4_SDA, .drv = &bitbang_drv}, + { + .name = "battery", + .port = 3, + .kbps = 100, + .scl = GPIO_I2C4_SCL, + .sda = GPIO_I2C4_SDA, + .drv = &bitbang_drv + }, }; const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); @@ -267,7 +286,7 @@ static void board_spi_enable(void) #ifdef CHIP_FAMILY_STM32L4 /* Set I/O speed before AF configured */ /* EMMC SPI SLAVE: PB13/14/15 */ - /* SENSORS SPI MASTER: PB10, PB12, PC2, PC3 */ + /* SENSORS SPI controller: PB10, PB12, PC2, PC3 */ STM32_GPIO_OSPEEDR(GPIO_B) |= 0xFF300000; STM32_GPIO_OSPEEDR(GPIO_C) |= 0x000000F0; diff --git a/board/munna/board.h b/board/munna/board.h index baf68470e4..96a76b11b5 100644 --- a/board/munna/board.h +++ b/board/munna/board.h @@ -113,7 +113,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/mushu/board.h b/board/mushu/board.h index 493ef442df..aadd49a1bd 100644 --- a/board/mushu/board.h +++ b/board/mushu/board.h @@ -23,7 +23,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_CMD_MFALLOW diff --git a/board/nami/board.c b/board/nami/board.c index 70e85fd83b..d5b585b526 100644 --- a/board/nami/board.c +++ b/board/nami/board.c @@ -218,12 +218,48 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"tcpc0", NPCX_I2C_PORT0_0, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA}, - {"tcpc1", NPCX_I2C_PORT0_1, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA}, - {"battery", NPCX_I2C_PORT1, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"charger", NPCX_I2C_PORT2, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"pmic", NPCX_I2C_PORT2, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"accelgyro", NPCX_I2C_PORT3, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "tcpc0", + .port = NPCX_I2C_PORT0_0, + .kbps = 400, + .scl = GPIO_I2C0_0_SCL, + .sda = GPIO_I2C0_0_SDA + }, + { + .name = "tcpc1", + .port = NPCX_I2C_PORT0_1, + .kbps = 400, + .scl = GPIO_I2C0_1_SCL, + .sda = GPIO_I2C0_1_SDA + }, + { + .name = "battery", + .port = NPCX_I2C_PORT1, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "charger", + .port = NPCX_I2C_PORT2, + .kbps = 100, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "pmic", + .port = NPCX_I2C_PORT2, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "accelgyro", + .port = NPCX_I2C_PORT3, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/nami/board.h b/board/nami/board.h index 1753ec538f..5952b1a754 100644 --- a/board/nami/board.h +++ b/board/nami/board.h @@ -73,7 +73,7 @@ #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define CONFIG_HOSTCMD_FLASH_SPI_INFO diff --git a/board/nautilus/board.c b/board/nautilus/board.c index bcdaf568e7..f08dc20097 100644 --- a/board/nautilus/board.c +++ b/board/nautilus/board.c @@ -137,11 +137,41 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"tcpc0", NPCX_I2C_PORT0_0, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA}, - {"tcpc1", NPCX_I2C_PORT0_1, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA}, - {"charger", NPCX_I2C_PORT1, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"pmic", NPCX_I2C_PORT2, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"accelgyro", NPCX_I2C_PORT3, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "tcpc0", + .port = NPCX_I2C_PORT0_0, + .kbps = 400, + .scl = GPIO_I2C0_0_SCL, + .sda = GPIO_I2C0_0_SDA + }, + { + .name = "tcpc1", + .port = NPCX_I2C_PORT0_1, + .kbps = 400, + .scl = GPIO_I2C0_1_SCL, + .sda = GPIO_I2C0_1_SDA + }, + { + .name = "charger", + .port = NPCX_I2C_PORT1, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "pmic", + .port = NPCX_I2C_PORT2, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "accelgyro", + .port = NPCX_I2C_PORT3, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/nautilus/board.h b/board/nautilus/board.h index 6be7167538..b4a05e46d1 100644 --- a/board/nautilus/board.h +++ b/board/nautilus/board.h @@ -62,7 +62,7 @@ #define CONFIG_CHIPSET_SKYLAKE #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/nightfury/board.h b/board/nightfury/board.h index 86191e104d..9c4ac02934 100644 --- a/board/nightfury/board.h +++ b/board/nightfury/board.h @@ -20,7 +20,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/nipperkin/board.c b/board/nipperkin/board.c index a065dad5c0..8f67dcbf4b 100644 --- a/board/nipperkin/board.c +++ b/board/nipperkin/board.c @@ -16,7 +16,7 @@ #include "driver/retimer/ps8811.h" #include "driver/retimer/ps8818.h" #include "driver/temp_sensor/sb_tsi.h" -#include "driver/temp_sensor/tmp112.h" +#include "driver/temp_sensor/pct2075.h" #include "extpower.h" #include "gpio.h" #include "hooks.h" @@ -28,7 +28,6 @@ #include "tablet_mode.h" #include "temp_sensor.h" #include "temp_sensor/thermistor.h" -#include "temp_sensor/tmp112.h" #include "thermal.h" #include "timer.h" #include "usb_mux.h" @@ -146,7 +145,7 @@ DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); static void board_chipset_startup(void) { if (get_board_version() > 1) - tmp112_init(); + pct2075_init(); } DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); @@ -156,7 +155,7 @@ int board_get_soc_temp_k(int idx, int *temp_k) if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) return EC_ERROR_NOT_POWERED; - return tmp112_get_val_k(idx, temp_k); + return pct2075_get_val_k(idx, temp_k); } int board_get_soc_temp_mk(int *temp_mk) @@ -164,7 +163,7 @@ int board_get_soc_temp_mk(int *temp_mk) if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) return EC_ERROR_NOT_POWERED; - return tmp112_get_val_mk(TMP112_SOC, temp_mk); + return pct2075_get_val_mk(PCT2075_SOC, temp_mk); } int board_get_ambient_temp_mk(int *temp_mk) @@ -172,7 +171,7 @@ int board_get_ambient_temp_mk(int *temp_mk) if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) return EC_ERROR_NOT_POWERED; - return tmp112_get_val_mk(TMP112_AMB, temp_mk); + return pct2075_get_val_mk(PCT2075_AMB, temp_mk); } /* ADC Channels */ @@ -218,18 +217,18 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* Temp Sensors */ static int board_get_temp(int, int *); -const struct tmp112_sensor_t tmp112_sensors[] = { - { I2C_PORT_SENSOR, TMP112_I2C_ADDR_FLAGS0 }, - { I2C_PORT_SENSOR, TMP112_I2C_ADDR_FLAGS1 }, +const struct pct2075_sensor_t pct2075_sensors[] = { + { I2C_PORT_SENSOR, PCT2075_I2C_ADDR_FLAGS0 }, + { I2C_PORT_SENSOR, PCT2075_I2C_ADDR_FLAGS7 }, }; -BUILD_ASSERT(ARRAY_SIZE(tmp112_sensors) == TMP112_COUNT); +BUILD_ASSERT(ARRAY_SIZE(pct2075_sensors) == PCT2075_COUNT); const struct temp_sensor_t temp_sensors[] = { [TEMP_SENSOR_SOC] = { .name = "SOC", .type = TEMP_SENSOR_TYPE_BOARD, .read = board_get_soc_temp_k, - .idx = TMP112_SOC, + .idx = PCT2075_SOC, }, [TEMP_SENSOR_CHARGER] = { .name = "Charger", @@ -258,8 +257,8 @@ const struct temp_sensor_t temp_sensors[] = { [TEMP_SENSOR_AMBIENT] = { .name = "Ambient", .type = TEMP_SENSOR_TYPE_BOARD, - .read = tmp112_get_val_k, - .idx = TMP112_AMB, + .read = pct2075_get_val_k, + .idx = PCT2075_AMB, }, }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); diff --git a/board/nipperkin/board.h b/board/nipperkin/board.h index f9495857d5..6521188c20 100644 --- a/board/nipperkin/board.h +++ b/board/nipperkin/board.h @@ -40,6 +40,9 @@ #define CONFIG_LED_COMMON #define CONFIG_LED_ONOFF_STATES +/* Thermal Config */ +#define CONFIG_TEMP_SENSOR_PCT2075 + #ifndef __ASSEMBLER__ #include "gpio_signal.h" @@ -73,6 +76,13 @@ enum temp_sensor_id { TEMP_SENSOR_COUNT }; +/* PCT2075 sensors */ +enum pct2075_sensor { + PCT2075_SOC, + PCT2075_AMB, + PCT2075_COUNT, +}; + #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BOARD_H */ diff --git a/board/nocturne/board.c b/board/nocturne/board.c index 5987bae025..7cdebfe18b 100644 --- a/board/nocturne/board.c +++ b/board/nocturne/board.c @@ -133,26 +133,43 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); /* I2C port map */ const struct i2c_port_t i2c_ports[] = { { - "battery", I2C_PORT_BATTERY, 100, GPIO_EC_I2C4_BATTERY_SCL, - GPIO_EC_I2C4_BATTERY_SDA + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_EC_I2C4_BATTERY_SCL, + .sda = GPIO_EC_I2C4_BATTERY_SDA }, { - "power", I2C_PORT_POWER, 100, GPIO_EC_I2C0_POWER_SCL, - GPIO_EC_I2C0_POWER_SDA + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C0_POWER_SCL, + .sda = GPIO_EC_I2C0_POWER_SDA }, { - "als_gyro", I2C_PORT_ALS_GYRO, 400, GPIO_EC_I2C5_ALS_GYRO_SCL, - GPIO_EC_I2C5_ALS_GYRO_SDA + .name = "als_gyro", + .port = I2C_PORT_ALS_GYRO, + .kbps = 400, + .scl = GPIO_EC_I2C5_ALS_GYRO_SCL, + .sda = GPIO_EC_I2C5_ALS_GYRO_SDA }, { - "usbc0", I2C_PORT_USB_C0, 100, GPIO_USB_C0_SCL, GPIO_USB_C0_SDA + .name = "usbc0", + .port = I2C_PORT_USB_C0, + .kbps = 100, + .scl = GPIO_USB_C0_SCL, + .sda = GPIO_USB_C0_SDA }, { - "usbc1", I2C_PORT_USB_C1, 100, GPIO_USB_C1_SCL, GPIO_USB_C1_SDA + .name = "usbc1", + .port = I2C_PORT_USB_C1, + .kbps = 100, + .scl = GPIO_USB_C1_SCL, + .sda = GPIO_USB_C1_SDA }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/nocturne/board.h b/board/nocturne/board.h index 70da6ac3ae..7f44e0d48e 100644 --- a/board/nocturne/board.h +++ b/board/nocturne/board.h @@ -30,7 +30,7 @@ /* EC modules */ #define CONFIG_ADC #define CONFIG_BACKLIGHT_LID -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_I2C #define CONFIG_I2C_BUS_MAY_BE_UNPOWERED #define CONFIG_I2C_CONTROLLER diff --git a/board/nocturne_fp/board_rw.c b/board/nocturne_fp/board_rw.c index 0a7b38b97d..abc6bf88d8 100644 --- a/board/nocturne_fp/board_rw.c +++ b/board/nocturne_fp/board_rw.c @@ -86,7 +86,9 @@ static void spi_configure(enum fp_sensor_spi_select spi_select) gpio_config_module(MODULE_SPI_CONTROLLER, 1); } - /* Set all SPI master signal pins to very high speed: pins E2/4/5/6 */ + /* Set all SPI controller signal pins to very high speed: + * pins E2/4/5/6 + */ STM32_GPIO_OSPEEDR(GPIO_E) |= 0x00003f30; /* Enable clocks to SPI4 module (master) */ STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI4; @@ -125,7 +127,7 @@ void board_init(void) gpio_enable_interrupt(GPIO_SLP_L); /* - * Enable the SPI slave interface if the PCH is up. + * Enable the SPI peripheral interface if the PCH is up. * Do not use hook_call_deferred(), because ap_deferred() will be * called after tasks with priority higher than HOOK task (very late). */ diff --git a/board/npcx7_evb/board.c b/board/npcx7_evb/board.c index 9ddaf9bd51..7909668d2c 100644 --- a/board/npcx7_evb/board.c +++ b/board/npcx7_evb/board.c @@ -82,11 +82,41 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master0-0", NPCX_I2C_PORT0_0, 100, GPIO_I2C0_SCL0, GPIO_I2C0_SDA0}, - {"master1-0", NPCX_I2C_PORT1_0, 100, GPIO_I2C1_SCL0, GPIO_I2C1_SDA0}, - {"master2-0", NPCX_I2C_PORT2_0, 100, GPIO_I2C2_SCL0, GPIO_I2C2_SDA0}, - {"master3-0", NPCX_I2C_PORT3_0, 100, GPIO_I2C3_SCL0, GPIO_I2C3_SDA0}, - {"master7-0", NPCX_I2C_PORT7_0, 100, GPIO_I2C7_SCL0, GPIO_I2C7_SDA0}, + { + .name = "master0-0", + .port = NPCX_I2C_PORT0_0, + .kbps = 100, + .scl = GPIO_I2C0_SCL0, + .sda = GPIO_I2C0_SDA0 + }, + { + .name = "master1-0", + .port = NPCX_I2C_PORT1_0, + .kbps = 100, + .scl = GPIO_I2C1_SCL0, + .sda = GPIO_I2C1_SDA0 + }, + { + .name = "master2-0", + .port = NPCX_I2C_PORT2_0, + .kbps = 100, + .scl = GPIO_I2C2_SCL0, + .sda = GPIO_I2C2_SDA0 + }, + { + .name = "master3-0", + .port = NPCX_I2C_PORT3_0, + .kbps = 100, + .scl = GPIO_I2C3_SCL0, + .sda = GPIO_I2C3_SDA0 + }, + { + .name = "master7-0", + .port = NPCX_I2C_PORT7_0, + .kbps = 100, + .scl = GPIO_I2C7_SCL0, + .sda = GPIO_I2C7_SDA0 + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/npcx7_evb/board.h b/board/npcx7_evb/board.h index 4bad61b152..ab8b850d94 100644 --- a/board/npcx7_evb/board.h +++ b/board/npcx7_evb/board.h @@ -28,7 +28,7 @@ #define CONFIG_SPI #define CONFIG_I2C /* Features of eSPI */ -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 diff --git a/board/npcx9_evb/board.c b/board/npcx9_evb/board.c index 8bfc053fa5..b412fe8b30 100644 --- a/board/npcx9_evb/board.c +++ b/board/npcx9_evb/board.c @@ -103,11 +103,41 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master0-0", NPCX_I2C_PORT0_0, 100, GPIO_I2C0_SCL0, GPIO_I2C0_SDA0}, - {"master1-0", NPCX_I2C_PORT1_0, 100, GPIO_I2C1_SCL0, GPIO_I2C1_SDA0}, - {"master2-0", NPCX_I2C_PORT2_0, 100, GPIO_I2C2_SCL0, GPIO_I2C2_SDA0}, - {"master3-0", NPCX_I2C_PORT3_0, 100, GPIO_I2C3_SCL0, GPIO_I2C3_SDA0}, - {"master7-0", NPCX_I2C_PORT7_0, 100, GPIO_I2C7_SCL0, GPIO_I2C7_SDA0}, + { + .name = "master0-0", + .port = NPCX_I2C_PORT0_0, + .kbps = 100, + .scl = GPIO_I2C0_SCL0, + .sda = GPIO_I2C0_SDA0 + }, + { + .name = "master1-0", + .port = NPCX_I2C_PORT1_0, + .kbps = 100, + .scl = GPIO_I2C1_SCL0, + .sda = GPIO_I2C1_SDA0 + }, + { + .name = "master2-0", + .port = NPCX_I2C_PORT2_0, + .kbps = 100, + .scl = GPIO_I2C2_SCL0, + .sda = GPIO_I2C2_SDA0 + }, + { + .name = "master3-0", + .port = NPCX_I2C_PORT3_0, + .kbps = 100, + .scl = GPIO_I2C3_SCL0, + .sda = GPIO_I2C3_SDA0 + }, + { + .name = "master7-0", + .port = NPCX_I2C_PORT7_0, + .kbps = 100, + .scl = GPIO_I2C7_SCL0, + .sda = GPIO_I2C7_SDA0 + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/npcx9_evb/board.h b/board/npcx9_evb/board.h index e7e1190480..a0d209c938 100644 --- a/board/npcx9_evb/board.h +++ b/board/npcx9_evb/board.h @@ -13,7 +13,7 @@ #define CONFIG_PWM #define CONFIG_I2C /* Features of eSPI */ -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 diff --git a/board/npcx_evb/board.c b/board/npcx_evb/board.c index 61e0665b7f..ee448bbbd2 100644 --- a/board/npcx_evb/board.c +++ b/board/npcx_evb/board.c @@ -101,11 +101,41 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master0-0", NPCX_I2C_PORT0_0, 100, GPIO_I2C0_SCL0, GPIO_I2C0_SDA0}, - {"master0-1", NPCX_I2C_PORT0_1, 100, GPIO_I2C0_SCL1, GPIO_I2C0_SDA1}, - {"master1", NPCX_I2C_PORT1, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"master2", NPCX_I2C_PORT2, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"master3", NPCX_I2C_PORT3, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "master0-0", + .port = NPCX_I2C_PORT0_0, + .kbps = 100, + .scl = GPIO_I2C0_SCL0, + .sda = GPIO_I2C0_SDA0 + }, + { + .name = "master0-1", + .port = NPCX_I2C_PORT0_1, + .kbps = 100, + .scl = GPIO_I2C0_SCL1, + .sda = GPIO_I2C0_SDA1 + }, + { + .name = "master1", + .port = NPCX_I2C_PORT1, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "master2", + .port = NPCX_I2C_PORT2, + .kbps = 100, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "master3", + .port = NPCX_I2C_PORT3, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/npcx_evb/board.h b/board/npcx_evb/board.h index fc12b6d80a..5a22435396 100644 --- a/board/npcx_evb/board.h +++ b/board/npcx_evb/board.h @@ -12,7 +12,7 @@ #define CONFIG_ADC #define CONFIG_PWM #define CONFIG_SPI -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_PECI /* Optional features */ diff --git a/board/npcx_evb_arm/board.c b/board/npcx_evb_arm/board.c index 4ee03e7a00..abb6e2279b 100644 --- a/board/npcx_evb_arm/board.c +++ b/board/npcx_evb_arm/board.c @@ -79,11 +79,41 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master0-0", NPCX_I2C_PORT0_0, 100, GPIO_I2C0_SCL0, GPIO_I2C0_SDA0}, - {"master0-1", NPCX_I2C_PORT0_1, 100, GPIO_I2C0_SCL1, GPIO_I2C0_SDA1}, - {"master1", NPCX_I2C_PORT1, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"master2", NPCX_I2C_PORT2, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"master3", NPCX_I2C_PORT3, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "master0-0", + .port = NPCX_I2C_PORT0_0, + .kbps = 100, + .scl = GPIO_I2C0_SCL0, + .sda = GPIO_I2C0_SDA0 + }, + { + .name = "master0-1", + .port = NPCX_I2C_PORT0_1, + .kbps = 100, + .scl = GPIO_I2C0_SCL1, + .sda = GPIO_I2C0_SDA1 + }, + { + .name = "master1", + .port = NPCX_I2C_PORT1, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "master2", + .port = NPCX_I2C_PORT2, + .kbps = 100, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "master3", + .port = NPCX_I2C_PORT3, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/npcx_evb_arm/board.h b/board/npcx_evb_arm/board.h index c3fd341365..a56cec9783 100644 --- a/board/npcx_evb_arm/board.h +++ b/board/npcx_evb_arm/board.h @@ -11,7 +11,7 @@ /* Optional modules */ #define CONFIG_ADC #define CONFIG_PWM -#define CONFIG_HOSTCMD_SHI /* Used in ARM-based platform for host interface */ +#define CONFIG_HOST_INTERFACE_SHI /* ARM-based platform for host interface */ /* Optional features */ #define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands for testing */ diff --git a/board/nucleo-dartmonkey/board.c b/board/nucleo-dartmonkey/board.c index a7851ec00b..ea0d11eaf5 100644 --- a/board/nucleo-dartmonkey/board.c +++ b/board/nucleo-dartmonkey/board.c @@ -76,7 +76,9 @@ static void spi_configure(void) { /* Configure SPI GPIOs */ gpio_config_module(MODULE_SPI_CONTROLLER, 1); - /* Set all SPI master signal pins to very high speed: pins E2/4/5/6 */ + /* Set all SPI controller signal pins to very high speed: + * pins E2/4/5/6 + */ STM32_GPIO_OSPEEDR(GPIO_E) |= 0x00003f30; /* Enable clocks to SPI4 module (master) */ STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI4; @@ -97,7 +99,7 @@ static void board_init(void) gpio_enable_interrupt(GPIO_SLP_L); /* - * Enable the SPI slave interface if the PCH is up. + * Enable the SPI peripheral interface if the PCH is up. * Do not use hook_call_deferred(), because ap_deferred() will be * called after tasks with priority higher than HOOK task (very late). */ diff --git a/board/nucleo-f072rb/board.c b/board/nucleo-f072rb/board.c index 66e8960ce7..078af171cb 100644 --- a/board/nucleo-f072rb/board.c +++ b/board/nucleo-f072rb/board.c @@ -39,7 +39,13 @@ DECLARE_HOOK(HOOK_TICK, tick_event, HOOK_PRIO_DEFAULT); #ifdef CTS_MODULE_I2C const struct i2c_port_t i2c_ports[] = { - {"test", STM32_I2C1_PORT, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, + { + .name = "test", + .port = STM32_I2C1_PORT, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/nucleo-f411re/board.c b/board/nucleo-f411re/board.c index 074507e039..96e7fefb69 100644 --- a/board/nucleo-f411re/board.c +++ b/board/nucleo-f411re/board.c @@ -52,8 +52,13 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 100, - GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA}, + { + .name = "master", + .port = I2C_PORT_MASTER, + .kbps = 100, + .scl = GPIO_MASTER_I2C_SCL, + .sda = GPIO_MASTER_I2C_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/nucleo-f412zg/board.c b/board/nucleo-f412zg/board.c index 4324101da9..da3b4a3d4d 100644 --- a/board/nucleo-f412zg/board.c +++ b/board/nucleo-f412zg/board.c @@ -60,7 +60,7 @@ static void board_init(void) gpio_enable_interrupt(GPIO_PCH_SLP_S0_L); /* - * Enable the SPI slave interface if the PCH is up. + * Enable the SPI peripheral interface if the PCH is up. * Do not use hook_call_deferred(), because ap_deferred() will be * called after tasks with priority higher than HOOK task (very late). */ diff --git a/board/nucleo-h743zi/board.c b/board/nucleo-h743zi/board.c index f1493658aa..c69a456425 100644 --- a/board/nucleo-h743zi/board.c +++ b/board/nucleo-h743zi/board.c @@ -60,7 +60,7 @@ static void board_init(void) gpio_enable_interrupt(GPIO_PCH_SLP_S0_L); /* - * Enable the SPI slave interface if the PCH is up. + * Enable the SPI peripheral interface if the PCH is up. * Do not use hook_call_deferred(), because ap_deferred() will be * called after tasks with priority higher than HOOK task (very late). */ diff --git a/board/nuwani/board.c b/board/nuwani/board.c index 8004e25b37..af8409926d 100644 --- a/board/nuwani/board.c +++ b/board/nuwani/board.c @@ -32,11 +32,41 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /* I2C port map. */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"thermal", I2C_PORT_THERMAL_AP, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "thermal", + .port = I2C_PORT_THERMAL_AP, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/oak/board.c b/board/oak/board.c index e8eba6d45b..0275981446 100644 --- a/board/oak/board.c +++ b/board/oak/board.c @@ -97,8 +97,20 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"battery", I2C_PORT_BATTERY, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"pd", I2C_PORT_PD_MCU, 1000, GPIO_I2C1_SCL, GPIO_I2C1_SDA} + { + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "pd", + .port = I2C_PORT_PD_MCU, + .kbps = 1000, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + } }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/oak/board.h b/board/oak/board.h index e82907a508..2c30e6185e 100644 --- a/board/oak/board.h +++ b/board/oak/board.h @@ -163,7 +163,7 @@ #define I2C_PORT_TCPC 1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* First SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* First SPI controller port (SPI2) */ /* Ambient Light Sensor address */ #define OPT3001_I2C_ADDR_FLAGS OPT3001_I2C_ADDR1_FLAGS diff --git a/board/palkia/board.h b/board/palkia/board.h index 010bfb908b..510c5aa6da 100644 --- a/board/palkia/board.h +++ b/board/palkia/board.h @@ -16,7 +16,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/pazquel/board.c b/board/pazquel/board.c index 8d7e679190..366167d7e6 100644 --- a/board/pazquel/board.c +++ b/board/pazquel/board.c @@ -141,16 +141,41 @@ __override struct keyboard_scan_config keyscan_config = { /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 1000, GPIO_EC_I2C_USB_C1_PD_SCL, - GPIO_EC_I2C_USB_C1_PD_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/pdeval-stm32f072/board.c b/board/pdeval-stm32f072/board.c index 8c62c10b79..525f14a4af 100644 --- a/board/pdeval-stm32f072/board.c +++ b/board/pdeval-stm32f072/board.c @@ -53,7 +53,13 @@ void board_reset_pd_mcu(void) /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"tcpc", I2C_PORT_TCPC, 400 /* kHz */, GPIO_I2C0_SCL, GPIO_I2C0_SDA} + { + .name = "tcpc", + .port = I2C_PORT_TCPC, + .kbps = 400 /* kHz */, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + } }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/pico/board.c b/board/pico/board.c index e930c7c998..fbb21be654 100644 --- a/board/pico/board.c +++ b/board/pico/board.c @@ -207,9 +207,27 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", IT83XX_I2C_CH_C, 400, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, - {"sensor", IT83XX_I2C_CH_B, 400, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, - {"battery", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, + { + .name = "typec", + .port = IT83XX_I2C_CH_C, + .kbps = 400, + .scl = GPIO_I2C_C_SCL, + .sda = GPIO_I2C_C_SDA + }, + { + .name = "sensor", + .port = IT83XX_I2C_CH_B, + .kbps = 400, + .scl = GPIO_I2C_B_SCL, + .sda = GPIO_I2C_B_SDA + }, + { + .name = "battery", + .port = IT83XX_I2C_CH_A, + .kbps = 100, + .scl = GPIO_I2C_A_SCL, + .sda = GPIO_I2C_A_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/plankton/board.c b/board/plankton/board.c index a361f5fff3..5a62f63c86 100644 --- a/board/plankton/board.c +++ b/board/plankton/board.c @@ -460,8 +460,13 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 100, - GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA}, + { + .name = "master", + .port = I2C_PORT_MASTER, + .kbps = 100, + .scl = GPIO_MASTER_I2C_SCL, + .sda = GPIO_MASTER_I2C_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/pompom/board.c b/board/pompom/board.c index 855a8c305d..f961a12921 100644 --- a/board/pompom/board.c +++ b/board/pompom/board.c @@ -129,14 +129,34 @@ __override struct keyboard_scan_config keyscan_config = { /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/poppy/board.c b/board/poppy/board.c index 2124faa421..9dc0250e80 100644 --- a/board/poppy/board.c +++ b/board/poppy/board.c @@ -179,11 +179,41 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"tcpc", NPCX_I2C_PORT0_0, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA}, - {"als", NPCX_I2C_PORT0_1, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA}, - {"charger", NPCX_I2C_PORT1, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"pmic", NPCX_I2C_PORT2, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"accelgyro", NPCX_I2C_PORT3, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "tcpc", + .port = NPCX_I2C_PORT0_0, + .kbps = 400, + .scl = GPIO_I2C0_0_SCL, + .sda = GPIO_I2C0_0_SDA + }, + { + .name = "als", + .port = NPCX_I2C_PORT0_1, + .kbps = 400, + .scl = GPIO_I2C0_1_SCL, + .sda = GPIO_I2C0_1_SDA + }, + { + .name = "charger", + .port = NPCX_I2C_PORT1, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "pmic", + .port = NPCX_I2C_PORT2, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "accelgyro", + .port = NPCX_I2C_PORT3, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/poppy/board.h b/board/poppy/board.h index 98fcfdbfa9..ca287c7c6e 100644 --- a/board/poppy/board.h +++ b/board/poppy/board.h @@ -63,7 +63,7 @@ #define CONFIG_CHIPSET_SKYLAKE #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/primus/ec.tasklist b/board/primus/ec.tasklist index 2a9c288ee6..bf2ec04c62 100644 --- a/board/primus/ec.tasklist +++ b/board/primus/ec.tasklist @@ -18,6 +18,7 @@ TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ diff --git a/board/primus/fans.c b/board/primus/fans.c index d966056331..001c6fde5c 100644 --- a/board/primus/fans.c +++ b/board/primus/fans.c @@ -31,15 +31,12 @@ static const struct fan_conf fan_conf_0 = { }; /* - * TOOD(b/180681346): need to update for real fan - * - * Prototype fan spins at about 7200 RPM at 100% PWM. - * Set minimum at around 30% PWM. + * Set maximum rpm at 4800/ minimum rpm at 1800. */ static const struct fan_rpm fan_rpm_0 = { - .rpm_min = 2200, - .rpm_start = 2200, - .rpm_max = 7200, + .rpm_min = 1800, + .rpm_start = 1800, + .rpm_max = 4800, }; const struct fan_t fans[FAN_CH_COUNT] = { diff --git a/board/puff/board.c b/board/puff/board.c index b30ca74221..bf22657bf4 100644 --- a/board/puff/board.c +++ b/board/puff/board.c @@ -288,11 +288,41 @@ const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { /******************************************************************************/ /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { - {"ina", I2C_PORT_INA, 400, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"ppc0", I2C_PORT_PPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"power", I2C_PORT_POWER, 400, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "ina", + .port = I2C_PORT_INA, + .kbps = 400, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "ppc0", + .port = I2C_PORT_PPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 400, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/puff/board.h b/board/puff/board.h index 9330d128ef..2fcbea6d61 100644 --- a/board/puff/board.h +++ b/board/puff/board.h @@ -38,7 +38,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO diff --git a/board/quackingstick/board.c b/board/quackingstick/board.c index 11fbb6cb12..3ab1d69c2e 100644 --- a/board/quackingstick/board.c +++ b/board/quackingstick/board.c @@ -102,14 +102,34 @@ static void board_connect_c0_sbu(enum gpio_signal s) /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/quiche/board.c b/board/quiche/board.c index e49b2e1b1a..76004ee37e 100644 --- a/board/quiche/board.c +++ b/board/quiche/board.c @@ -345,6 +345,30 @@ int dock_get_mf_preference(void) return mf; } +static void board_usb_tc_connect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* + * The EC needs to indicate to the MST hub when the host port is + * attached. GPIO_UFP_PLUG_DET is used for this purpose. + */ + if (port == USB_PD_PORT_HOST) + gpio_set_level(GPIO_UFP_PLUG_DET, 0); +} +DECLARE_HOOK(HOOK_USB_PD_CONNECT, board_usb_tc_connect, HOOK_PRIO_DEFAULT); + +static void board_usb_tc_disconnect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* Only the host port disconnect is relevant */ + if (port == USB_PD_PORT_HOST) + gpio_set_level(GPIO_UFP_PLUG_DET, 1); +} +DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, board_usb_tc_disconnect, \ + HOOK_PRIO_DEFAULT); + #endif /* SECTION_IS_RW */ static void board_init(void) diff --git a/board/rainier/board.c b/board/rainier/board.c index 0f9c388399..15fbfeb8ef 100644 --- a/board/rainier/board.c +++ b/board/rainier/board.c @@ -72,7 +72,13 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/rainier/board.h b/board/rainier/board.h index a323a90889..a980afba50 100644 --- a/board/rainier/board.h +++ b/board/rainier/board.h @@ -128,7 +128,7 @@ #define I2C_PORT_TCPC0 1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_MKBP_INPUT_DEVICES #define CONFIG_MKBP_EVENT diff --git a/board/rammus/board.c b/board/rammus/board.c index c4e32a9791..2f45cf6d41 100644 --- a/board/rammus/board.c +++ b/board/rammus/board.c @@ -142,11 +142,41 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"i2c_0_0", NPCX_I2C_PORT0_0, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA}, - {"i2c_0_1", NPCX_I2C_PORT0_1, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA}, - {"i2c_1", NPCX_I2C_PORT1, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"i2c_2", NPCX_I2C_PORT2, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"i2c_3", NPCX_I2C_PORT3, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + { + .name = "i2c_0_0", + .port = NPCX_I2C_PORT0_0, + .kbps = 400, + .scl = GPIO_I2C0_0_SCL, + .sda = GPIO_I2C0_0_SDA + }, + { + .name = "i2c_0_1", + .port = NPCX_I2C_PORT0_1, + .kbps = 400, + .scl = GPIO_I2C0_1_SCL, + .sda = GPIO_I2C0_1_SDA + }, + { + .name = "i2c_1", + .port = NPCX_I2C_PORT1, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "i2c_2", + .port = NPCX_I2C_PORT2, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "i2c_3", + .port = NPCX_I2C_PORT3, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/rammus/board.h b/board/rammus/board.h index c084d98fb0..24df8218ca 100644 --- a/board/rammus/board.h +++ b/board/rammus/board.h @@ -58,7 +58,7 @@ #define CONFIG_CHIPSET_SKYLAKE #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define CONFIG_HOSTCMD_FLASH_SPI_INFO diff --git a/board/redrix/board.h b/board/redrix/board.h index fa6a5b7dd5..a4ecc90eed 100644 --- a/board/redrix/board.h +++ b/board/redrix/board.h @@ -19,6 +19,9 @@ */ #define CONFIG_HIBERNATE_PSL_VCC1_RST_WAKEUP +/* Chipset */ +#define CONFIG_CHIPSET_RESUME_INIT_HOOK + /* Sensors */ #define CONFIG_ACCEL_BMA255 /* Lid accel */ #define CONFIG_ACCELGYRO_LSM6DSM /* Base accel */ diff --git a/board/redrix/ec.tasklist b/board/redrix/ec.tasklist index 769b73d365..cfc1fea6ea 100644 --- a/board/redrix/ec.tasklist +++ b/board/redrix/ec.tasklist @@ -20,6 +20,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ diff --git a/board/redrix/fw_config.h b/board/redrix/fw_config.h index 6480f07b35..9a73890f7d 100644 --- a/board/redrix/fw_config.h +++ b/board/redrix/fw_config.h @@ -3,8 +3,8 @@ * found in the LICENSE file. */ -#ifndef __BOARD_BRYA_FW_CONFIG_H_ -#define __BOARD_BRYA_FW_CONFIG_H_ +#ifndef __BOARD_REDRIX_FW_CONFIG_H_ +#define __BOARD_REDRIX_FW_CONFIG_H_ #include <stdint.h> @@ -52,4 +52,4 @@ union redrix_cbi_fw_config get_fw_config(void); */ bool ec_cfg_has_eps(void); -#endif /* __BOARD_BRYA_FW_CONFIG_H_ */ +#endif /* __BOARD_REDRIX_FW_CONFIG_H_ */ diff --git a/board/redrix/usbc_config.c b/board/redrix/usbc_config.c index 00b6589a46..aae3a4493b 100644 --- a/board/redrix/usbc_config.c +++ b/board/redrix/usbc_config.c @@ -208,12 +208,16 @@ static void board_tcpc_init(void) int i; /* Don't reset TCPCs after initial reset */ - if (!system_jumped_late()) { + if (!system_jumped_late()) board_reset_pd_mcu(); - for (i = 0; i < CONFIG_IO_EXPANDER_PORT_COUNT; ++i) - ioex_init(i); - } + /* + * These IO expander pins are implemented using the + * C0/C1 TCPCs, so they must be set up after the TCPCs has + * been taken out of reset. + */ + for (i = 0; i < CONFIG_IO_EXPANDER_PORT_COUNT; ++i) + ioex_init(i); /* Enable PPC interrupts. */ gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); diff --git a/board/reef/board.c b/board/reef/board.c index ed8e83d0a8..92ff6a7764 100644 --- a/board/reef/board.c +++ b/board/reef/board.c @@ -147,16 +147,41 @@ const struct pwm_t pwm_channels[] = { BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); const struct i2c_port_t i2c_ports[] = { - {"tcpc0", NPCX_I2C_PORT0_0, 400, - GPIO_EC_I2C_USB_C0_PD_SCL, GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", NPCX_I2C_PORT0_1, 400, - GPIO_EC_I2C_USB_C1_PD_SCL, GPIO_EC_I2C_USB_C1_PD_SDA}, - {"accelgyro", I2C_PORT_GYRO, 400, - GPIO_EC_I2C_GYRO_SCL, GPIO_EC_I2C_GYRO_SDA}, - {"sensors", NPCX_I2C_PORT2, 400, - GPIO_EC_I2C_SENSOR_SCL, GPIO_EC_I2C_SENSOR_SDA}, - {"batt", NPCX_I2C_PORT3, 100, - GPIO_EC_I2C_POWER_SCL, GPIO_EC_I2C_POWER_SDA}, + { + .name = "tcpc0", + .port = NPCX_I2C_PORT0_0, + .kbps = 400, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = NPCX_I2C_PORT0_1, + .kbps = 400, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "accelgyro", + .port = I2C_PORT_GYRO, + .kbps = 400, + .scl = GPIO_EC_I2C_GYRO_SCL, + .sda = GPIO_EC_I2C_GYRO_SDA + }, + { + .name = "sensors", + .port = NPCX_I2C_PORT2, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, + { + .name = "batt", + .port = NPCX_I2C_PORT3, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/reef/board.h b/board/reef/board.h index 6b05bbc1ed..00544f7bf9 100644 --- a/board/reef/board.h +++ b/board/reef/board.h @@ -102,7 +102,7 @@ #define CONFIG_USBC_VCONN_SWAP /* SoC / PCH */ -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_CHIPSET_APOLLOLAKE #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_POWER_BUTTON diff --git a/board/reef/gpio.inc b/board/reef/gpio.inc index 5bf83f88bc..f508d7a84e 100644 --- a/board/reef/gpio.inc +++ b/board/reef/gpio.inc @@ -67,7 +67,8 @@ GPIO(EC_I2C_POWER_SCL, PIN(D, 1), GPIO_INPUT) * Pin 57 (SER_IRQ) defaults to LPC mode, but we also have EC_PCH_KB_INT_ODL * (Pin B0) in case it doesn't work (Set CONFIG_KEYBOARD_IRQ_GPIO in this case). * - * See also the NO_LPC_ESPI bit in DEVALT1 and the CONFIG_HOSTCMD_SHI option. + * See also the NO_LPC_ESPI bit in DEVALT1 and the + * CONFIG_HOST_INTERFACE_SHI option. */ GPIO(PCH_SMI_L, PIN(A, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_SMI_ODL */ diff --git a/board/reef_it8320/board.c b/board/reef_it8320/board.c index 92fdc66806..d965b53593 100644 --- a/board/reef_it8320/board.c +++ b/board/reef_it8320/board.c @@ -66,10 +66,20 @@ const struct adc_t adc_channels[] = { BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); const struct i2c_port_t i2c_ports[] = { - {"mux", IT83XX_I2C_CH_C, 400, - GPIO_EC_I2C_C_SCL, GPIO_EC_I2C_C_SDA}, - {"batt", IT83XX_I2C_CH_E, 100, - GPIO_EC_I2C_E_SCL, GPIO_EC_I2C_E_SDA}, + { + .name = "mux", + .port = IT83XX_I2C_CH_C, + .kbps = 400, + .scl = GPIO_EC_I2C_C_SCL, + .sda = GPIO_EC_I2C_C_SDA + }, + { + .name = "batt", + .port = IT83XX_I2C_CH_E, + .kbps = 100, + .scl = GPIO_EC_I2C_E_SCL, + .sda = GPIO_EC_I2C_E_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/reef_it8320/board.h b/board/reef_it8320/board.h index 3598aee233..cf29faa8f8 100644 --- a/board/reef_it8320/board.h +++ b/board/reef_it8320/board.h @@ -99,7 +99,7 @@ #define CONFIG_USBC_VCONN_SWAP /* SoC / PCH */ -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_CHIPSET_APOLLOLAKE #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_POWER_BUTTON diff --git a/board/reef_it8320/gpio.inc b/board/reef_it8320/gpio.inc index 9882065d50..ac2fbf486e 100644 --- a/board/reef_it8320/gpio.inc +++ b/board/reef_it8320/gpio.inc @@ -20,7 +20,7 @@ GPIO_INT(PCH_SLP_S0_L, PIN(B, 7), GPIO_INT_BOTH, power_signal_interrupt) /* #endif GPIO_INT(SUSPWRDNACK, PIN(E, 1), GPIO_INT_BOTH, power_signal_interrupt) /* SUSPWRNACK */ GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH, lid_interrupt) /* LID_OPEN */ -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(PCH_PLTRST_L, PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) /* PLT_RST_L */ #endif GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH, power_button_interrupt) /* MECH_PWR_BTN_ODL */ diff --git a/board/reef_mchp/board.c b/board/reef_mchp/board.c index b934264510..be24f34aa8 100644 --- a/board/reef_mchp/board.c +++ b/board/reef_mchp/board.c @@ -205,16 +205,41 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); * 400 to 100 kHz. */ const struct i2c_port_t i2c_ports[] = { - {"tcpc0", MCHP_I2C_PORT0, 400, - GPIO_EC_I2C_USB_C0_PD_SCL, GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", MCHP_I2C_PORT2, 400, - GPIO_EC_I2C_USB_C1_PD_SCL, GPIO_EC_I2C_USB_C1_PD_SDA}, - {"accelgyro", I2C_PORT_GYRO, 400, - GPIO_EC_I2C_GYRO_SCL, GPIO_EC_I2C_GYRO_SDA}, - {"sensors", MCHP_I2C_PORT7, 400, - GPIO_EC_I2C_SENSOR_SCL, GPIO_EC_I2C_SENSOR_SDA}, - {"batt", MCHP_I2C_PORT3, 100, - GPIO_EC_I2C_POWER_SCL, GPIO_EC_I2C_POWER_SDA}, + { + .name = "tcpc0", + .port = MCHP_I2C_PORT0, + .kbps = 400, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = MCHP_I2C_PORT2, + .kbps = 400, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "accelgyro", + .port = I2C_PORT_GYRO, + .kbps = 400, + .scl = GPIO_EC_I2C_GYRO_SCL, + .sda = GPIO_EC_I2C_GYRO_SDA + }, + { + .name = "sensors", + .port = MCHP_I2C_PORT7, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, + { + .name = "batt", + .port = MCHP_I2C_PORT3, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/reef_mchp/board.h b/board/reef_mchp/board.h index 5e31c5de98..5ae0cdf214 100644 --- a/board/reef_mchp/board.h +++ b/board/reef_mchp/board.h @@ -104,7 +104,7 @@ #define CONFIG_USBC_VCONN_SWAP /* SoC / PCH */ -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_CHIPSET_APOLLOLAKE #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_POWER_BUTTON diff --git a/board/reef_mchp/gpio.inc b/board/reef_mchp/gpio.inc index 0385d82102..3274af3bff 100644 --- a/board/reef_mchp/gpio.inc +++ b/board/reef_mchp/gpio.inc @@ -84,7 +84,8 @@ GPIO(EC_I2C_POWER_SCL, PIN(010), GPIO_INPUT) * Pin 57 (SER_IRQ) defaults to LPC mode, but we also have EC_PCH_KB_INT_ODL * (Pin B0) in case it doesn't work (Set CONFIG_KEYBOARD_IRQ_GPIO in this case). * - * See also the NO_LPC_ESPI bit in DEVALT1 and the CONFIG_HOSTCMD_SHI option. + * See also the NO_LPC_ESPI bit in DEVALT1 and the + * CONFIG_HOST_INTERFACE_SHI option. */ GPIO(PCH_SMI_L, PIN(0227), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_SMI_ODL */ diff --git a/board/scarlet/board.c b/board/scarlet/board.c index f109d0ada3..3120ef1efb 100644 --- a/board/scarlet/board.c +++ b/board/scarlet/board.c @@ -75,8 +75,20 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"charger", I2C_PORT_CHARGER, 400, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, + { + .name = "charger", + .port = I2C_PORT_CHARGER, + .kbps = 400, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/scarlet/board.h b/board/scarlet/board.h index f8d1ba7011..5f5e1ef4bb 100644 --- a/board/scarlet/board.h +++ b/board/scarlet/board.h @@ -186,7 +186,7 @@ #define VIRTUAL_BATTERY_ADDR_FLAGS 0x0B /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_MKBP_INPUT_DEVICES #define CONFIG_MKBP_EVENT diff --git a/board/scout/board.c b/board/scout/board.c index d45b627ce1..b26f581f58 100644 --- a/board/scout/board.c +++ b/board/scout/board.c @@ -233,12 +233,48 @@ const struct pwm_t pwm_channels[] = { /******************************************************************************/ /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { - {"ina", I2C_PORT_INA, 400, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"ppc0", I2C_PORT_PPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"scaler", I2C_PORT_SCALER, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"power", I2C_PORT_POWER, 400, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "ina", + .port = I2C_PORT_INA, + .kbps = 400, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "ppc0", + .port = I2C_PORT_PPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "scaler", + .port = I2C_PORT_SCALER, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 400, + .scl = GPIO_I2C5_SCL, + .sda = GPIO_I2C5_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); @@ -519,6 +555,8 @@ void board_enable_s0_rails(int enable) gpio_set_level(GPIO_EC_CAM_V3P3_EN, enable); gpio_set_level(GPIO_PP3300_TPU_A_EN, enable); + + gpio_set_level(GPIO_EN_LOAD_SWITCH, enable); } int ec_config_get_usb4_present(void) diff --git a/board/scout/board.h b/board/scout/board.h index 5a09624b15..c90e1acda9 100644 --- a/board/scout/board.h +++ b/board/scout/board.h @@ -38,7 +38,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO diff --git a/board/scout/gpio.inc b/board/scout/gpio.inc index 583e4159bd..d0e32892a9 100644 --- a/board/scout/gpio.inc +++ b/board/scout/gpio.inc @@ -87,6 +87,7 @@ GPIO(EC_MX8M_ONOFF, PIN(9, 3), GPIO_OUT_LOW) GPIO(EC_SCALER_EN, PIN(E, 0), GPIO_OUT_LOW) GPIO(PP3300_TPU_A_EN, PIN(B, 0), GPIO_OUT_LOW) GPIO(PWR_CTRL, PIN(6, 2), GPIO_OUT_LOW) +GPIO(EN_LOAD_SWITCH, PIN(4, 2), GPIO_OUT_LOW) /* Barreljack */ GPIO(EN_PPVAR_BJ_ADP_L, PIN(0, 4), GPIO_OUT_LOW) @@ -143,7 +144,7 @@ ALTERNATE(PIN_MASK(B, 0x80), 0, MODULE_PWM, 0) /* PWM5 - Fan 1 ALTERNATE(PIN_MASK(7, 0x08), 0, MODULE_PWM, 0) /* TA2 - Fan Tachometer */ /* ADC */ -ALTERNATE(PIN_MASK(4, 0x3E), 0, MODULE_ADC, 0) /* ADC0, ADC1, ADC2, ADC4 */ +ALTERNATE(PIN_MASK(4, 0x3A), 0, MODULE_ADC, 0) /* ADC0, ADC1, ADC2, ADC4 */ ALTERNATE(PIN_MASK(E, 0x02), 0, MODULE_ADC, 0) /* ADC7 */ ALTERNATE(PIN_MASK(F, 0x01), 0, MODULE_ADC, 0) /* ADC9 */ @@ -154,7 +155,6 @@ ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* UART from EC UNUSED(PIN(1, 3)) /* EC_GP_SEL1_ODL */ UNUSED(PIN(C, 0)) /* FAN_PWM_2 */ UNUSED(PIN(8, 0)) /* LED_BLUE_L */ -UNUSED(PIN(4, 2)) /* ADC3/TEMP_SENSOR_3 */ UNUSED(PIN(C, 2)) /* A12 NC */ UNUSED(PIN(1, 2)) /* C6 NC */ UNUSED(PIN(6, 6)) /* H4 NC */ diff --git a/board/scout/led.c b/board/scout/led.c index a9f70d2d40..3066c182d1 100644 --- a/board/scout/led.c +++ b/board/scout/led.c @@ -199,6 +199,16 @@ static void led_init(void) } DECLARE_HOOK(HOOK_INIT, led_init, HOOK_PRIO_INIT_PWM + 1); +void board_led_auto_control(void) +{ + if (chipset_in_state(CHIPSET_STATE_ON)) + led_resume(); + else if (chipset_in_state(CHIPSET_STATE_SUSPEND)) + led_suspend_hook(); + else if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) + led_shutdown_hook(); +} + void led_alert(int enable) { if (enable) { diff --git a/board/servo_micro/board.c b/board/servo_micro/board.c index 8074ba38ab..40982ea888 100644 --- a/board/servo_micro/board.c +++ b/board/servo_micro/board.c @@ -372,8 +372,13 @@ USB_SPI_CONFIG(usb_spi, USB_IFACE_SPI, USB_EP_SPI, 0); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 100, - GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA}, + { + .name = "master", + .port = I2C_PORT_MASTER, + .kbps = 100, + .scl = GPIO_MASTER_I2C_SCL, + .sda = GPIO_MASTER_I2C_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/servo_micro/board.h b/board/servo_micro/board.h index 306bc0e5d7..6f4d67424b 100644 --- a/board/servo_micro/board.h +++ b/board/servo_micro/board.h @@ -76,7 +76,7 @@ /* Enable control of SPI over USB */ #define CONFIG_USB_SPI #define CONFIG_SPI_CONTROLLER -#define CONFIG_SPI_FLASH_PORT 0 /* First SPI master port */ +#define CONFIG_SPI_FLASH_PORT 0 /* First SPI controller port */ /* This is not actually an EC so disable some features. */ #undef CONFIG_WATCHDOG_HELP diff --git a/board/servo_v4/board.c b/board/servo_v4/board.c index 8540de710f..b304408f74 100644 --- a/board/servo_v4/board.c +++ b/board/servo_v4/board.c @@ -298,8 +298,13 @@ BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 100, - GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA}, + { + .name = "master", + .port = I2C_PORT_MASTER, + .kbps = 100, + .scl = GPIO_MASTER_I2C_SCL, + .sda = GPIO_MASTER_I2C_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/servo_v4p1/board.c b/board/servo_v4p1/board.c index d9d48a42ce..3284b4ef58 100644 --- a/board/servo_v4p1/board.c +++ b/board/servo_v4p1/board.c @@ -65,6 +65,26 @@ static void tca_evt(enum gpio_signal signal) irq_ioexpanders(); } +/* + * TUSB1064 set mux board tuning. + * Adds in board specific gain and DP lane count configuration + */ +static int board_tusb1064_dp_rx_eq_set(const struct usb_mux *me, + mux_state_t mux_state) +{ + int rv = EC_SUCCESS; + + /* + * Apply 10dB gain. Note, this value is selected to match the gain that + * would be set by default if the 2 GPIO gain set pins are left + * floating. + */ + if (mux_state & USB_PD_MUX_DP_ENABLED) + rv = tusb1064_set_dp_rx_eq(me, TUSB1064_DP_EQ_RX_10_0_DB); + + return rv; +} + const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { [CHG] = { /* CHG port connected directly to USB 3.0 hub, no mux */ }, [DUT] = { /* DUT port with UFP mux */ @@ -72,6 +92,7 @@ const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { .i2c_port = I2C_PORT_MASTER, .i2c_addr_flags = TUSB1064_I2C_ADDR10_FLAGS, .driver = &tusb1064_usb_mux_driver, + .board_set = &board_tusb1064_dp_rx_eq_set, } }; @@ -380,8 +401,13 @@ BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 100, - GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA}, + { + .name = "master", + .port = I2C_PORT_MASTER, + .kbps = 100, + .scl = GPIO_MASTER_I2C_SCL, + .sda = GPIO_MASTER_I2C_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/stern/board.c b/board/stern/board.c index 609dfdf7e5..d6006eecc0 100644 --- a/board/stern/board.c +++ b/board/stern/board.c @@ -67,13 +67,32 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 100, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct i2c_port_t i2c_bitbang_ports[] = { - {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv}, + { + .name = "battery", + .port = 2, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA, + .drv = &bitbang_drv + }, }; const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); diff --git a/board/stern/board.h b/board/stern/board.h index 5bf23a6733..f682f2bb2b 100644 --- a/board/stern/board.h +++ b/board/stern/board.h @@ -85,7 +85,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/stm32f446e-eval/board.c b/board/stm32f446e-eval/board.c index f4cf28898c..fd6ff8bbe2 100644 --- a/board/stm32f446e-eval/board.c +++ b/board/stm32f446e-eval/board.c @@ -43,10 +43,20 @@ struct dwc_usb usb_ctl = { /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"i2c1", I2C_PORT_0, 100, - GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"fmpi2c4", FMPI2C_PORT_3, 100, - GPIO_FMPI2C_SCL, GPIO_FMPI2C_SDA}, + { + .name = "i2c1", + .port = I2C_PORT_0, + .kbps = 100, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "fmpi2c4", + .port = FMPI2C_PORT_3, + .kbps = 100, + .scl = GPIO_FMPI2C_SCL, + .sda = GPIO_FMPI2C_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/stm32l476g-eval/board.c b/board/stm32l476g-eval/board.c index c7ebc2c6b8..70375abe95 100644 --- a/board/stm32l476g-eval/board.c +++ b/board/stm32l476g-eval/board.c @@ -33,7 +33,13 @@ DECLARE_HOOK(HOOK_TICK, tick_event, HOOK_PRIO_DEFAULT); #ifdef CTS_MODULE_I2C const struct i2c_port_t i2c_ports[] = { - {"test", STM32_I2C2_PORT, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "test", + .port = STM32_I2C2_PORT, + .kbps = 100, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); #endif diff --git a/board/stryke/board.h b/board/stryke/board.h index d84a09fe36..9708f70518 100644 --- a/board/stryke/board.h +++ b/board/stryke/board.h @@ -16,7 +16,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/sweetberry/board.c b/board/sweetberry/board.c index 66b21a81b9..bee8f91a22 100644 --- a/board/sweetberry/board.c +++ b/board/sweetberry/board.c @@ -59,14 +59,34 @@ struct dwc_usb usb_ctl = { /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"i2c1", I2C_PORT_0, 400, - GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"i2c2", I2C_PORT_1, 400, - GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"i2c3", I2C_PORT_2, 400, - GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"fmpi2c4", FMPI2C_PORT_3, 900, - GPIO_FMPI2C_SCL, GPIO_FMPI2C_SDA}, + { + .name = "i2c1", + .port = I2C_PORT_0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "i2c2", + .port = I2C_PORT_1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "i2c3", + .port = I2C_PORT_2, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "fmpi2c4", + .port = FMPI2C_PORT_3, + .kbps = 900, + .scl = GPIO_FMPI2C_SCL, + .sda = GPIO_FMPI2C_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/taeko/ec.tasklist b/board/taeko/ec.tasklist index 41d86da3d6..6d995d6b44 100644 --- a/board/taeko/ec.tasklist +++ b/board/taeko/ec.tasklist @@ -19,6 +19,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ diff --git a/board/taeko/gpio.inc b/board/taeko/gpio.inc index 7e97007af6..583efc308c 100644 --- a/board/taeko/gpio.inc +++ b/board/taeko/gpio.inc @@ -73,7 +73,7 @@ GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) GPIO(USB_C0_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW) GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) GPIO(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INPUT) -GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW) +GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_HIGH) GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) /* UART alternate functions */ @@ -120,6 +120,7 @@ UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */ UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */ UNUSED(PIN(4, 1)) /* GPIO41/ADC4 */ UNUSED(PIN(6, 6)) /* GPIO66 */ +UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */ /* Pre-configured PSL balls: J8 K6 */ diff --git a/board/taeko/sensors.c b/board/taeko/sensors.c index b5d75460fe..2643da35aa 100644 --- a/board/taeko/sensors.c +++ b/board/taeko/sensors.c @@ -67,21 +67,18 @@ static struct accelgyro_saved_data_t g_bma422_data; static struct lsm6dso_data lsm6dso_data; static struct lsm6dsm_data lsm6dsm_data = LSM6DSM_DATA; -/* TODO(b/201504044): calibrate the orientation matrix on later board stage */ -#if 0 +/* (b/201504044): calibrate the orientation matrix on later board stage */ static const mat33_fp_t lid_standard_ref = { { 0, FLOAT_TO_FP(1), 0}, - { FLOAT_TO_FP(1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} + { FLOAT_TO_FP(-1), 0, 0}, + { 0, 0, FLOAT_TO_FP(1)} }; static const mat33_fp_t base_standard_ref = { - { FLOAT_TO_FP(1), 0, 0}, - { 0, FLOAT_TO_FP(-1), 0}, - { 0, 0, FLOAT_TO_FP(-1)} + { FLOAT_TO_FP(-1), 0, 0}, + { 0, 0, FLOAT_TO_FP(-1)}, + { 0, FLOAT_TO_FP(-1), 0} }; -#endif - struct motion_sensor_t bma422_lid_accel = { .name = "Lid Accel - BMA", @@ -94,7 +91,7 @@ struct motion_sensor_t bma422_lid_accel = { .drv_data = &g_bma422_data, .port = I2C_PORT_SENSOR, .i2c_spi_addr_flags = BMA4_I2C_ADDR_PRIMARY, /* 0x18 */ - .rot_standard_ref = NULL, /* identity matrix */ + .rot_standard_ref = &lid_standard_ref, /* identity matrix */ .default_range = 2, /* g, enough for laptop. */ .min_frequency = BMA4_ACCEL_MIN_FREQ, .max_frequency = BMA4_ACCEL_MAX_FREQ, @@ -126,7 +123,7 @@ struct motion_sensor_t lsm6dsm_base_accel = { .flags = MOTIONSENSE_FLAG_INT_SIGNAL, .port = I2C_PORT_SENSOR, .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, - .rot_standard_ref = NULL, + .rot_standard_ref = &base_standard_ref, .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ .min_frequency = LSM6DSM_ODR_MIN_VAL, .max_frequency = LSM6DSM_ODR_MAX_VAL, @@ -158,7 +155,7 @@ struct motion_sensor_t lsm6dsm_base_gyro = { .port = I2C_PORT_SENSOR, .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, .default_range = 1000 | ROUND_UP_FLAG, /* dps */ - .rot_standard_ref = NULL, + .rot_standard_ref = &base_standard_ref, .min_frequency = LSM6DSM_ODR_MIN_VAL, .max_frequency = LSM6DSM_ODR_MAX_VAL, }; @@ -177,7 +174,7 @@ struct motion_sensor_t motion_sensors[] = { .port = I2C_PORT_SENSOR, .i2c_spi_addr_flags = LIS2DW12_ADDR1, /* 0x19 */ .flags = MOTIONSENSE_FLAG_INT_SIGNAL, - .rot_standard_ref = NULL, /* identity matrix */ + .rot_standard_ref = &lid_standard_ref, /* identity matrix */ .default_range = 2, /* g */ .min_frequency = LIS2DW12_ODR_MIN_VAL, .max_frequency = LIS2DW12_ODR_MAX_VAL, @@ -206,7 +203,7 @@ struct motion_sensor_t motion_sensors[] = { .flags = MOTIONSENSE_FLAG_INT_SIGNAL, .port = I2C_PORT_SENSOR, .i2c_spi_addr_flags = LSM6DSO_ADDR0_FLAGS, - .rot_standard_ref = NULL, + .rot_standard_ref = &base_standard_ref, .default_range = 4, /* g */ .min_frequency = LSM6DSO_ODR_MIN_VAL, .max_frequency = LSM6DSO_ODR_MAX_VAL, @@ -236,7 +233,7 @@ struct motion_sensor_t motion_sensors[] = { .port = I2C_PORT_SENSOR, .i2c_spi_addr_flags = LSM6DSO_ADDR0_FLAGS, .default_range = 1000 | ROUND_UP_FLAG, /* dps */ - .rot_standard_ref = NULL, + .rot_standard_ref = &base_standard_ref, .min_frequency = LSM6DSO_ODR_MIN_VAL, .max_frequency = LSM6DSO_ODR_MAX_VAL, }, diff --git a/board/taeko/usbc_config.c b/board/taeko/usbc_config.c index c8e02581be..aaf3fcbf5c 100644 --- a/board/taeko/usbc_config.c +++ b/board/taeko/usbc_config.c @@ -6,6 +6,7 @@ #include <stdint.h> #include <stdbool.h> +#include "battery.h" #include "common.h" #include "compile_time_macros.h" #include "console.h" @@ -168,6 +169,11 @@ static void ps8815_reset(void) if (i2c_read8(I2C_PORT_USB_C1_TCPC, PS8751_I2C_ADDR1_FLAGS, 0x0f, &val) == EC_SUCCESS) CPRINTS("ps8815: reg 0x0f was %02x", val); + else { + CPRINTS("delay 10ms to make sure PS8815 is waken from idle"); + msleep(10); + } + if (i2c_write8(I2C_PORT_USB_C1_TCPC, PS8751_I2C_ADDR1_FLAGS, 0x0f, 0x31) == EC_SUCCESS) @@ -235,7 +241,15 @@ void board_reset_pd_mcu(void) */ gpio_set_level(GPIO_USB_C0_TCPC_RST_ODL, 0); - gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); + + /* + * (b/202489681): Nx20p3483 cannot sink power after reset ec + * To avoid nx20p3483 cannot sink power after reset ec w/ AC + * only in TCPC1 port, EC shouldn't assert GPIO_USB_C1_RT_RST_R_ODL + * if no battery. + */ + if (battery_hw_present()) + gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); /* * delay for power-on to reset-off and min. assertion time diff --git a/board/taniks/battery.c b/board/taniks/battery.c new file mode 100644 index 0000000000..91faab57a3 --- /dev/null +++ b/board/taniks/battery.c @@ -0,0 +1,112 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery pack vendor provided charging profile + */ + +#include "battery_fuel_gauge.h" +#include "cbi.h" +#include "common.h" +#include "compile_time_macros.h" +#include "gpio.h" +/* + * Battery info for all Brya battery types. Note that the fields + * start_charging_min/max and charging_min/max are not used for the charger. + * The effective temperature limits are given by discharging_min/max_c. + * + * Fuel Gauge (FG) parameters which are used for determining if the battery + * is connected, the appropriate ship mode (battery cutoff) command, and the + * charge/discharge FETs status. + * + * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery + * register. For some batteries, the charge/discharge FET bits are set when + * charging/discharging is active, in other types, these bits set mean that + * charging/discharging is disabled. Therefore, in addition to the mask for + * these bits, a disconnect value must be specified. Note that for TI fuel + * gauge, the charge/discharge FET status is found in Operation Status (0x54), + * but a read of Manufacturer Access (0x00) will return the lower 16 bits of + * Operation status which contains the FET status bits. + * + * The assumption for battery types supported is that the charge/discharge FET + * status can be read with a sb_read() command and therefore, only the register + * address, mask, and disconnect value need to be provided. + */ +const struct board_batt_params board_battery_info[] = { + /* POW-TECH GQA05 Battery Information */ + [BATTERY_POWER_TECH] = { + /* BQ40Z50 Fuel Gauge */ + .fuel_gauge = { + .manuf_name = "POW-TECH", + .device_name = "BATGQA05L22", + .ship_mode = { + .reg_addr = 0x00, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 1, + .reg_addr = 0x00, + .reg_mask = 0x2000, /* XDSG */ + .disconnect_val = 0x2000, + } + }, + .batt_info = { + .voltage_max = TARGET_WITH_MARGIN(13050, 5), + .voltage_normal = 11400, /* mV */ + .voltage_min = 9000, /* mV */ + .precharge_current = 280, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, + /* LGC L17L3PB0 Battery Information */ + /* + * Battery info provided by ODM on b/143477210, comment #11 + */ + [BATTERY_LGC011] = { + .fuel_gauge = { + .manuf_name = "LGC", + .ship_mode = { + .reg_addr = 0x00, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .reg_addr = 0x0, + .reg_mask = 0x6000, + .disconnect_val = 0x6000, + } + }, + .batt_info = { + .voltage_max = TARGET_WITH_MARGIN(13200, 5), + .voltage_normal = 11550, /* mV */ + .voltage_min = 9000, /* mV */ + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = 0, + .discharging_max_c = 75, + }, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); + +const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_POWER_TECH; + +enum battery_present battery_hw_present(void) +{ + enum gpio_signal batt_pres; + + if (get_board_id() == 1) + batt_pres = GPIO_ID_1_EC_BATT_PRES_ODL; + else + batt_pres = GPIO_EC_BATT_PRES_ODL; + + /* The GPIO is low when the battery is physically present */ + return gpio_get_level(batt_pres) ? BP_NO : BP_YES; +} diff --git a/board/taniks/board.c b/board/taniks/board.c new file mode 100644 index 0000000000..6776cc3f7f --- /dev/null +++ b/board/taniks/board.c @@ -0,0 +1,108 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "battery.h" +#include "button.h" +#include "charge_ramp.h" +#include "charger.h" +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "gpio.h" +#include "gpio_signal.h" +#include "hooks.h" +#include "driver/accel_lis2dw12.h" +#include "driver/accelgyro_lsm6dso.h" +#include "driver/als_tcs3400.h" +#include "fw_config.h" +#include "hooks.h" +#include "lid_switch.h" +#include "power_button.h" +#include "power.h" +#include "registers.h" +#include "switch.h" +#include "tablet_mode.h" +#include "throttle_ap.h" +#include "usbc_config.h" + +#include "gpio_list.h" /* Must come after other header files. */ + +/* Console output macros */ +#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args) +#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args) + +__override void board_cbi_init(void) +{ + config_usb_db_type(); +} + +/* Called on AP S3 -> S0 transition */ +static void board_chipset_resume(void) +{ + /* Allow keyboard backlight to be enabled */ + + if (get_board_id() == 1) + gpio_set_level(GPIO_ID_1_EC_KB_BL_EN, 1); + else + gpio_set_level(GPIO_EC_KB_BL_EN_L, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); + +/* Called on AP S0 -> S3 transition */ +static void board_chipset_suspend(void) +{ + /* Turn off the keyboard backlight if it's on. */ + + if (get_board_id() == 1) + gpio_set_level(GPIO_ID_1_EC_KB_BL_EN, 0); + else + gpio_set_level(GPIO_EC_KB_BL_EN_L, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); + +/* + * Explicitly apply the board ID 1 *gpio.inc settings to pins that + * were reassigned on current boards. + */ + +static void set_board_id_1_gpios(void) +{ + if (get_board_id() != 1) + return; + + gpio_set_flags(GPIO_ID_1_EC_KB_BL_EN, GPIO_OUT_LOW); +} +DECLARE_HOOK(HOOK_INIT, set_board_id_1_gpios, HOOK_PRIO_FIRST); + +/* + * Reclaim GPIO pins on board ID 1 that are used as ADC inputs on + * current boards. ALT function group MODULE_ADC pins are set in + * HOOK_PRIO_INIT_ADC and can be reclaimed right after the hook runs. + */ + +static void board_id_1_reclaim_adc(void) +{ + if (get_board_id() != 1) + return; + + /* + * GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL is on GPIO34 + * + * The TCPC has already been reset by board_tcpc_init() executed + * from HOOK_PRIO_INIT_CHIPSET. Later, the pin gets set to ADC6 + * in HOOK_PRIO_INIT_ADC, so we simply need to set the pin back + * to GPIO34. + */ + gpio_set_flags(GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL, GPIO_ODR_HIGH); + gpio_set_alternate_function(GPIO_PORT_3, BIT(4), GPIO_ALT_FUNC_NONE); + + /* + * The pin gets set to ADC7 in HOOK_PRIO_INIT_ADC, so we simply + * need to set it back to GPIOE1. + */ + gpio_set_flags(GPIO_ID_1_EC_BATT_PRES_ODL, GPIO_INPUT); + gpio_set_alternate_function(GPIO_PORT_E, BIT(1), GPIO_ALT_FUNC_NONE); +} +DECLARE_HOOK(HOOK_INIT, board_id_1_reclaim_adc, HOOK_PRIO_INIT_ADC + 1); diff --git a/board/taniks/board.h b/board/taniks/board.h new file mode 100644 index 0000000000..10c5849408 --- /dev/null +++ b/board/taniks/board.h @@ -0,0 +1,286 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Brya board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +#include "compile_time_macros.h" + +/* + * Early brya boards are not set up for vivaldi + */ +#undef CONFIG_KEYBOARD_VIVALDI + +/* Baseboard features */ +#include "baseboard.h" + +/* + * This will happen automatically on NPCX9 ES2 and later. Do not remove + * until we can confirm all earlier chips are out of service. + */ +#define CONFIG_HIBERNATE_PSL_VCC1_RST_WAKEUP + +#define CONFIG_MP2964 + +/* LED */ +#define CONFIG_LED_PWM +#define CONFIG_LED_PWM_COUNT 2 +#undef CONFIG_LED_PWM_NEAR_FULL_COLOR +#undef CONFIG_LED_PWM_SOC_ON_COLOR +#undef CONFIG_LED_PWM_SOC_SUSPEND_COLOR +#undef CONFIG_LED_PWM_LOW_BATT_COLOR +#define CONFIG_LED_PWM_NEAR_FULL_COLOR EC_LED_COLOR_WHITE +#define CONFIG_LED_PWM_SOC_ON_COLOR EC_LED_COLOR_WHITE +#define CONFIG_LED_PWM_SOC_SUSPEND_COLOR EC_LED_COLOR_WHITE +#define CONFIG_LED_PWM_LOW_BATT_COLOR EC_LED_COLOR_AMBER + +/* Sensors */ +#define CONFIG_ACCELGYRO_LSM6DSO /* Base accel */ +#define CONFIG_ACCEL_LSM6DSO_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) + +/* TCS3400 ALS */ +#define CONFIG_ALS +#define ALS_COUNT 1 +#define CONFIG_ALS_TCS3400 +#define CONFIG_ALS_TCS3400_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(CLEAR_ALS) + +/* Enable sensor fifo, must also define the _SIZE and _THRES */ +#define CONFIG_ACCEL_FIFO +/* FIFO size is in power of 2. */ +#define CONFIG_ACCEL_FIFO_SIZE 256 +/* Depends on how fast the AP boots and typical ODRs */ +#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3) + +/* Sensors without hardware FIFO are in forced mode */ +#define CONFIG_ACCEL_FORCE_MODE_MASK \ + (BIT(LID_ACCEL) | BIT(CLEAR_ALS)) + +/* Lid accel */ +#define CONFIG_LID_ANGLE +#define CONFIG_LID_ANGLE_UPDATE +#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL +#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL +#define CONFIG_ACCEL_LIS2DWL +#define CONFIG_ACCEL_LIS2DW_AS_BASE +#define CONFIG_ACCEL_LIS2DW12_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL) + +#define CONFIG_ACCEL_INTERRUPTS + +/* Sensor console commands */ +#define CONFIG_CMD_ACCELS +#define CONFIG_CMD_ACCEL_INFO + +/* USB Type A Features */ +#define USB_PORT_COUNT 1 +#define CONFIG_USB_PORT_POWER_DUMB + +/* USB Type C and USB PD defines */ +#define CONFIG_USB_PD_REQUIRE_AP_MODE_ENTRY + +#define CONFIG_IO_EXPANDER +#define CONFIG_IO_EXPANDER_NCT38XX +#define CONFIG_IO_EXPANDER_PORT_COUNT 4 + +#define CONFIG_USB_PD_TCPM_PS8815 +#define CONFIG_USB_PD_TCPM_PS8815_FORCE_DID +#define CONFIG_USBC_RETIMER_INTEL_BB + +/* I2C speed console command */ +#define CONFIG_CMD_I2C_SPEED + +/* I2C control host command */ +#define CONFIG_HOSTCMD_I2C_CONTROL + +#define CONFIG_USBC_PPC_SYV682X +#define CONFIG_USBC_PPC_NX20P3483 + +/* TODO: b/177608416 - measure and check these values on brya */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ +#define PD_VCONN_SWAP_DELAY 5000 /* us */ + +/* + * Passive USB-C cables only support up to 60W. + */ +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 60000 +#define PD_MAX_CURRENT_MA 3000 +#define PD_MAX_VOLTAGE_MV 20000 + +/* + * Macros for GPIO signals used in common code that don't match the + * schematic names. Signal names in gpio.inc match the schematic and are + * then redefined here to so it's more clear which signal is being used for + * which purpose. + */ +#define GPIO_AC_PRESENT GPIO_ACOK_OD +#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL +#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL +#define GPIO_ENABLE_BACKLIGHT GPIO_EC_EN_EDP_BL +#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW +#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV +#define GPIO_PACKET_MODE_EN GPIO_EC_GSC_PACKET_MODE +#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL +#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L +#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST +#define GPIO_PCH_SLP_S0_L GPIO_SYS_SLP_S0IX_L +#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L +#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L + +/* + * GPIO_EC_PCH_INT_ODL is used for MKBP events as well as a PCH wakeup + * signal. + */ +#define GPIO_PCH_WAKE_L GPIO_EC_PCH_INT_ODL +#define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_SEQ_EC_ALL_SYS_PG +#define GPIO_PG_EC_DSW_PWROK GPIO_SEQ_EC_DSW_PWROK +#define GPIO_PG_EC_RSMRST_ODL GPIO_SEQ_EC_RSMRST_ODL +#define GPIO_POWER_BUTTON_L GPIO_GSC_EC_PWR_BTN_ODL +#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL +#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL +#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL +#define GPIO_WP_L GPIO_EC_WP_ODL + +#define GPIO_ID_1_EC_KB_BL_EN GPIO_EC_BATT_PRES_ODL + +/* System has back-lit keyboard */ +#define CONFIG_PWM_KBLIGHT + +/* I2C Bus Configuration */ + +#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 + +#define I2C_PORT_USB_C0_C2_TCPC NPCX_I2C_PORT1_0 +#define I2C_PORT_USB_C1_TCPC NPCX_I2C_PORT4_1 + +#define I2C_PORT_USB_C0_C2_PPC NPCX_I2C_PORT2_0 +#define I2C_PORT_USB_C1_PPC NPCX_I2C_PORT6_1 + +#define I2C_PORT_USB_C0_C2_BC12 NPCX_I2C_PORT2_0 +#define I2C_PORT_USB_C1_BC12 NPCX_I2C_PORT6_1 + +#define I2C_PORT_USB_C0_C2_MUX NPCX_I2C_PORT3_0 +#define I2C_PORT_USB_C1_MUX NPCX_I2C_PORT6_1 + +#define I2C_PORT_BATTERY NPCX_I2C_PORT5_0 +#define I2C_PORT_CHARGER NPCX_I2C_PORT7_0 +#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 +#define I2C_PORT_MP2964 NPCX_I2C_PORT7_0 + +#define I2C_ADDR_EEPROM_FLAGS 0x50 + +#define I2C_ADDR_MP2964_FLAGS 0x20 + +/* + * see b/174768555#comment22 + */ +#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR 0x56 +#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR 0x57 + +/* Enabling Thunderbolt-compatible mode */ +#define CONFIG_USB_PD_TBT_COMPAT_MODE + +/* Enabling USB4 mode */ +#define CONFIG_USB_PD_USB4 + +/* Retimer */ +#define CONFIG_USBC_RETIMER_FW_UPDATE + +/* Thermal features */ +#define CONFIG_THERMISTOR +#define CONFIG_TEMP_SENSOR +#define CONFIG_TEMP_SENSOR_POWER_GPIO GPIO_SEQ_EC_DSW_PWROK +#define CONFIG_STEINHART_HART_3V3_30K9_47K_4050B + +#define CONFIG_FANS FAN_CH_COUNT + +/* Charger defines */ +#define CONFIG_CHARGER_BQ25720 +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70 +#define CONFIG_CHARGE_RAMP_SW +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_BQ25710_PSYS_SENSING + +/* + * Older boards have a different ADC assignment. + */ + +#define CONFIG_ADC_CHANNELS_RUNTIME_CONFIG + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" /* needed by registers.h */ +#include "registers.h" +#include "usbc_config.h" + +enum adc_channel { + ADC_TEMP_SENSOR_1_DDR_SOC, + ADC_TEMP_SENSOR_2_AMBIENT, + ADC_TEMP_SENSOR_3_CHARGER, + ADC_TEMP_SENSOR_4_WWAN, + ADC_CH_COUNT +}; + +enum temp_sensor_id { + TEMP_SENSOR_1_DDR_SOC, + TEMP_SENSOR_2_AMBIENT, + TEMP_SENSOR_3_CHARGER, + TEMP_SENSOR_4_WWAN, + TEMP_SENSOR_COUNT +}; + +enum sensor_id { + LID_ACCEL = 0, + BASE_ACCEL, + BASE_GYRO, + CLEAR_ALS, + RGB_ALS, + SENSOR_COUNT +}; + +enum ioex_port { + IOEX_C0_NCT38XX = 0, + IOEX_C2_NCT38XX, + IOEX_ID_1_C0_NCT38XX, + IOEX_ID_1_C2_NCT38XX, + IOEX_PORT_COUNT +}; + +enum battery_type { + BATTERY_POWER_TECH, + BATTERY_LGC011, + BATTERY_TYPE_COUNT +}; + +enum pwm_channel { + PWM_CH_LED2 = 0, /* PWM0 (white charger) */ + PWM_CH_LED3, /* PWM1 (orange on DB) */ + PWM_CH_LED1, /* PWM2 (orange charger) */ + PWM_CH_KBLIGHT, /* PWM3 */ + PWM_CH_FAN, /* PWM5 */ + PWM_CH_LED4, /* PWM7 (white on DB) */ + PWM_CH_COUNT +}; + +enum fan_channel { + FAN_CH_0 = 0, + FAN_CH_COUNT +}; + +enum mft_channel { + MFT_CH_0 = 0, + MFT_CH_COUNT +}; + +#endif /* !__ASSEMBLER__ */ + +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/taniks/build.mk b/board/taniks/build.mk new file mode 100644 index 0000000000..6d1303a15a --- /dev/null +++ b/board/taniks/build.mk @@ -0,0 +1,26 @@ +# -*- makefile -*- +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Brya board specific files build +# + +CHIP:=npcx +CHIP_FAMILY:=npcx9 +CHIP_VARIANT:=npcx9m3f +BASEBOARD:=brya + +board-y= +board-y+=battery.o +board-y+=board.o +board-y+=charger.o +board-y+=fans.o +board-y+=fw_config.o +board-y+=i2c.o +board-y+=keyboard.o +board-y+=led.o +board-y+=pwm.o +board-y+=sensors.o +board-y+=tune_mp2964.o +board-y+=usbc_config.o diff --git a/board/taniks/charger.c b/board/taniks/charger.c new file mode 100644 index 0000000000..04be67147d --- /dev/null +++ b/board/taniks/charger.c @@ -0,0 +1,90 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" + +#include "charge_manager.h" +#include "charge_state_v2.h" +#include "charger.h" +#include "compile_time_macros.h" +#include "console.h" +#include "driver/charger/bq25710.h" +#include "usbc_ppc.h" +#include "usb_pd.h" +#include "util.h" + + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args) + +/* Charger Chip Configuration */ +const struct charger_config_t chg_chips[] = { + { + .i2c_port = I2C_PORT_CHARGER, + .i2c_addr_flags = BQ25710_SMBUS_ADDR1_FLAGS, + .drv = &bq25710_drv, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(chg_chips) == CHARGER_NUM); + +int board_set_active_charge_port(int port) +{ + int is_valid_port = board_is_usb_pd_port_present(port); + int i; + + if (port == CHARGE_PORT_NONE) { + CPRINTSUSB("Disabling all charger ports"); + + /* Disable all ports. */ + for (i = 0; i < ppc_cnt; i++) { + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (ppc_vbus_sink_enable(i, 0)) + CPRINTSUSB("Disabling C%d as sink failed.", i); + } + + return EC_SUCCESS; + } else if (!is_valid_port) { + return EC_ERROR_INVAL; + } + + /* Check if the port is sourcing VBUS. */ + if (ppc_is_sourcing_vbus(port)) { + CPRINTFUSB("Skip enable C%d", port); + return EC_ERROR_INVAL; + } + + CPRINTSUSB("New charge port: C%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < ppc_cnt; i++) { + if (i == port) + continue; + + if (ppc_vbus_sink_enable(i, 0)) + CPRINTSUSB("C%d: sink path disable failed.", i); + } + + /* Enable requested charge port. */ + if (ppc_vbus_sink_enable(port, 1)) { + CPRINTSUSB("C%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + + return EC_SUCCESS; +} + +__overridable void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + charge_set_input_current_limit(MAX(charge_ma, + CONFIG_CHARGER_INPUT_CURRENT), + charge_mv); +} diff --git a/board/taniks/ec.tasklist b/board/taniks/ec.tasklist new file mode 100644 index 0000000000..12b87cfab4 --- /dev/null +++ b/board/taniks/ec.tasklist @@ -0,0 +1,32 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* + * See CONFIG_TASK_LIST in config.h for details. + * + * USB_CHG_Px tasks must be contiguous (see USB_CHG_PORT_TO_TASK_ID(x)). + * PD_Cx tasks must be contiguous (see PD_PORT_TO_TASK_ID(x)) + */ + +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, HOOKS_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, BASEBOARD_CHG_RAMP_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P2, usb_charger_task, 0, TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C2, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_shared_alert_task, (BIT(2) | BIT(0)), BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE) diff --git a/board/taniks/fans.c b/board/taniks/fans.c new file mode 100644 index 0000000000..021f0de8e2 --- /dev/null +++ b/board/taniks/fans.c @@ -0,0 +1,89 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Physical fans. These are logically separate from pwm_channels. */ + +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "fan_chip.h" +#include "fan.h" +#include "hooks.h" +#include "pwm.h" + +/* MFT channels. These are logically separate from pwm_channels. */ +const struct mft_t mft_channels[] = { + [MFT_CH_0] = { + .module = NPCX_MFT_MODULE_1, + .clk_src = TCKC_LFCLK, + .pwm_id = PWM_CH_FAN, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); + +static const struct fan_conf fan_conf_0 = { + .flags = FAN_USE_RPM_MODE, + .ch = MFT_CH_0, /* Use MFT id to control fan */ + .pgood_gpio = -1, + .enable_gpio = GPIO_EN_PP5000_FAN, +}; + +/* + * TOOD(b/181271666): thermistor placement and calibration + * + * Prototype fan spins at about 4200 RPM at 100% PWM, this + * is specific to board ID 2 and might also apears in later + * boards as well. + */ +static const struct fan_rpm fan_rpm_0 = { + .rpm_min = 2200, + .rpm_start = 2200, + .rpm_max = 4200, +}; + +const struct fan_t fans[FAN_CH_COUNT] = { + [FAN_CH_0] = { + .conf = &fan_conf_0, + .rpm = &fan_rpm_0, + }, +}; + +#ifndef CONFIG_FANS + +/* + * TODO(b/181271666): use static fan speeds until fan and sensors are + * tuned. for now, use: + * + * AP off: 33% + * AP on: 100% + */ + +static void fan_slow(void) +{ + const int duty_pct = 33; + + ccprints("%s: speed %d%%", __func__, duty_pct); + + pwm_enable(PWM_CH_FAN, 1); + pwm_set_duty(PWM_CH_FAN, duty_pct); +} + +static void fan_max(void) +{ + const int duty_pct = 100; + + ccprints("%s: speed %d%%", __func__, duty_pct); + + pwm_enable(PWM_CH_FAN, 1); + pwm_set_duty(PWM_CH_FAN, duty_pct); +} + +DECLARE_HOOK(HOOK_INIT, fan_slow, HOOK_PRIO_DEFAULT); +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, fan_slow, HOOK_PRIO_DEFAULT); +DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, fan_slow, HOOK_PRIO_DEFAULT); +DECLARE_HOOK(HOOK_CHIPSET_RESET, fan_max, HOOK_PRIO_FIRST); +DECLARE_HOOK(HOOK_CHIPSET_RESUME, fan_max, HOOK_PRIO_DEFAULT); + +#endif /* CONFIG_FANS */ diff --git a/board/taniks/fw_config.c b/board/taniks/fw_config.c new file mode 100644 index 0000000000..9c28c3ca58 --- /dev/null +++ b/board/taniks/fw_config.c @@ -0,0 +1,61 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "cbi.h" +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "cros_board_info.h" +#include "fw_config.h" + +#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) + +static union brya_cbi_fw_config fw_config; +BUILD_ASSERT(sizeof(fw_config) == sizeof(uint32_t)); + +/* + * FW_CONFIG defaults for brya if the CBI.FW_CONFIG data is not + * initialized. + */ +static const union brya_cbi_fw_config fw_config_defaults = { + .usb_db = DB_USB3_PS8815, + .kb_bl = KEYBOARD_BACKLIGHT_ENABLED, +}; + +/**************************************************************************** + * Brya FW_CONFIG access + */ +void board_init_fw_config(void) +{ + if (cbi_get_fw_config(&fw_config.raw_value)) { + CPRINTS("CBI: Read FW_CONFIG failed, using board defaults"); + fw_config = fw_config_defaults; + } + + if (get_board_id() == 0) { + /* + * Early boards have a zero'd out FW_CONFIG, so replace + * it with a sensible default value. If DB_USB_ABSENT2 + * was used as an alternate encoding of DB_USB_ABSENT to + * avoid the zero check, then fix it. + */ + if (fw_config.raw_value == 0) { + CPRINTS("CBI: FW_CONFIG is zero, using board defaults"); + fw_config = fw_config_defaults; + } else if (fw_config.usb_db == DB_USB_ABSENT2) { + fw_config.usb_db = DB_USB_ABSENT; + } + } +} + +union brya_cbi_fw_config get_fw_config(void) +{ + return fw_config; +} + +enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void) +{ + return fw_config.usb_db; +} diff --git a/board/taniks/fw_config.h b/board/taniks/fw_config.h new file mode 100644 index 0000000000..6e4eb3ef58 --- /dev/null +++ b/board/taniks/fw_config.h @@ -0,0 +1,54 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __BOARD_BRYA_FW_CONFIG_H_ +#define __BOARD_BRYA_FW_CONFIG_H_ + +#include <stdint.h> + +/**************************************************************************** + * CBI FW_CONFIG layout for Brya board. + * + * Source of truth is the project/brya/brya/config.star configuration file. + */ + +enum ec_cfg_usb_db_type { + DB_USB_ABSENT = 0, + DB_USB3_PS8815 = 1, + DB_USB_ABSENT2 = 15 +}; + +enum ec_cfg_keyboard_backlight_type { + KEYBOARD_BACKLIGHT_DISABLED = 0, + KEYBOARD_BACKLIGHT_ENABLED = 1 +}; + +union brya_cbi_fw_config { + struct { + enum ec_cfg_usb_db_type usb_db : 4; + uint32_t sd_db : 2; + uint32_t lte_db : 1; + enum ec_cfg_keyboard_backlight_type kb_bl : 1; + uint32_t audio : 3; + uint32_t reserved_1 : 21; + }; + uint32_t raw_value; +}; + +/** + * Read the cached FW_CONFIG. Guaranteed to have valid values. + * + * @return the FW_CONFIG for the board. + */ +union brya_cbi_fw_config get_fw_config(void); + +/** + * Get the USB daughter board type from FW_CONFIG. + * + * @return the USB daughter board type. + */ +enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void); + +#endif /* __BOARD_BRYA_FW_CONFIG_H_ */ diff --git a/board/taniks/generated-gpio.inc b/board/taniks/generated-gpio.inc new file mode 100644 index 0000000000..f4772188a5 --- /dev/null +++ b/board/taniks/generated-gpio.inc @@ -0,0 +1,125 @@ +/* + * This file was auto-generated. + */ + +/* INTERRUPT GPIOs: */ +GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) +GPIO_INT(EC_ACCEL_INT_R_L, PIN(8, 1), GPIO_SEL_1P8V | GPIO_INT_FALLING, lis2dw12_interrupt) +GPIO_INT(EC_ALS_RGB_INT_R_L, PIN(D, 4), GPIO_INT_FALLING, tcs3400_interrupt) +GPIO_INT(EC_IMU_INT_R_L, PIN(5, 6), GPIO_SEL_1P8V | GPIO_INT_FALLING, lsm6dso_interrupt) +GPIO_INT(EC_PROCHOT_IN_L, PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt) +GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) +GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) +GPIO_INT(EC_WP_ODL, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) +GPIO_INT(GSC_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW, power_button_interrupt) +GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) +GPIO_INT(SEQ_EC_ALL_SYS_PG, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SEQ_EC_DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SEQ_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SLP_SUS_L, PIN(F, 1), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SYS_SLP_S0IX_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr) +GPIO_INT(USB_C0_BC12_INT_ODL, PIN(C, 6), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C0_C2_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_FALLING, ppc_interrupt) +GPIO_INT(USB_C0_RT_INT_ODL, PIN(B, 1), GPIO_INT_FALLING, retimer_interrupt) +GPIO_INT(USB_C1_BC12_INT_ODL, PIN(5, 0), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_FALLING, ppc_interrupt) +GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USB_C2_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C2_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt) +GPIO_INT(USB_C2_RT_INT_ODL, PIN(4, 1), GPIO_INT_FALLING, retimer_interrupt) + +/* USED GPIOs: */ +GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) +GPIO(CHARGER_VAP_OTG_EN, PIN(7, 3), GPIO_OUT_LOW) +GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT) +GPIO(EC_BATT_PRES_ODL, PIN(A, 3), GPIO_INPUT) +GPIO(EC_ENTERING_RW, PIN(0, 3), GPIO_OUT_LOW) +GPIO(EC_EN_EDP_BL, PIN(D, 3), GPIO_OUT_HIGH) +GPIO(EC_GSC_PACKET_MODE, PIN(7, 5), GPIO_OUT_LOW) +GPIO(EC_I2C_BAT_SCL, PIN(3, 3), GPIO_INPUT) +GPIO(EC_I2C_BAT_SDA, PIN(3, 6), GPIO_INPUT) +GPIO(EC_I2C_MISC_SCL_R, PIN(B, 3), GPIO_INPUT) +GPIO(EC_I2C_MISC_SDA_R, PIN(B, 2), GPIO_INPUT) +GPIO(EC_I2C_SENSOR_SCL, PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(EC_I2C_SENSOR_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(EC_I2C_USB_C0_C2_PPC_BC_SCL, PIN(9, 2), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C2_PPC_BC_SDA, PIN(9, 1), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C2_RT_SCL, PIN(D, 1), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C2_RT_SDA, PIN(D, 0), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C2_TCPC_SCL, PIN(9, 0), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C2_TCPC_SDA, PIN(8, 7), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_MIX_SCL, PIN(E, 4), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_MIX_SDA, PIN(E, 3), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_TCPC_SCL, PIN(F, 3), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_TCPC_SDA, PIN(F, 2), GPIO_INPUT) +GPIO(EC_KB_BL_EN_L, PIN(8, 6), GPIO_OUT_HIGH) +GPIO(EC_PCHHOT_ODL, PIN(7, 4), GPIO_INPUT) +GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) +GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH) +GPIO(EC_PCH_RSMRST_L, PIN(A, 6), GPIO_OUT_LOW) +GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) +GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) +GPIO(EC_PCH_WAKE_R_ODL, PIN(C, 0), GPIO_ODR_HIGH) +GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH) +GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_HIGH) +GPIO(EN_PP5000_USBA_R, PIN(D, 7), GPIO_OUT_LOW) +GPIO(EN_S5_RAILS, PIN(B, 6), GPIO_OUT_LOW) +GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT) +GPIO(PCH_PWROK, PIN(7, 2), GPIO_OUT_LOW) +GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) +GPIO(USB_C0_C2_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW) +GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) +GPIO(USB_C1_RST_ODL, PIN(9, 6), GPIO_ODR_LOW) +GPIO(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INPUT) +GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW) +GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) + +/* UART alternate functions */ +ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* GPIO64/CR_SIN1, GPO65/CR_SOUT1/FLPRG1_L */ + +/* I2C alternate functions */ +ALTERNATE(PIN_MASK(3, 0x48), 0, MODULE_I2C, 0) /* GPIO33/I2C5_SCL0/CTS_L, GPIO36/RTS_L/I2C5_SDA0 */ +ALTERNATE(PIN_MASK(8, 0x80), 0, MODULE_I2C, 0) /* GPIO87/I2C1_SDA0 */ +ALTERNATE(PIN_MASK(9, 0x07), 0, MODULE_I2C, 0) /* GPIO92/I2C2_SCL0, GPIO91/I2C2_SDA0, GPIO90/I2C1_SCL0 */ +ALTERNATE(PIN_MASK(B, 0x0c), 0, MODULE_I2C, 0) /* GPIOB3/I2C7_SCL0/DCD_L, GPIOB2/I2C7_SDA0/DSR_L */ +ALTERNATE(PIN_MASK(B, 0x30), 0, MODULE_I2C, GPIO_SEL_1P8V) /* GPIOB5/I2C0_SCL0, GPIOB4/I2C0_SDA0 */ +ALTERNATE(PIN_MASK(D, 0x03), 0, MODULE_I2C, 0) /* GPIOD1/I2C3_SCL0, GPIOD0/I2C3_SDA0 */ +ALTERNATE(PIN_MASK(E, 0x18), 0, MODULE_I2C, 0) /* GPIOE4/I2C6_SCL1/I3C_SCL, GPIOE3/I2C6_SDA1/I3C_SDA */ +ALTERNATE(PIN_MASK(F, 0x0c), 0, MODULE_I2C, 0) /* GPIOF3/I2C4_SCL1, GPIOF2/I2C4_SDA1 */ + +/* PWM alternate functions */ +ALTERNATE(PIN_MASK(4, 0x01), 0, MODULE_PWM, 0) /* GPIO40/TA1 */ +ALTERNATE(PIN_MASK(6, 0x01), 0, MODULE_PWM, 0) /* GPIO60/PWM7 */ +ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* GPIO80/PWM3 */ +ALTERNATE(PIN_MASK(B, 0x80), 0, MODULE_PWM, 0) /* GPIOB7/PWM5 */ +ALTERNATE(PIN_MASK(C, 0x1c), 0, MODULE_PWM, 0) /* GPIOC4/PWM2, GPIOC3/PWM0, GPIOC2/PWM1/I2C6_SCL0 */ + +/* ADC alternate functions */ +ALTERNATE(PIN_MASK(3, 0x10), 0, MODULE_ADC, 0) /* GPIO34/PS2_DAT2/ADC6 */ +ALTERNATE(PIN_MASK(4, 0x34), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1 */ +ALTERNATE(PIN_MASK(E, 0x02), 0, MODULE_ADC, 0) /* GPIOE1/ADC7 */ + +/* KB alternate functions */ +ALTERNATE(PIN_MASK(0, 0xf0), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO10&P80_CLK/GPIO07, KSO11&P80_DAT/GPIO06, KSO12/GPIO05, KSO13/GPIO04 */ +ALTERNATE(PIN_MASK(1, 0x7f), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO06/GPO13/GP_SEL_L, KSO07/GPO12/JEN_L, KSO03/GPIO16/JTAG_TDO0_SWO, KSO04/GPIO15/XNOR, KSO05/GPIO14, KSO08/GPIO11/CR_SOUT1, KSO09/GPIO10/CR_SIN1 */ +ALTERNATE(PIN_MASK(2, 0xfc), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI2/GPIO27/TRACEDATA1, KSI3/GPIO26/TRACEDATA0, KSI4/GPIO25/TRACECLK/GP_SCLK, KSI5/GPIO24/GP_MISO, KSI6/GPIO23/S_SBUB, KSI7/GPIO22/S_SBUA */ +ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO00/GPIO21/JTAG_TCK_SWCLK, KSO01/GPIO20/JTAG_TMS_SWIO */ +ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI0/GPIO31/TRACEDATA3/GP_MOSI, KSI1/GPIO30/TRACEDATA2/GP_CS_L */ +ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO14/GPIO82 */ + +/* PMU alternate functions */ +ALTERNATE(PIN_MASK(0, 0x01), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN2_L&GPI00/GPIO00 */ +ALTERNATE(PIN_MASK(0, 0x02), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW) /* GPIO01/PSL_IN3_L&GPI01 */ +ALTERNATE(PIN_MASK(D, 0x04), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN1_L&GPID2/GPIOD2 */ + +/* Unused Pins */ +UNUSED(PIN(D, 6)) /* GPOD6/CR_SOUT3/SHDF_ESPI_L */ +UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */ +UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */ +UNUSED(PIN(6, 6)) /* GPIO66 */ +UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */ + +/* Pre-configured PSL balls: J8 K6 */ diff --git a/board/taniks/gpio.inc b/board/taniks/gpio.inc new file mode 100644 index 0000000000..79a97b0475 --- /dev/null +++ b/board/taniks/gpio.inc @@ -0,0 +1,74 @@ +/* -*- mode:c -*- + * + * Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#define MODULE_KB MODULE_KEYBOARD_SCAN + +/* + * Generated-gpio.inc is produced using a Brya specific tool that + * parses the GPIO definitions derived from the board schematics and + * EC pinout descriptions derived form the chip datasheets to generate + * the Chrome EC GPIO pinout definitions. Due to the confidential + * nature of schematics and datasheets, they are not provided here. + * + * Variants that do not auto-generate their GPIO definitions should + * combine the Brya gpio.inc and generated-gpio.inc into their + * gpio.inc and customize as appropriate. + */ + +#include "generated-gpio.inc" + +/* + * The NPCX keyboard driver does not use named GPIOs to access + * keyboard scan pins, so we do not list them in *gpio.inc. However, when + * KEYBOARD_COL2_INVERTED is defined, this name is required. + */ +GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW) + +/* + * GPIOE1 is an ALT function ADC INPUT on board ID 2 and a GPIO INPUT on + * board ID 1. This declaration gives us a signal name to use on board + * ID 1. + */ +GPIO(ID_1_EC_BATT_PRES_ODL, PIN(E, 1), GPIO_INPUT) + +/* + * GPIO34 is an INPUT on board ID 2 and ODR_LOW on board ID 1. + * + * Since this pin is pulled up to 3.3V through a 30.9K ohm resistor on + * board ID 2, we will leak about 0.3mW until the pin is put in ALT mode + * when MODULE_ADC configuration runs. Initializing the pin to ODR_LOW + * gives us full control on both boards. + */ +GPIO(ID_1_USB_C0_C2_TCPC_RST_ODL, PIN(3, 4), GPIO_ODR_LOW) + +/* Board ID 1 IO expander configuration */ + +IOEX(ID_1_USB_C0_RT_RST_ODL, EXPIN(IOEX_ID_1_C0_NCT38XX, 0, 2), GPIO_ODR_LOW) +/* GPIO03_P1 to PU */ +IOEX(ID_1_USB_C0_FRS_EN, EXPIN(IOEX_ID_1_C0_NCT38XX, 0, 4), GPIO_LOW) +IOEX(ID_1_USB_C0_OC_ODL, EXPIN(IOEX_ID_1_C0_NCT38XX, 0, 6), GPIO_ODR_HIGH) +/* GPIO07_P1 to PU */ + +IOEX(ID_1_USB_C2_RT_RST_ODL, EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 2), GPIO_ODR_LOW) +/* GPIO03_P2 to PU */ +IOEX(ID_1_USB_C2_FRS_EN, EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 4), GPIO_LOW) +IOEX(ID_1_USB_C1_OC_ODL, EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 6), GPIO_ODR_HIGH) +IOEX(ID_1_USB_C2_OC_ODL, EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 7), GPIO_ODR_HIGH) + +/* Board ID 2 IO expander configuration */ + +/* GPIO02_P2 to PU */ +/* GPIO03_P2 to PU */ +IOEX(USB_C0_OC_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 4), GPIO_ODR_HIGH) +IOEX(USB_C0_FRS_EN, EXPIN(IOEX_C0_NCT38XX, 0, 6), GPIO_LOW) +IOEX(USB_C0_RT_RST_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 7), GPIO_ODR_LOW) + +IOEX(USB_C2_RT_RST_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 2), GPIO_ODR_LOW) +IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 3), GPIO_ODR_HIGH) +IOEX(USB_C2_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 4), GPIO_ODR_HIGH) +IOEX(USB_C2_FRS_EN, EXPIN(IOEX_C2_NCT38XX, 0, 6), GPIO_LOW) +/* GPIO07_P2 to PU */ diff --git a/board/taniks/i2c.c b/board/taniks/i2c.c new file mode 100644 index 0000000000..3db2e0c17b --- /dev/null +++ b/board/taniks/i2c.c @@ -0,0 +1,98 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" +#include "compile_time_macros.h" +#include "hooks.h" +#include "i2c.h" + +#define BOARD_ID_FAST_PLUS_CAPABLE 2 + +/* I2C port map configuration */ +const struct i2c_port_t i2c_ports[] = { + { + /* I2C0 */ + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA, + }, + { + /* I2C1 */ + .name = "tcpc0,2", + .port = I2C_PORT_USB_C0_C2_TCPC, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_C2_TCPC_SCL, + .sda = GPIO_EC_I2C_USB_C0_C2_TCPC_SDA, + }, + { + /* I2C2 */ + .name = "ppc0,2", + .port = I2C_PORT_USB_C0_C2_PPC, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_C2_PPC_BC_SCL, + .sda = GPIO_EC_I2C_USB_C0_C2_PPC_BC_SDA, + }, + { + /* I2C3 */ + .name = "retimer0,2", + .port = I2C_PORT_USB_C0_C2_MUX, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_C2_RT_SCL, + .sda = GPIO_EC_I2C_USB_C0_C2_RT_SDA, + }, + { + /* I2C4 C1 TCPC */ + .name = "tcpc1", + .port = I2C_PORT_USB_C1_TCPC, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_TCPC_SCL, + .sda = GPIO_EC_I2C_USB_C1_TCPC_SDA, + .flags = I2C_PORT_FLAG_DYNAMIC_SPEED, + }, + { + /* I2C5 */ + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_EC_I2C_BAT_SCL, + .sda = GPIO_EC_I2C_BAT_SDA, + }, + { + /* I2C6 */ + .name = "ppc1", + .port = I2C_PORT_USB_C1_PPC, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_MIX_SCL, + .sda = GPIO_EC_I2C_USB_C1_MIX_SDA, + .flags = I2C_PORT_FLAG_DYNAMIC_SPEED, + }, + { + /* I2C7 */ + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_MISC_SCL_R, + .sda = GPIO_EC_I2C_MISC_SDA_R, + }, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +/* + * I2C controllers are initialized in main.c. This sets the speed much + * later, but before I2C peripherals are initialized. + */ +static void set_board_legacy_i2c_speeds(void) +{ + if (get_board_id() >= BOARD_ID_FAST_PLUS_CAPABLE) + return; + + ccprints("setting USB DB I2C buses to 400 kHz\n"); + + i2c_set_freq(I2C_PORT_USB_C1_TCPC, I2C_FREQ_400KHZ); + i2c_set_freq(I2C_PORT_USB_C1_PPC, I2C_FREQ_400KHZ); +} +DECLARE_HOOK(HOOK_INIT, set_board_legacy_i2c_speeds, HOOK_PRIO_INIT_I2C - 1); diff --git a/board/taniks/keyboard.c b/board/taniks/keyboard.c new file mode 100644 index 0000000000..a9f033130d --- /dev/null +++ b/board/taniks/keyboard.c @@ -0,0 +1,25 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" + +#include "keyboard_scan.h" +#include "timer.h" + +/* Keyboard scan setting */ +__override struct keyboard_scan_config keyscan_config = { + /* Increase from 50 us, because KSO_02 passes through the H1. */ + .output_settle_us = 80, + /* Other values should be the same as the default configuration. */ + .debounce_down_us = 9 * MSEC, + .debounce_up_us = 30 * MSEC, + .scan_period_us = 3 * MSEC, + .min_post_scan_delay_us = 1000, + .poll_timeout_us = 100 * MSEC, + .actual_key_mask = { + 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, + 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ + }, +}; diff --git a/board/taniks/led.c b/board/taniks/led.c new file mode 100644 index 0000000000..78c10e65b8 --- /dev/null +++ b/board/taniks/led.c @@ -0,0 +1,93 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Brya specific PWM LED settings: there are 2 LEDs on each side of the board, + * each one can be controlled separately. The LED colors are white or amber, + * and the default behavior is tied to the charging process: both sides are + * amber while charging the battery and white when the battery is charged. + */ + +#include <stdint.h> + +#include "common.h" +#include "compile_time_macros.h" +#include "ec_commands.h" +#include "led_pwm.h" +#include "pwm.h" +#include "util.h" + +const enum ec_led_id supported_led_ids[] = { + EC_LED_ID_LEFT_LED, + EC_LED_ID_RIGHT_LED, +}; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +/* + * We only have a white and an amber LED, so setting any other color results in + * both LEDs being off. Cap at 50% to save power. + */ +struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = { + /* Amber, White */ + [EC_LED_COLOR_RED] = { 0, 0 }, + [EC_LED_COLOR_GREEN] = { 0, 0 }, + [EC_LED_COLOR_BLUE] = { 0, 0 }, + [EC_LED_COLOR_YELLOW] = { 0, 0 }, + [EC_LED_COLOR_WHITE] = { 0, 50 }, + [EC_LED_COLOR_AMBER] = { 50, 0 }, +}; + +/* Two logical LEDs with amber and white channels. */ +struct pwm_led pwm_leds[CONFIG_LED_PWM_COUNT] = { + { + .ch0 = PWM_CH_LED1, + .ch1 = PWM_CH_LED2, + .ch2 = PWM_LED_NO_CHANNEL, + .enable = &pwm_enable, + .set_duty = &pwm_set_duty, + }, + { + .ch0 = PWM_CH_LED3, + .ch1 = PWM_CH_LED4, + .ch2 = PWM_LED_NO_CHANNEL, + .enable = &pwm_enable, + .set_duty = &pwm_set_duty, + }, +}; + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + memset(brightness_range, '\0', + sizeof(*brightness_range) * EC_LED_COLOR_COUNT); + brightness_range[EC_LED_COLOR_AMBER] = 100; + brightness_range[EC_LED_COLOR_WHITE] = 100; +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + enum pwm_led_id pwm_id; + + /* Convert ec_led_id to pwm_led_id. */ + switch (led_id) { + case EC_LED_ID_LEFT_LED: + pwm_id = PWM_LED0; + break; + case EC_LED_ID_RIGHT_LED: + pwm_id = PWM_LED1; + break; + default: + return EC_ERROR_UNKNOWN; + } + + if (brightness[EC_LED_COLOR_WHITE]) + set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE); + else if (brightness[EC_LED_COLOR_AMBER]) + set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER); + else + /* Otherwise, the "color" is "off". */ + set_pwm_led_color(pwm_id, -1); + + return EC_SUCCESS; +} diff --git a/board/taniks/pwm.c b/board/taniks/pwm.c new file mode 100644 index 0000000000..2203f14c8d --- /dev/null +++ b/board/taniks/pwm.c @@ -0,0 +1,71 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" + +#include "compile_time_macros.h" +#include "hooks.h" +#include "pwm.h" +#include "pwm_chip.h" + +const struct pwm_t pwm_channels[] = { + [PWM_CH_LED2] = { + .channel = 0, + .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, + .freq = 4800, + }, + [PWM_CH_LED3] = { + .channel = 1, + .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, + .freq = 4800, + }, + [PWM_CH_LED1] = { + .channel = 2, + .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, + .freq = 4800, + }, + [PWM_CH_KBLIGHT] = { + .channel = 3, + .flags = 0, + /* + * Set PWM frequency to multiple of 50 Hz and 60 Hz to prevent + * flicker. Higher frequencies consume similar average power to + * lower PWM frequencies, but higher frequencies record a much + * lower maximum power. + */ + .freq = 2400, + }, + [PWM_CH_FAN] = { + .channel = 5, + .flags = PWM_CONFIG_OPEN_DRAIN | PWM_CONFIG_DSLEEP, + .freq = 1000 + }, + [PWM_CH_LED4] = { + .channel = 7, + .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, + .freq = 4800, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + +static void board_pwm_init(void) +{ + /* + * Turn off all the LEDs. + * Turn on the fan at 100%. + */ + pwm_enable(PWM_CH_LED1, 1); + pwm_set_duty(PWM_CH_LED1, 0); + pwm_enable(PWM_CH_LED2, 1); + pwm_set_duty(PWM_CH_LED2, 0); + pwm_enable(PWM_CH_LED3, 1); + pwm_set_duty(PWM_CH_LED3, 0); + pwm_enable(PWM_CH_LED4, 1); + pwm_set_duty(PWM_CH_LED4, 0); + + pwm_enable(PWM_CH_KBLIGHT, 1); + pwm_set_duty(PWM_CH_KBLIGHT, 50); +} +DECLARE_HOOK(HOOK_INIT, board_pwm_init, HOOK_PRIO_DEFAULT); diff --git a/board/taniks/sensors.c b/board/taniks/sensors.c new file mode 100644 index 0000000000..0a4b0198bd --- /dev/null +++ b/board/taniks/sensors.c @@ -0,0 +1,418 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" +#include "accelgyro.h" +#include "adc.h" +#include "driver/accel_lis2dw12.h" +#include "driver/accelgyro_lsm6dso.h" +#include "driver/als_tcs3400_public.h" +#include "hooks.h" +#include "motion_sense.h" +#include "temp_sensor.h" +#include "thermal.h" +#include "temp_sensor/thermistor.h" + +/* ADC configuration */ +struct adc_t adc_channels[] = { + [ADC_TEMP_SENSOR_1_DDR_SOC] = { + .name = "TEMP_DDR_SOC", + .input_ch = NPCX_ADC_CH0, + .factor_mul = ADC_MAX_VOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + }, + [ADC_TEMP_SENSOR_2_AMBIENT] = { + .name = "TEMP_AMBIENT", + .input_ch = NPCX_ADC_CH1, + .factor_mul = ADC_MAX_VOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + }, + [ADC_TEMP_SENSOR_3_CHARGER] = { + .name = "TEMP_CHARGER", + .input_ch = NPCX_ADC_CH6, + .factor_mul = ADC_MAX_VOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + }, + [ADC_TEMP_SENSOR_4_WWAN] = { + .name = "TEMP_WWAN", + .input_ch = NPCX_ADC_CH7, + .factor_mul = ADC_MAX_VOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +K_MUTEX_DEFINE(g_lid_accel_mutex); +K_MUTEX_DEFINE(g_base_accel_mutex); +static struct stprivate_data g_lis2dw12_data; +static struct lsm6dso_data lsm6dso_data; + +/* TODO(b/184779333): calibrate the orientation matrix on later board stage */ +static const mat33_fp_t lid_standard_ref = { + { 0, FLOAT_TO_FP(1), 0}, + { FLOAT_TO_FP(1), 0, 0}, + { 0, 0, FLOAT_TO_FP(-1)} +}; + +/* TODO(b/184779743): verify orientation matrix */ +static const mat33_fp_t base_standard_ref = { + { FLOAT_TO_FP(1), 0, 0}, + { 0, FLOAT_TO_FP(-1), 0}, + { 0, 0, FLOAT_TO_FP(-1)} +}; + +/* TCS3400 private data */ +static struct als_drv_data_t g_tcs3400_data = { + .als_cal.scale = 1, + .als_cal.uscale = 0, + .als_cal.offset = 0, + .als_cal.channel_scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kc from VPD */ + .cover_scale = ALS_CHANNEL_SCALE(1.0), /* CT */ + }, +}; + +/* + * TODO: b/184702900 need to calibrate ALS/RGB sensor. At default settings, + * shining phone flashlight on sensor pegs all readings at 0xFFFF. + */ +static struct tcs3400_rgb_drv_data_t g_tcs3400_rgb_data = { + .calibration.rgb_cal[X] = { + .offset = 0, + .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(1.0), + .scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kr */ + .cover_scale = ALS_CHANNEL_SCALE(1.0) + } + }, + .calibration.rgb_cal[Y] = { + .offset = 0, + .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(1.0), + .scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kg */ + .cover_scale = ALS_CHANNEL_SCALE(1.0) + }, + }, + .calibration.rgb_cal[Z] = { + .offset = 0, + .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(1.0), + .scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kb */ + .cover_scale = ALS_CHANNEL_SCALE(1.0) + } + }, + .calibration.irt = INT_TO_FP(1), + .saturation.again = TCS_DEFAULT_AGAIN, + .saturation.atime = TCS_DEFAULT_ATIME, +}; + +struct motion_sensor_t motion_sensors[] = { + [LID_ACCEL] = { + .name = "Lid Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LIS2DW12, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_LID, + .drv = &lis2dw12_drv, + .mutex = &g_lid_accel_mutex, + .drv_data = &g_lis2dw12_data, + .int_signal = GPIO_EC_ACCEL_INT_R_L, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LIS2DW12_ADDR0, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .rot_standard_ref = &lid_standard_ref, /* identity matrix */ + .default_range = 2, /* g */ + .min_frequency = LIS2DW12_ODR_MIN_VAL, + .max_frequency = LIS2DW12_ODR_MAX_VAL, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + /* Sensor on for lid angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, + }, + + [BASE_ACCEL] = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSO, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dso_drv, + .mutex = &g_base_accel_mutex, + .drv_data = LSM6DSO_ST_DATA(lsm6dso_data, + MOTIONSENSE_TYPE_ACCEL), + .int_signal = GPIO_EC_IMU_INT_R_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LSM6DSO_ADDR0_FLAGS, + .rot_standard_ref = &base_standard_ref, + .default_range = 4, /* g */ + .min_frequency = LSM6DSO_ODR_MIN_VAL, + .max_frequency = LSM6DSO_ODR_MAX_VAL, + .config = { + [SENSOR_CONFIG_EC_S0] = { + .odr = 13000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + }, + }, + + [BASE_GYRO] = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSO, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dso_drv, + .mutex = &g_base_accel_mutex, + .drv_data = LSM6DSO_ST_DATA(lsm6dso_data, + MOTIONSENSE_TYPE_GYRO), + .int_signal = GPIO_EC_IMU_INT_R_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LSM6DSO_ADDR0_FLAGS, + .default_range = 1000 | ROUND_UP_FLAG, /* dps */ + .rot_standard_ref = &base_standard_ref, + .min_frequency = LSM6DSO_ODR_MIN_VAL, + .max_frequency = LSM6DSO_ODR_MAX_VAL, + }, + + [CLEAR_ALS] = { + .name = "Clear Light", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_TCS3400, + .type = MOTIONSENSE_TYPE_LIGHT, + .location = MOTIONSENSE_LOC_CAMERA, + .drv = &tcs3400_drv, + .drv_data = &g_tcs3400_data, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = TCS3400_I2C_ADDR_FLAGS, + .rot_standard_ref = NULL, + .default_range = 0x10000, /* scale = 1x, uscale = 0 */ + .min_frequency = TCS3400_LIGHT_MIN_FREQ, + .max_frequency = TCS3400_LIGHT_MAX_FREQ, + .config = { + /* Run ALS sensor in S0 */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 1000, + }, + }, + }, + + [RGB_ALS] = { + /* + * RGB channels read by CLEAR_ALS and so the i2c port and + * address do not need to be defined for RGB_ALS. + */ + .name = "RGB Light", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_TCS3400, + .type = MOTIONSENSE_TYPE_LIGHT_RGB, + .location = MOTIONSENSE_LOC_CAMERA, + .drv = &tcs3400_rgb_drv, + .drv_data = &g_tcs3400_rgb_data, + .rot_standard_ref = NULL, + .default_range = 0x10000, /* scale = 1x, uscale = 0 */ + }, +}; +const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); + +/* ALS instances when LPC mapping is needed. Each entry directs to a sensor. */ +const struct motion_sensor_t *motion_als_sensors[] = { + &motion_sensors[CLEAR_ALS], +}; +BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT); + +static void baseboard_sensors_init(void) +{ + /* Enable gpio interrupt for lid accel sensor */ + gpio_enable_interrupt(GPIO_EC_ACCEL_INT_R_L); + /* Enable interrupt for the TCS3400 color light sensor */ + gpio_enable_interrupt(GPIO_EC_ALS_RGB_INT_R_L); + /* Enable gpio interrupt for base accelgyro sensor */ + gpio_enable_interrupt(GPIO_EC_IMU_INT_R_L); +} +DECLARE_HOOK(HOOK_INIT, baseboard_sensors_init, HOOK_PRIO_INIT_I2C + 1); + +/* Temperature sensor configuration */ +const struct temp_sensor_t temp_sensors[] = { + [TEMP_SENSOR_1_DDR_SOC] = { + .name = "DDR and SOC", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_1_DDR_SOC, + }, + [TEMP_SENSOR_2_AMBIENT] = { + .name = "Ambient", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_2_AMBIENT, + }, + [TEMP_SENSOR_3_CHARGER] = { + .name = "Charger", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_3_CHARGER, + }, + [TEMP_SENSOR_4_WWAN] = { + .name = "WWAN", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_4_WWAN, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); + +/* + * TODO(b/180681346): update for Alder Lake/brya + * + * Alder Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at + * 130 C. However, sensor is located next to DDR, so we need to use the lower + * DDR temperature limit (85 C) + */ +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; + +/* + * TODO(b/180681346): update for Alder Lake/brya + * + * Inductor limits - used for both charger and PP3300 regulator + * + * Need to use the lower of the charger IC, PP3300 regulator, and the inductors + * + * Charger max recommended temperature 100C, max absolute temperature 125C + * PP3300 regulator: operating range -40 C to 145 C + * + * Inductors: limit of 125c + * PCB: limit is 80c + */ +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_AMBIENT \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_ambient = + THERMAL_AMBIENT; + +/* + * Inductor limits - used for both charger and PP3300 regulator + * + * Need to use the lower of the charger IC, PP3300 regulator, and the inductors + * + * Charger max recommended temperature 125C, max absolute temperature 150C + * PP3300 regulator: operating range -40 C to 125 C + * + * Inductors: limit of 125c + * PCB: limit is 80c + */ +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CHARGER \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(105), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(120), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(65), \ + } +__maybe_unused static const struct ec_thermal_config thermal_charger = + THERMAL_CHARGER; + +/* + * TODO(b/180681346): update for brya WWAN module + */ +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_WWAN \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(130), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(130), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(100), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_wwan = + THERMAL_WWAN; + +struct ec_thermal_config thermal_params[] = { + [TEMP_SENSOR_1_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_2_AMBIENT] = THERMAL_AMBIENT, + [TEMP_SENSOR_3_CHARGER] = THERMAL_CHARGER, + [TEMP_SENSOR_4_WWAN] = THERMAL_WWAN, +}; +BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); + +static void board_thermals_init(void) +{ + if (get_board_id() == 1) { + /* + * Board ID 1 only has 3 sensors and the AMBIENT sensor + * ADC pins have been reassigned, so we're down to 2 + * sensors that can easily be configured. So, alias the + * AMBIENT sensor ADC channel to the unimplemented ADC + * slots. + */ + adc_channels[ADC_TEMP_SENSOR_3_CHARGER].input_ch = NPCX_ADC_CH1; + adc_channels[ADC_TEMP_SENSOR_4_WWAN].input_ch = NPCX_ADC_CH1; + } +} + +DECLARE_HOOK(HOOK_INIT, board_thermals_init, HOOK_PRIO_INIT_CHIPSET); diff --git a/board/kano/tune_mp2964.c b/board/taniks/tune_mp2964.c index 198f06d8eb..198f06d8eb 100644 --- a/board/kano/tune_mp2964.c +++ b/board/taniks/tune_mp2964.c diff --git a/board/taniks/usbc_config.c b/board/taniks/usbc_config.c new file mode 100644 index 0000000000..7f54cde5a5 --- /dev/null +++ b/board/taniks/usbc_config.c @@ -0,0 +1,506 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <stdint.h> +#include <stdbool.h> + +#include "cbi.h" +#include "charger.h" +#include "charge_ramp.h" +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "driver/bc12/pi3usb9201_public.h" +#include "driver/ppc/nx20p348x.h" +#include "driver/ppc/syv682x_public.h" +#include "driver/retimer/bb_retimer_public.h" +#include "driver/tcpm/nct38xx.h" +#include "driver/tcpm/ps8xxx_public.h" +#include "driver/tcpm/tcpci.h" +#include "ec_commands.h" +#include "fw_config.h" +#include "gpio.h" +#include "gpio_signal.h" +#include "hooks.h" +#include "ioexpander.h" +#include "system.h" +#include "task.h" +#include "task_id.h" +#include "timer.h" +#include "usbc_config.h" +#include "usbc_ppc.h" +#include "usb_charge.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usb_pd_tcpm.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) + +/* USBC TCPC configuration */ +const struct tcpc_config_t tcpc_config[] = { + [USBC_PORT_C0] = { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_USB_C0_C2_TCPC, + .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, + }, + .drv = &nct38xx_tcpm_drv, + .flags = TCPC_FLAGS_TCPCI_REV2_0 | + TCPC_FLAGS_NO_DEBUG_ACC_CONTROL, + }, + [USBC_PORT_C1] = { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_USB_C1_TCPC, + .addr_flags = PS8751_I2C_ADDR1_FLAGS, + }, + .drv = &ps8xxx_tcpm_drv, + .flags = TCPC_FLAGS_TCPCI_REV2_0 | + TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V | + TCPC_FLAGS_CONTROL_VCONN, + }, + [USBC_PORT_C2] = { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_USB_C0_C2_TCPC, + .addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS, + }, + .drv = &nct38xx_tcpm_drv, + .flags = TCPC_FLAGS_TCPCI_REV2_0, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); +BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); + +/******************************************************************************/ +/* USB-A charging control */ + +const int usb_port_enable[USB_PORT_COUNT] = { + GPIO_EN_PP5000_USBA_R, +}; +BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); + +/******************************************************************************/ + +/* USBC PPC configuration */ +struct ppc_config_t ppc_chips[] = { + [USBC_PORT_C0] = { + .i2c_port = I2C_PORT_USB_C0_C2_PPC, + .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + .drv = &syv682x_drv, + }, + [USBC_PORT_C1] = { + /* Compatible with Silicon Mitus SM536A0 */ + .i2c_port = I2C_PORT_USB_C1_PPC, + .i2c_addr_flags = NX20P3483_ADDR2_FLAGS, + .drv = &nx20p348x_drv, + }, + [USBC_PORT_C2] = { + .i2c_port = I2C_PORT_USB_C0_C2_PPC, + /* + * b/179987870 + * schematics I2C map says ADDR3 + */ + .i2c_addr_flags = SYV682X_ADDR2_FLAGS, + .drv = &syv682x_drv, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT); + +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); + +/* USBC mux configuration - Alder Lake includes internal mux */ +static const struct usb_mux usbc0_tcss_usb_mux = { + .usb_port = USBC_PORT_C0, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, +}; +static const struct usb_mux usbc2_tcss_usb_mux = { + .usb_port = USBC_PORT_C2, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, +}; + +/* + * USB3 DB mux configuration - the top level mux still needs to be set + * to the virtual_usb_mux_driver so the AP gets notified of mux changes + * and updates the TCSS configuration on state changes. + */ +static const struct usb_mux usbc1_usb3_db_retimer = { + .usb_port = USBC_PORT_C1, + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, +}; + +const struct usb_mux usb_muxes[] = { + [USBC_PORT_C0] = { + .usb_port = USBC_PORT_C0, + .driver = &bb_usb_retimer, + .hpd_update = bb_retimer_hpd_update, + .i2c_port = I2C_PORT_USB_C0_C2_MUX, + .i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR, + .next_mux = &usbc0_tcss_usb_mux, + }, + [USBC_PORT_C1] = { + /* PS8815 DB */ + .usb_port = USBC_PORT_C1, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, + .next_mux = &usbc1_usb3_db_retimer, + }, + [USBC_PORT_C2] = { + .usb_port = USBC_PORT_C2, + .driver = &bb_usb_retimer, + .hpd_update = bb_retimer_hpd_update, + .i2c_port = I2C_PORT_USB_C0_C2_MUX, + .i2c_addr_flags = USBC_PORT_C2_BB_RETIMER_I2C_ADDR, + .next_mux = &usbc2_tcss_usb_mux, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); + +/* BC1.2 charger detect configuration */ +const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { + [USBC_PORT_C0] = { + .i2c_port = I2C_PORT_USB_C0_C2_BC12, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + }, + [USBC_PORT_C1] = { + .i2c_port = I2C_PORT_USB_C1_BC12, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + }, + [USBC_PORT_C2] = { + .i2c_port = I2C_PORT_USB_C0_C2_BC12, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); + +/* + * USB C0 and C2 uses burnside bridge chips and have their reset + * controlled by their respective TCPC chips acting as GPIO expanders. + * + * ioex_init() is normally called before we take the TCPCs out of + * reset, so we need to start in disabled mode, then explicitly + * call ioex_init(). + */ + +struct ioexpander_config_t ioex_config[] = { + [IOEX_C0_NCT38XX] = { + .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, + .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, + .drv = &nct38xx_ioexpander_drv, + .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED, + }, + [IOEX_C2_NCT38XX] = { + .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, + .i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS, + .drv = &nct38xx_ioexpander_drv, + .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED, + }, + [IOEX_ID_1_C0_NCT38XX] = { + .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, + .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, + .drv = &nct38xx_ioexpander_drv, + .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED, + }, + [IOEX_ID_1_C2_NCT38XX] = { + .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, + .i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS, + .drv = &nct38xx_ioexpander_drv, + .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT); + +#ifdef CONFIG_CHARGE_RAMP_SW + +/* + * TODO(b/181508008): tune this threshold + */ + +#define BC12_MIN_VOLTAGE 4400 + +/** + * Return true if VBUS is too low + */ +int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) +{ + int voltage; + + if (charger_get_vbus_voltage(port, &voltage)) + voltage = 0; + + if (voltage == 0) { + CPRINTS("%s: must be disconnected", __func__); + return 1; + } + + if (voltage < BC12_MIN_VOLTAGE) { + CPRINTS("%s: port %d: vbus %d lower than %d", __func__, + port, voltage, BC12_MIN_VOLTAGE); + return 1; + } + + return 0; +} + +#endif /* CONFIG_CHARGE_RAMP_SW */ + +void config_usb_db_type(void) +{ + enum ec_cfg_usb_db_type db_type = ec_cfg_usb_db_type(); + + /* + * TODO(b/180434685): implement multiple DB types + */ + + CPRINTS("Configured USB DB type number is %d", db_type); +} + +__override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) +{ + enum ioex_signal rst_signal; + + if (me->usb_port == USBC_PORT_C0) { + if (get_board_id() == 1) + rst_signal = IOEX_ID_1_USB_C0_RT_RST_ODL; + else + rst_signal = IOEX_USB_C0_RT_RST_ODL; + } else if (me->usb_port == USBC_PORT_C2) { + if (get_board_id() == 1) + rst_signal = IOEX_ID_1_USB_C2_RT_RST_ODL; + else + rst_signal = IOEX_USB_C2_RT_RST_ODL; + } else { + return EC_ERROR_INVAL; + } + + /* + * We do not have a load switch for the burnside bridge chips, + * so we only need to sequence reset. + */ + + if (enable) { + /* + * Tpw, minimum time from VCC to RESET_N de-assertion is 100us. + * For boards that don't provide a load switch control, the + * retimer_init() function ensures power is up before calling + * this function. + */ + ioex_set_level(rst_signal, 1); + /* + * Allow 1ms time for the retimer to power up lc_domain + * which powers I2C controller within retimer + */ + msleep(1); + if (get_board_id() == 1) { + int val; + + /* + * Check if we were able to deassert + * reset. Board ID 1 uses a GPIO that is + * uncontrollable when a debug accessory is + * connected. + */ + if (ioex_get_level(rst_signal, &val) != EC_SUCCESS) + return EC_ERROR_UNKNOWN; + if (val != 1) + return EC_ERROR_NOT_POWERED; + } + } else { + ioex_set_level(rst_signal, 0); + msleep(1); + } + return EC_SUCCESS; +} + +void board_reset_pd_mcu(void) +{ + enum gpio_signal tcpc_rst; + + if (get_board_id() == 1) + tcpc_rst = GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL; + else + tcpc_rst = GPIO_USB_C0_C2_TCPC_RST_ODL; + + /* + * TODO(b/179648104): figure out correct timing + */ + + gpio_set_level(tcpc_rst, 0); + if (ec_cfg_usb_db_type() != DB_USB_ABSENT) { + gpio_set_level(GPIO_USB_C1_RST_ODL, 0); + gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); + } + + /* + * delay for power-on to reset-off and min. assertion time + */ + + msleep(20); + + gpio_set_level(tcpc_rst, 1); + if (ec_cfg_usb_db_type() != DB_USB_ABSENT) { + gpio_set_level(GPIO_USB_C1_RST_ODL, 1); + gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1); + } + + /* wait for chips to come up */ + + msleep(50); +} + +static void board_tcpc_init(void) +{ + /* Don't reset TCPCs after initial reset */ + if (!system_jumped_late()) + board_reset_pd_mcu(); + + /* + * These IO expander pins are implemented using the + * C0/C2 TCPC, so they must be set up after the TCPC has + * been taken out of reset. + */ + if (get_board_id() == 1) { + ioex_init(IOEX_ID_1_C0_NCT38XX); + ioex_init(IOEX_ID_1_C2_NCT38XX); + } else { + ioex_init(IOEX_C0_NCT38XX); + ioex_init(IOEX_C2_NCT38XX); + } + + /* Enable PPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C2_PPC_INT_ODL); + + /* Enable TCPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_C2_TCPC_INT_ODL); + + /* Enable BC1.2 interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C2_BC12_INT_ODL); + + if (ec_cfg_usb_db_type() != DB_USB_ABSENT) { + gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); + } +} +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); + +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + + if (gpio_get_level(GPIO_USB_C0_C2_TCPC_INT_ODL) == 0) + status |= PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_2; + + if ((ec_cfg_usb_db_type() != DB_USB_ABSENT) && + gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0) + status |= PD_STATUS_TCPC_ALERT_1; + + return status; +} + +int ppc_get_alert_status(int port) +{ + if (port == USBC_PORT_C0) + return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; + else if ((port == USBC_PORT_C1) && + (ec_cfg_usb_db_type() != DB_USB_ABSENT)) + return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; + else if (port == USBC_PORT_C2) + return gpio_get_level(GPIO_USB_C2_PPC_INT_ODL) == 0; + return 0; +} + +void tcpc_alert_event(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_C2_TCPC_INT_ODL: + schedule_deferred_pd_interrupt(USBC_PORT_C0); + break; + case GPIO_USB_C1_TCPC_INT_ODL: + if (ec_cfg_usb_db_type() == DB_USB_ABSENT) + break; + schedule_deferred_pd_interrupt(USBC_PORT_C1); + break; + default: + break; + } +} + +void bc12_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_BC12_INT_ODL: + task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); + break; + case GPIO_USB_C1_BC12_INT_ODL: + if (ec_cfg_usb_db_type() == DB_USB_ABSENT) + break; + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); + break; + case GPIO_USB_C2_BC12_INT_ODL: + task_set_event(TASK_ID_USB_CHG_P2, USB_CHG_EVENT_BC12); + break; + default: + break; + } +} + +void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_PPC_INT_ODL: + syv682x_interrupt(USBC_PORT_C0); + break; + case GPIO_USB_C1_PPC_INT_ODL: + switch (ec_cfg_usb_db_type()) { + case DB_USB_ABSENT: + case DB_USB_ABSENT2: + break; + case DB_USB3_PS8815: + nx20p348x_interrupt(USBC_PORT_C1); + break; + } + break; + case GPIO_USB_C2_PPC_INT_ODL: + syv682x_interrupt(USBC_PORT_C2); + break; + default: + break; + } +} + +void retimer_interrupt(enum gpio_signal signal) +{ + /* + * TODO(b/179513527): add USB-C support + */ +} + +__override bool board_is_dts_port(int port) +{ + return port == USBC_PORT_C0; +} + +__override bool board_is_tbt_usb4_port(int port) +{ + if (port == USBC_PORT_C0 || port == USBC_PORT_C2) + return true; + + return false; +} + +__override enum tbt_compat_cable_speed board_get_max_tbt_speed(int port) +{ + if (!board_is_tbt_usb4_port(port)) + return TBT_SS_RES_0; + + return TBT_SS_TBT_GEN3; +} diff --git a/board/taniks/usbc_config.h b/board/taniks/usbc_config.h new file mode 100644 index 0000000000..5d08a446fb --- /dev/null +++ b/board/taniks/usbc_config.h @@ -0,0 +1,22 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Brya board-specific USB-C configuration */ + +#ifndef __CROS_EC_USBC_CONFIG_H +#define __CROS_EC_USBC_CONFIG_H + +#define CONFIG_USB_PD_PORT_MAX_COUNT 3 + +enum usbc_port { + USBC_PORT_C0 = 0, + USBC_PORT_C1, + USBC_PORT_C2, + USBC_PORT_COUNT +}; + +void config_usb_db_type(void); + +#endif /* __CROS_EC_USBC_CONFIG_H */ diff --git a/board/kingler/vif_override.xml b/board/taniks/vif_override.xml index 32736caf64..32736caf64 100644 --- a/board/kingler/vif_override.xml +++ b/board/taniks/vif_override.xml diff --git a/board/terrador/ec.tasklist b/board/terrador/ec.tasklist index 292de51cdb..3e20d8ae39 100644 --- a/board/terrador/ec.tasklist +++ b/board/terrador/ec.tasklist @@ -16,6 +16,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/tglrvp_ish/board.h b/board/tglrvp_ish/board.h index 03044a5bb8..12f4b5992a 100644 --- a/board/tglrvp_ish/board.h +++ b/board/tglrvp_ish/board.h @@ -35,7 +35,7 @@ #define CONFIG_ACCEL_FORCE_MODE_MASK BIT(BASE_ACCEL) /* Host command over HECI */ -#define CONFIG_HOSTCMD_HECI +#define CONFIG_HOST_INTERFACE_HECI /* I2C ports */ #define I2C_PORT_SENSOR ISH_I2C1 diff --git a/board/tglrvpu_ite/gpio.inc b/board/tglrvpu_ite/gpio.inc index e0bce1ddd8..b84c92aac6 100644 --- a/board/tglrvpu_ite/gpio.inc +++ b/board/tglrvpu_ite/gpio.inc @@ -37,7 +37,7 @@ GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interrupt) /* UAR GPIO_INT(WP_L, PIN(I, 4), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* enable 1.8v input of EC's espi_reset pin, and then this pin takes effect. */ GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) /* eSPI_reset# */ #endif @@ -75,7 +75,7 @@ GPIO(EC_PCH_DSW_PWROK, PIN(L, 6), GPIO_OUT_LOW) /* Host communication GPIOs */ GPIO(PCH_WAKE_L, PIN(J, 0), GPIO_ODR_HIGH) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(PCH_PLTRST_L, PIN(E, 3), GPIO_INPUT | GPIO_PULL_UP) #endif @@ -165,7 +165,7 @@ GPIO(NC_USB_C1_RETIMER_ALRT, PIN(G, 0), GPIO_INPUT) /* Used if Base EC is present */ GPIO(NC_EC_BASE_DET, PIN(I, 3), GPIO_INPUT) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INPUT) #endif diff --git a/board/tigertail/board.c b/board/tigertail/board.c index f4d0382b9c..e7679a125d 100644 --- a/board/tigertail/board.c +++ b/board/tigertail/board.c @@ -103,8 +103,13 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 100, - GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA}, + { + .name = "master", + .port = I2C_PORT_MASTER, + .kbps = 100, + .scl = GPIO_MASTER_I2C_SCL, + .sda = GPIO_MASTER_I2C_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/treeya/board.c b/board/treeya/board.c index 4583d89d7c..bc650ed407 100644 --- a/board/treeya/board.c +++ b/board/treeya/board.c @@ -32,11 +32,41 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /* I2C port map. */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"thermal", I2C_PORT_THERMAL_AP, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_I2C0_SCL, + .sda = GPIO_I2C0_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, + { + .name = "thermal", + .port = I2C_PORT_THERMAL_AP, + .kbps = 400, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_I2C7_SCL, + .sda = GPIO_I2C7_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/trogdor/board.c b/board/trogdor/board.c index 0261ada9ff..7036e57c4a 100644 --- a/board/trogdor/board.c +++ b/board/trogdor/board.c @@ -53,16 +53,41 @@ __override struct keyboard_scan_config keyscan_config = { /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 1000, GPIO_EC_I2C_USB_C1_PD_SCL, - GPIO_EC_I2C_USB_C1_PD_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/twinkie/board.c b/board/twinkie/board.c index 6572f27281..f3f8460c8d 100644 --- a/board/twinkie/board.c +++ b/board/twinkie/board.c @@ -66,7 +66,13 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 100, GPIO_I2C_SCL, GPIO_I2C_SDA}, + { + .name = "master", + .port = I2C_PORT_MASTER, + .kbps = 100, + .scl = GPIO_I2C_SCL, + .sda = GPIO_I2C_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/twinkie/sniffer.c b/board/twinkie/sniffer.c index a567b5d725..7d2d8d439f 100644 --- a/board/twinkie/sniffer.c +++ b/board/twinkie/sniffer.c @@ -316,9 +316,9 @@ void sniffer_task(void) + (EP_PACKET_HEADER_SIZE>>1))), samples[d >> 4]+off, EP_PAYLOAD_SIZE); - atomic_clear_bits((uint32_t *)&free_usb, 1 << u); + atomic_clear_bits((atomic_t *)&free_usb, 1 << u); u = !u; - atomic_clear_bits((uint32_t *)&filled_dma, 1 << d); + atomic_clear_bits((atomic_t *)&filled_dma, 1 << d); } led_reset_record(); diff --git a/board/vell/ec.tasklist b/board/vell/ec.tasklist index 5efc5a8d23..12b87cfab4 100644 --- a/board/vell/ec.tasklist +++ b/board/vell/ec.tasklist @@ -20,6 +20,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ diff --git a/board/vell/gpio.inc b/board/vell/gpio.inc index 27f57f392a..d00baafee7 100644 --- a/board/vell/gpio.inc +++ b/board/vell/gpio.inc @@ -125,6 +125,7 @@ UNUSED(PIN(D, 6)) /* GPOD6/CR_SOUT3/SHDF_ESPI_L */ UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */ UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */ UNUSED(PIN(6, 6)) /* GPIO66 */ +UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */ /* Pre-configured PSL balls: J8 K6 */ diff --git a/board/voema/ec.tasklist b/board/voema/ec.tasklist index 292de51cdb..3e20d8ae39 100644 --- a/board/voema/ec.tasklist +++ b/board/voema/ec.tasklist @@ -16,6 +16,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/volet/ec.tasklist b/board/volet/ec.tasklist index e76bd368eb..ca6d9fbf14 100644 --- a/board/volet/ec.tasklist +++ b/board/volet/ec.tasklist @@ -16,6 +16,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/volteer/ec.tasklist b/board/volteer/ec.tasklist index ec9e64e850..d94a4445b9 100644 --- a/board/volteer/ec.tasklist +++ b/board/volteer/ec.tasklist @@ -16,6 +16,7 @@ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/volteer_ish/board.h b/board/volteer_ish/board.h index 097ee25750..527432285c 100644 --- a/board/volteer_ish/board.h +++ b/board/volteer_ish/board.h @@ -35,7 +35,7 @@ #define CONFIG_ACCEL_BMA255 /* Host command over HECI */ -#define CONFIG_HOSTCMD_HECI +#define CONFIG_HOST_INTERFACE_HECI #define CONFIG_MKBP_EVENT #define CONFIG_MKBP_USE_HECI diff --git a/board/voxel/ec.tasklist b/board/voxel/ec.tasklist index 292de51cdb..174a47eea3 100644 --- a/board/voxel/ec.tasklist +++ b/board/voxel/ec.tasklist @@ -15,7 +15,8 @@ TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/willow/board.c b/board/willow/board.c index ba467fddc2..c5de7d2d95 100644 --- a/board/willow/board.c +++ b/board/willow/board.c @@ -64,13 +64,32 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - {"typec", 0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"other", 1, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + { + .name = "typec", + .port = 0, + .kbps = 400, + .scl = GPIO_I2C1_SCL, + .sda = GPIO_I2C1_SDA + }, + { + .name = "other", + .port = 1, + .kbps = 400, + .scl = GPIO_I2C2_SCL, + .sda = GPIO_I2C2_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct i2c_port_t i2c_bitbang_ports[] = { - {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv}, + { + .name = "battery", + .port = 2, + .kbps = 100, + .scl = GPIO_I2C3_SCL, + .sda = GPIO_I2C3_SDA, + .drv = &bitbang_drv + }, }; const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); diff --git a/board/willow/board.h b/board/willow/board.h index a6907b9a9e..9ec0b9483b 100644 --- a/board/willow/board.h +++ b/board/willow/board.h @@ -81,7 +81,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/wormdingler/board.c b/board/wormdingler/board.c index d8bc04e4fd..e9ad3ab21c 100644 --- a/board/wormdingler/board.c +++ b/board/wormdingler/board.c @@ -119,16 +119,41 @@ static void switchcap_interrupt(enum gpio_signal signal) /* I2C port map */ const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, - GPIO_EC_I2C_POWER_SDA}, - {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, - GPIO_EC_I2C_USB_C0_PD_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 1000, GPIO_EC_I2C_USB_C1_PD_SCL, - GPIO_EC_I2C_USB_C1_PD_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, - GPIO_EC_I2C_EEPROM_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, - GPIO_EC_I2C_SENSOR_SDA}, + { + .name = "power", + .port = I2C_PORT_POWER, + .kbps = 100, + .scl = GPIO_EC_I2C_POWER_SCL, + .sda = GPIO_EC_I2C_POWER_SDA + }, + { + .name = "tcpc0", + .port = I2C_PORT_TCPC0, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_PD_SCL, + .sda = GPIO_EC_I2C_USB_C0_PD_SDA + }, + { + .name = "tcpc1", + .port = I2C_PORT_TCPC1, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_PD_SCL, + .sda = GPIO_EC_I2C_USB_C1_PD_SDA + }, + { + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_EEPROM_SCL, + .sda = GPIO_EC_I2C_EEPROM_SDA + }, + { + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA + }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/wormdingler/board.h b/board/wormdingler/board.h index 83f0e98365..4423a21aeb 100644 --- a/board/wormdingler/board.h +++ b/board/wormdingler/board.h @@ -10,14 +10,6 @@ #include "baseboard.h" -/* TODO(waihong): Remove the following bringup features */ -#define CONFIG_BRINGUP -#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands. */ -#define CONFIG_USB_PD_DEBUG_LEVEL 3 -#define CONFIG_CMD_GPIO_EXTENDED -#define CONFIG_CMD_POWERINDEBUG -#define CONFIG_I2C_DEBUG - #define CONFIG_BUTTON_TRIGGERED_RECOVERY /* Internal SPI flash on NPCX7 */ diff --git a/board/zinger/runtime.c b/board/zinger/runtime.c index 0b6f1995f5..9d27181032 100644 --- a/board/zinger/runtime.c +++ b/board/zinger/runtime.c @@ -4,6 +4,7 @@ */ /* tiny substitute of the runtime layer */ +#include "atomic.h" #include "chip/stm32/clock-f.h" #include "clock.h" #include "common.h" @@ -16,7 +17,7 @@ #include "util.h" volatile uint32_t last_event; -uint32_t sleep_mask; +atomic_t sleep_mask; /* High word of the 64-bit timestamp counter */ static volatile uint32_t clksrc_high; diff --git a/chip/ish/aontaskfw/ish_aontask.c b/chip/ish/aontaskfw/ish_aontask.c index ab3749477f..e2106abf0a 100644 --- a/chip/ish/aontaskfw/ish_aontask.c +++ b/chip/ish/aontaskfw/ish_aontask.c @@ -788,7 +788,7 @@ static void handle_reset(enum ish_pm_state pm_state) * ISH ipc host driver will set DMA_ENABLED_MASK bit when it * is loaded and starts, and clear this bit when it is removed. * - * see: https://github.com/torvalds/linux/blob/master/drivers/ + * see: https://github.com/torvalds/linux/blob/HEAD/drivers/ * hid/intel-ish-hid/ipc/ipc.c * * we have two kinds of reset situations need to handle here: diff --git a/chip/ish/build.mk b/chip/ish/build.mk index 9f220abd21..8072a20791 100644 --- a/chip/ish/build.mk +++ b/chip/ish/build.mk @@ -20,8 +20,8 @@ endif chip-y+=clock.o gpio.o system.o hwtimer.o uart.o flash.o ish_persistent_data.o chip-$(CONFIG_I2C)+=i2c.o chip-$(CONFIG_WATCHDOG)+=watchdog.o -chip-$(CONFIG_HOSTCMD_HECI)+=host_command_heci.o -chip-$(CONFIG_HOSTCMD_HECI)+=heci.o system_state_subsys.o ipc_heci.o +chip-$(CONFIG_HOST_INTERFACE_HECI)+=host_command_heci.o +chip-$(CONFIG_HOST_INTERFACE_HECI)+=heci.o system_state_subsys.o ipc_heci.o chip-$(CONFIG_HID_HECI)+=hid_subsys.o chip-$(CONFIG_HID_HECI)+=heci.o system_state_subsys.o ipc_heci.o chip-$(CONFIG_DMA_PAGING)+=dma.o diff --git a/chip/it83xx/build.mk b/chip/it83xx/build.mk index bbff9f009b..cffd7c68f8 100644 --- a/chip/it83xx/build.mk +++ b/chip/it83xx/build.mk @@ -29,7 +29,7 @@ chip-$(CONFIG_PWM)+=pwm.o chip-$(CONFIG_ADC)+=adc.o chip-$(CONFIG_DAC)+=dac.o chip-$(CONFIG_HOSTCMD_X86)+=lpc.o ec2i.o -chip-$(CONFIG_HOSTCMD_ESPI)+=espi.o +chip-$(CONFIG_HOST_INTERFACE_ESPI)+=espi.o chip-$(CONFIG_SPI_CONTROLLER)+=spi_master.o chip-$(CONFIG_SPI)+=spi.o chip-$(CONFIG_PECI)+=peci.o diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index 41f800721a..72cfa3e2b4 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -232,7 +232,7 @@ static void clock_set_pll(enum pll_freq_idx idx) ext_timer_ms(LOW_POWER_EXT_TIMER, EXT_PSR_32P768K_HZ, 1, 1, 5, 1, 0); task_clear_pending_irq(et_ctrl_regs[LOW_POWER_EXT_TIMER].irq); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* * Workaround for (b:70537592): * We have to set chip select pin as input mode in order to @@ -249,7 +249,7 @@ static void clock_set_pll(enum pll_freq_idx idx) #endif /* Update PLL settings. */ clock_pll_changed(); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI #ifdef IT83XX_ESPI_INHIBIT_CS_BY_PAD_DISABLED /* Enable eSPI pad after changing PLL sequence. */ espi_enable_pad(1); @@ -301,7 +301,8 @@ void clock_init(void) */ IT83XX_GCTRL_RSTS = (IT83XX_GCTRL_RSTS & 0x3F) + 0x40; -#if defined(IT83XX_ESPI_RESET_MODULE_BY_FW) && defined(CONFIG_HOSTCMD_ESPI) +#if defined(IT83XX_ESPI_RESET_MODULE_BY_FW) && \ + defined(CONFIG_HOST_INTERFACE_ESPI) /* * Because we don't support eSPI HW reset function (b/111480168) on DX * version, so we have to reset eSPI configurations during init to @@ -539,7 +540,7 @@ void __enter_hibernate(uint32_t seconds, uint32_t microseconds) /* EC sleep */ ec_sleep = 1; #if defined(IT83XX_ESPI_INHIBIT_CS_BY_PAD_DISABLED) && \ -defined(CONFIG_HOSTCMD_ESPI) +defined(CONFIG_HOST_INTERFACE_ESPI) /* Disable eSPI pad. */ espi_enable_pad(0); #endif @@ -565,7 +566,7 @@ void clock_sleep_mode_wakeup_isr(void) /* trigger a reboot if wake up EC from sleep mode (system hibernate) */ if (clock_ec_wake_from_sleep()) { #if defined(IT83XX_ESPI_INHIBIT_CS_BY_PAD_DISABLED) && \ -defined(CONFIG_HOSTCMD_ESPI) +defined(CONFIG_HOST_INTERFACE_ESPI) /* * Enable eSPI pad. * We will not need to enable eSPI pad here if Dx is able to diff --git a/chip/it83xx/ec2i.c b/chip/it83xx/ec2i.c index be02a8f813..5542d455a9 100644 --- a/chip/it83xx/ec2i.c +++ b/chip/it83xx/ec2i.c @@ -20,7 +20,7 @@ static const struct ec2i_t keyboard_settings[] = { /* Set IRQ=01h for logical device */ {HOST_INDEX_IRQNUMX, 0x01}, /* Configure IRQTP for KBC. */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* * Interrupt request type select (IRQTP) for KBC. * bit 1, 0: IRQ request is buffered and applied to SERIRQ diff --git a/chip/it83xx/intc.c b/chip/it83xx/intc.c index 5e6fd734c4..45fff30c1e 100644 --- a/chip/it83xx/intc.c +++ b/chip/it83xx/intc.c @@ -84,7 +84,7 @@ static void intc_cpu_int_group_12(void) peci_interrupt(); break; #endif -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI case IT83XX_IRQ_ESPI: espi_interrupt(); break; diff --git a/chip/it83xx/lpc.c b/chip/it83xx/lpc.c index 867d9e024f..8a90bd426d 100644 --- a/chip/it83xx/lpc.c +++ b/chip/it83xx/lpc.c @@ -136,7 +136,7 @@ static void keyboard_irq_assert(void) */ static void lpc_generate_smi(void) { -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_vw_set_wire(VW_SMI_L, 0); udelay(65); espi_vw_set_wire(VW_SMI_L, 1); @@ -149,7 +149,7 @@ static void lpc_generate_smi(void) static void lpc_generate_sci(void) { -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_vw_set_wire(VW_SCI_L, 0); udelay(65); espi_vw_set_wire(VW_SCI_L, 1); @@ -377,7 +377,7 @@ void lpc_clear_acpi_status_mask(uint8_t mask) pm_set_status(LPC_ACPI_CMD, mask, 0); } -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI int lpc_get_pltrst_asserted(void) { return !gpio_get_level(GPIO_PCH_PLTRST_L); @@ -688,7 +688,7 @@ static void lpc_init(void) */ IT83XX_GCTRL_SPCTRL1 |= 0xC2; -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI gpio_enable_interrupt(GPIO_PCH_PLTRST_L); #endif @@ -711,7 +711,7 @@ static void lpc_init(void) task_clear_pending_irq(IT83XX_IRQ_PMC3_IN); task_enable_irq(IT83XX_IRQ_PMC3_IN); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_init(); #endif /* Sufficiently initialized */ @@ -726,7 +726,7 @@ static void lpc_init(void) */ DECLARE_HOOK(HOOK_INIT, lpc_init, HOOK_PRIO_INIT_LPC); -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI void lpcrst_interrupt(enum gpio_signal signal) { if (lpc_get_pltrst_asserted()) diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h index 34a2ddd6ae..39aba42315 100644 --- a/chip/it83xx/registers.h +++ b/chip/it83xx/registers.h @@ -1456,7 +1456,7 @@ enum bram_indices { BRAM_IDX_EC_LOG_STATUS = 0xc, /* offset 0x0d ~ 0x1f are reserved for future use. */ -#if defined(CONFIG_HOSTCMD_LPC) || defined(CONFIG_HOSTCMD_ESPI) +#if defined(CONFIG_HOST_INTERFACE_LPC) || defined(CONFIG_HOST_INTERFACE_ESPI) /* * offset 0x20 ~ 0x7b are reserved for future use. * (apply to x86 platform) @@ -1508,7 +1508,7 @@ enum bram_ec_logs_status { * And they will be used to save panic data if the GPG1 reset mechanism * is enabled. */ -#if defined(CONFIG_HOSTCMD_LPC) || defined(CONFIG_HOSTCMD_ESPI) +#if defined(CONFIG_HOST_INTERFACE_LPC) || defined(CONFIG_HOST_INTERFACE_ESPI) /* offset 0x80 ~ 0xbf */ #define IT83XX_BRAM_BANK1(i) REG8(IT83XX_BRAM_BASE + 0x80 + i) #else diff --git a/chip/it83xx/system.c b/chip/it83xx/system.c index 16871e5826..ae7fd627bf 100644 --- a/chip/it83xx/system.c +++ b/chip/it83xx/system.c @@ -50,7 +50,7 @@ static void clear_reset_flags(void) } DECLARE_HOOK(HOOK_INIT, clear_reset_flags, HOOK_PRIO_LAST); -#if !defined(CONFIG_HOSTCMD_LPC) && !defined(CONFIG_HOSTCMD_ESPI) +#if !defined(CONFIG_HOST_INTERFACE_LPC) && !defined(CONFIG_HOST_INTERFACE_ESPI) static void system_save_panic_data_to_bram(void) { uint8_t *ptr = (uint8_t *)PANIC_DATA_PTR; diff --git a/chip/lm4/build.mk b/chip/lm4/build.mk index 26419d3a04..c1d7787bf3 100644 --- a/chip/lm4/build.mk +++ b/chip/lm4/build.mk @@ -20,7 +20,7 @@ chip-$(CONFIG_EEPROM)+=eeprom.o chip-$(CONFIG_FANS)+=fan.o chip-$(CONFIG_FLASH_PHYSICAL)+=flash.o chip-$(CONFIG_I2C)+=i2c.o -chip-$(CONFIG_HOSTCMD_LPC)+=lpc.o +chip-$(CONFIG_HOST_INTERFACE_LPC)+=lpc.o chip-$(CONFIG_PECI)+=peci.o # pwm functions are implemented with the fan functions chip-$(CONFIG_PWM)+=pwm.o fan.o diff --git a/chip/lm4/config_chip.h b/chip/lm4/config_chip.h index 4e442004c9..8e1ea51785 100644 --- a/chip/lm4/config_chip.h +++ b/chip/lm4/config_chip.h @@ -93,7 +93,7 @@ /* Optional features present on this chip */ #define CONFIG_ADC #define CONFIG_HOSTCMD_ALIGNED -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_PECI #define CONFIG_RTC #define CONFIG_SWITCH diff --git a/chip/lm4/registers.h b/chip/lm4/registers.h index 0c59da19f6..1065cd7f5e 100644 --- a/chip/lm4/registers.h +++ b/chip/lm4/registers.h @@ -8,6 +8,7 @@ #ifndef __CROS_EC_REGISTERS_H #define __CROS_EC_REGISTERS_H +#include "atomic.h" #include "common.h" #define LM4_UART_CH0_BASE 0x4000c000 @@ -265,7 +266,7 @@ static inline int lm4_fan_addr(int ch, int offset) #define LM4_SYSTEM_SRI2C REG32(0x400fe520) #define LM4_SYSTEM_SREEPROM REG32(0x400fe558) -#define LM4_SYSTEM_SRI2C_ADDR ((uint32_t *)0x400fe520) +#define LM4_SYSTEM_SRI2C_ADDR ((atomic_t *)0x400fe520) #define LM4_SYSTEM_RCGC_BASE ((volatile uint32_t *)0x400fe600) #define LM4_SYSTEM_RCGCGPIO REG32(0x400fe608) diff --git a/chip/lm4/uart.c b/chip/lm4/uart.c index 0b923f0692..83136d0b46 100644 --- a/chip/lm4/uart.c +++ b/chip/lm4/uart.c @@ -123,7 +123,7 @@ static void uart_host_interrupt(void) /* Clear transmit and receive interrupt status */ LM4_UART_ICR(CONFIG_UART_HOST) = 0x70; -#ifdef CONFIG_HOSTCMD_LPC +#ifdef CONFIG_HOST_INTERFACE_LPC /* * If we have space in our FIFO and a character is pending in LPC, * handle that character. diff --git a/chip/mchp/build.mk b/chip/mchp/build.mk index 155fbf385f..226fe23363 100644 --- a/chip/mchp/build.mk +++ b/chip/mchp/build.mk @@ -32,7 +32,7 @@ endif chip-y=clock.o gpio.o hwtimer.o system.o uart.o port80.o tfdp.o chip-$(CONFIG_ADC)+=adc.o chip-$(CONFIG_DMA)+=dma.o -chip-$(CONFIG_HOSTCMD_ESPI)+=espi.o +chip-$(CONFIG_HOST_INTERFACE_ESPI)+=espi.o chip-$(CONFIG_FANS)+=fan.o chip-$(CONFIG_FLASH_PHYSICAL)+=flash.o chip-$(CONFIG_I2C)+=i2c.o diff --git a/chip/mchp/clock.c b/chip/mchp/clock.c index 362025ee1c..7a3914194b 100644 --- a/chip/mchp/clock.c +++ b/chip/mchp/clock.c @@ -395,7 +395,7 @@ static void prepare_for_deep_sleep(void) #endif -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_INT_SOURCE(22) = MCHP_INT22_WAKE_ONLY_ESPI; MCHP_INT_ENABLE(22) = MCHP_INT22_WAKE_ONLY_ESPI; #else @@ -475,7 +475,7 @@ static void resume_from_deep_sleep(void) */ MCHP_PCR_SLP_EN3 |= (MCHP_PCR_SLP_EN3_HTMR0); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI #ifdef CONFIG_POWER_S0IX MCHP_INT_DISABLE(22) = MCHP_INT22_WAKE_ONLY_ESPI; MCHP_INT_SOURCE(22) = MCHP_INT22_WAKE_ONLY_ESPI; diff --git a/chip/mchp/espi.c b/chip/mchp/espi.c index a7db914f3b..778990b852 100644 --- a/chip/mchp/espi.c +++ b/chip/mchp/espi.c @@ -1386,7 +1386,7 @@ void espi_init(void) (CONFIG_HOSTCMD_ESPI_EC_MODE << MCHP_ESPI_CAP1_IO_BITPOS); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_ESPI_IO_PLTRST_SRC = MCHP_ESPI_PLTRST_SRC_VW; #else MCHP_ESPI_IO_PLTRST_SRC = MCHP_ESPI_PLTRST_SRC_PIN; diff --git a/chip/mchp/lpc.c b/chip/mchp/lpc.c index 9f6a731eb5..9e64281276 100644 --- a/chip/mchp/lpc.c +++ b/chip/mchp/lpc.c @@ -88,7 +88,7 @@ static void keyboard_irq_assert(void) static void lpc_generate_smi(void) { CPUTS("LPC Pulse SMI"); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* eSPI: pulse SMI# Virtual Wire low */ espi_vw_pulse_wire(VW_SMI_L, 0); #else @@ -106,7 +106,7 @@ static void lpc_generate_sci(void) udelay(65); gpio_set_level(CONFIG_SCI_GPIO, 1); #else -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_vw_pulse_wire(VW_SCI_L, 0); #else MCHP_ACPI_PM_STS |= 1; @@ -129,7 +129,7 @@ static void lpc_update_wake(host_event_t wake_events) */ wake_events &= ~EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_vw_set_wire(VW_WAKE_L, !wake_events); #else /* Signal is asserted low when wake events is non-zero */ @@ -304,7 +304,7 @@ const int acpi_ec_nvic_ibf[] = { }; BUILD_ASSERT(ARRAY_SIZE(acpi_ec_nvic_ibf) == MCHP_ACPI_EC_INSTANCES); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI const int acpi_ec_espi_bar_id[] = { MCHP_ESPI_IO_BAR_ID_ACPI_EC0, MCHP_ESPI_IO_BAR_ID_ACPI_EC1, @@ -326,7 +326,7 @@ void chip_acpi_ec_config(int instance, uint32_t io_base, uint8_t mask) MCHP_PCR_SLP_DIS_DEV(acpi_ec_pcr_slp[instance]); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_ESPI_IO_BAR_CTL_MASK(acpi_ec_espi_bar_id[instance]) = mask; MCHP_ESPI_IO_BAR(acpi_ec_espi_bar_id[instance]) = @@ -350,7 +350,7 @@ void chip_8042_config(uint32_t io_base) { MCHP_PCR_SLP_DIS_DEV(MCHP_PCR_8042); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_ESPI_IO_BAR_CTL_MASK(MCHP_ESPI_IO_BAR_ID_8042) = 0x04; MCHP_ESPI_IO_BAR(MCHP_ESPI_IO_BAR_ID_8042) = (io_base << 16) + 0x01ul; @@ -372,7 +372,7 @@ void chip_8042_config(uint32_t io_base) #ifndef CONFIG_KEYBOARD_IRQ_GPIO /* Set up SERIRQ for keyboard */ MCHP_8042_KB_CTRL |= BIT(5); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* Delivery 8042 keyboard interrupt as IRQ1 using eSPI SERIRQ */ MCHP_ESPI_IO_SERIRQ_REG(MCHP_ESPI_SIRQ_8042_KB) = 1; #else @@ -392,7 +392,7 @@ void chip_8042_config(uint32_t io_base) */ void chip_emi0_config(uint32_t io_base) { -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_ESPI_IO_BAR_CTL_MASK(MCHP_ESPI_IO_BAR_ID_EMI0) = 0x0F; MCHP_ESPI_IO_BAR(MCHP_ESPI_IO_BAR_ID_EMI0) = (io_base << 16) + 0x01ul; @@ -442,7 +442,7 @@ void chip_port80_config(uint32_t io_base) MCHP_P80_CFG(0) = MCHP_P80_FLUSH_FIFO_WO + MCHP_P80_RESET_TIMESTAMP_WO; -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_ESPI_IO_BAR_CTL_MASK(MCHP_ESPI_IO_BAR_P80_0) = 0x00; MCHP_ESPI_IO_BAR(MCHP_ESPI_IO_BAR_P80_0) = (io_base << 16) + 0x01ul; @@ -484,7 +484,7 @@ static void chip_lpc_iobar_debug(void) * For eSPI PLATFORM_RESET# virtual wire is used as LRESET# * */ -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI static void setup_lpc(void) { MCHP_LPC_CFG_BAR |= (1ul << 15); @@ -545,7 +545,7 @@ static void lpc_init(void) MCHP_PCR_SLP_EN2_ACPI_EC0 + MCHP_PCR_SLP_EN2_MIF8042); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_init(); @@ -621,7 +621,7 @@ void lpc_set_init_done(int val) */ void lpcrst_interrupt(enum gpio_signal signal) { -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI /* Initialize LPC module when LRESET# is de-asserted */ if (!lpc_get_pltrst_asserted()) { setup_lpc(); @@ -941,10 +941,10 @@ void lpc_clear_acpi_status_mask(uint8_t mask) */ int lpc_get_pltrst_asserted(void) { -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* * eSPI PLTRST# a VWire or side-band signal - * Controlled by CONFIG_HOSTCMD_ESPI + * Controlled by CONFIG_HOST_INTERFACE_ESPI */ return !espi_vw_get_wire(VW_PLTRST_L); #else diff --git a/chip/mchp/lpc_chip.h b/chip/mchp/lpc_chip.h index dcb5577fc1..434b307968 100644 --- a/chip/mchp/lpc_chip.h +++ b/chip/mchp/lpc_chip.h @@ -8,7 +8,7 @@ #ifndef __CROS_EC_LPC_CHIP_H #define __CROS_EC_LPC_CHIP_H -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI #include "espi.h" @@ -37,7 +37,7 @@ void lpc_set_init_done(int val); void lpc_mem_mapped_init(void); -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI void lpcrst_interrupt(enum gpio_signal signal); #endif diff --git a/chip/mchp/system.c b/chip/mchp/system.c index 5591c818c4..72c96bef8f 100644 --- a/chip/mchp/system.c +++ b/chip/mchp/system.c @@ -178,7 +178,7 @@ void system_pre_init(void) MCHP_EC_AHB_ERR_EN = 0; /* enable capture of address on error */ /* Manual voltage selection only required for MEC170x and MEC152x */ - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) vtr3_voltage_select(1); else vtr3_voltage_select(0); @@ -427,7 +427,7 @@ int system_get_scratchpad(uint32_t *value) * defined for MEC170x and the IS_ENABLED() macro causes the * compiler to evaluate both true and false code paths. */ -#if defined(CONFIG_HOSTCMD_ESPI) +#if defined(CONFIG_HOST_INTERFACE_ESPI) static void disable_host_ifc_clocks(void) { MCHP_ESPI_ACTIVATE &= ~0x01; diff --git a/chip/mec1322/build.mk b/chip/mec1322/build.mk index 2b0c9cc229..dd0ef8cd90 100644 --- a/chip/mec1322/build.mk +++ b/chip/mec1322/build.mk @@ -22,7 +22,7 @@ chip-$(CONFIG_ADC)+=adc.o chip-$(CONFIG_FANS)+=fan.o chip-$(CONFIG_FLASH_PHYSICAL)+=flash.o chip-$(CONFIG_I2C)+=i2c.o -chip-$(CONFIG_HOSTCMD_LPC)+=lpc.o +chip-$(CONFIG_HOST_INTERFACE_LPC)+=lpc.o chip-$(CONFIG_PWM)+=pwm.o chip-$(CONFIG_WATCHDOG)+=watchdog.o ifndef CONFIG_KEYBOARD_NOT_RAW diff --git a/chip/mec1322/config_chip.h b/chip/mec1322/config_chip.h index 414fb492bf..951de3fb4f 100644 --- a/chip/mec1322/config_chip.h +++ b/chip/mec1322/config_chip.h @@ -103,7 +103,7 @@ #define CONFIG_MPU #endif #define CONFIG_DMA -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_SPI #define CONFIG_SWITCH diff --git a/chip/npcx/build.mk b/chip/npcx/build.mk index 3a41cfbd53..246ab84f34 100644 --- a/chip/npcx/build.mk +++ b/chip/npcx/build.mk @@ -33,9 +33,9 @@ chip-$(CONFIG_FANS)+=fan.o chip-$(CONFIG_FLASH_PHYSICAL)+=flash.o chip-$(CONFIG_I2C)+=i2c.o i2c-$(CHIP_FAMILY).o chip-$(CONFIG_HOSTCMD_X86)+=lpc.o -chip-$(CONFIG_HOSTCMD_ESPI)+=espi.o +chip-$(CONFIG_HOST_INTERFACE_ESPI)+=espi.o chip-$(CONFIG_PECI)+=peci.o -chip-$(CONFIG_HOSTCMD_SHI)+=shi.o +chip-$(CONFIG_HOST_INTERFACE_SHI)+=shi.o chip-$(CONFIG_CEC)+=cec.o # pwm functions are implemented with the fan functions chip-$(CONFIG_PWM)+=pwm.o diff --git a/chip/npcx/clock.c b/chip/npcx/clock.c index ad611973be..ab3bd7f119 100644 --- a/chip/npcx/clock.c +++ b/chip/npcx/clock.c @@ -422,7 +422,7 @@ void __idle(void) * CSAE bit is set. Please notice this symptom only * occurs at npcx5. */ -#if defined(CHIP_FAMILY_NPCX5) && defined(CONFIG_HOSTCMD_ESPI) +#if defined(CHIP_FAMILY_NPCX5) && defined(CONFIG_HOST_INTERFACE_ESPI) /* Enable Host access wakeup */ SET_BIT(NPCX_WKEN(MIWU_TABLE_0, MIWU_GROUP_5), 6); #endif diff --git a/chip/npcx/gpio-npcx5.c b/chip/npcx/gpio-npcx5.c index c6fcf7351b..9412aa9d9f 100644 --- a/chip/npcx/gpio-npcx5.c +++ b/chip/npcx/gpio-npcx5.c @@ -67,7 +67,7 @@ static void __gpio_wk0efgh_interrupt(void) SET_BIT(NPCX_WKPCL(MIWU_TABLE_0, MIWU_GROUP_5), 6); return; } - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) { + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) { if (IS_BIT_SET(NPCX_WKEN(MIWU_TABLE_0, MIWU_GROUP_5), 5) && IS_BIT_SET(NPCX_WKPND(MIWU_TABLE_0, MIWU_GROUP_5), 5)) { @@ -179,7 +179,7 @@ DECLARE_IRQ(NPCX_IRQ_KSI_WKINTC_1, __gpio_wk1c_interrupt, 3); #endif DECLARE_IRQ(NPCX_IRQ_WKINTD_1, __gpio_wk1d_interrupt, 3); DECLARE_IRQ(NPCX_IRQ_WKINTE_1, __gpio_wk1e_interrupt, 3); -#ifdef CONFIG_HOSTCMD_SHI +#ifdef CONFIG_HOST_INTERFACE_SHI /* * HACK: Make CS GPIO P2 to improve SHI reliability. * TODO: Increase CS-assertion-to-transaction-start delay on host to diff --git a/chip/npcx/gpio-npcx9.c b/chip/npcx/gpio-npcx9.c index e9e8ad2ad9..31ed4e62ac 100644 --- a/chip/npcx/gpio-npcx9.c +++ b/chip/npcx/gpio-npcx9.c @@ -70,7 +70,7 @@ static void __gpio_host_interrupt(void) SET_BIT(NPCX_WKPCL(MIWU_TABLE_0, MIWU_GROUP_5), 6); return; } - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) { + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) { if (IS_BIT_SET(NPCX_WKEN(MIWU_TABLE_0, MIWU_GROUP_5), 5) && IS_BIT_SET(NPCX_WKPND(MIWU_TABLE_0, MIWU_GROUP_5), 5)) { @@ -195,7 +195,7 @@ DECLARE_IRQ(NPCX_IRQ_KSI_WKINTC_1, __gpio_wk1c_interrupt, 3); #endif DECLARE_IRQ(NPCX_IRQ_WKINTD_1, __gpio_wk1d_interrupt, 3); DECLARE_IRQ(NPCX_IRQ_WKINTE_1, __gpio_wk1e_interrupt, 3); -#ifdef CONFIG_HOSTCMD_SHI +#ifdef CONFIG_HOST_INTERFACE_SHI /* * HACK: Make CS GPIO P2 to improve SHI reliability. * TODO: Increase CS-assertion-to-transaction-start delay on host to diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c index e740f0aa9f..5f1e3c78b6 100644 --- a/chip/npcx/gpio.c +++ b/chip/npcx/gpio.c @@ -560,7 +560,7 @@ void gpio_pre_init(void) #endif /* Pin_Mux for LPC & SHI */ -#ifdef CONFIG_HOSTCMD_SHI +#ifdef CONFIG_HOST_INTERFACE_SHI /* Switching to eSPI mode for SHI interface */ NPCX_DEVCNT |= 0x08; /* Alternate Intel bus interface LPC/eSPI to GPIOs first */ diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c index 9bb2de8936..c80bf2960b 100644 --- a/chip/npcx/lpc.c +++ b/chip/npcx/lpc.c @@ -86,7 +86,7 @@ static void lpc_task_enable_irq(void) #endif task_enable_irq(NPCX_IRQ_PM_CHAN_IBF); task_enable_irq(NPCX_IRQ_PORT80); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI task_enable_irq(NPCX_IRQ_ESPI); /* Virtual Wire: SLP_S3/4/5, SUS_STAT, PLTRST, OOB_RST_WARN */ task_enable_irq(NPCX_IRQ_WKINTA_2); @@ -105,7 +105,7 @@ static void lpc_task_disable_irq(void) #endif task_disable_irq(NPCX_IRQ_PM_CHAN_IBF); task_disable_irq(NPCX_IRQ_PORT80); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI task_disable_irq(NPCX_IRQ_ESPI); /* Virtual Wire: SLP_S3/4/5, SUS_STAT, PLTRST, OOB_RST_WARN */ task_disable_irq(NPCX_IRQ_WKINTA_2); @@ -137,7 +137,7 @@ static void lpc_generate_smi(void) udelay(65); /* Set signal high, now that we've generated the edge */ gpio_set_level(GPIO_PCH_SMI_L, 1); -#elif defined(CONFIG_HOSTCMD_ESPI) +#elif defined(CONFIG_HOST_INTERFACE_ESPI) /* * Don't use SET_BIT/CLEAR_BIT macro to toggle SMIB/SCIB to generate * virtual wire. Use NPCX_VW_SMI/NPCX_VW_SCI macro instead. @@ -183,7 +183,7 @@ static void lpc_generate_sci(void) udelay(65); /* Set signal high, now that we've generated the edge */ gpio_set_level(CONFIG_SCI_GPIO, 1); -#elif defined(CONFIG_HOSTCMD_ESPI) +#elif defined(CONFIG_HOST_INTERFACE_ESPI) /* * Don't use SET_BIT/CLEAR_BIT macro to toggle SMIB/SCIB to generate * virtual wire. Use NPCX_VW_SMI/NPCX_VW_SCI macro instead. @@ -698,7 +698,7 @@ void host_register_init(void) * EC hardware will put those 4 bytes of Port80 code to DP80BUF FIFO. * This is only supported when CHIP_FAMILY >= NPCX9. */ - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) sib_write_reg(SIO_OFFSET, 0xFD, 0x0F); /* enable SHM */ sib_write_reg(SIO_OFFSET, 0x30, 0x01); @@ -721,7 +721,7 @@ int lpc_get_pltrst_asserted(void) return IS_BIT_SET(NPCX_MSWCTL1, NPCX_MSWCTL1_PLTRST_ACT); } -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI /* Initialize host settings by interrupt */ void lpc_lreset_pltrst_handler(void) { @@ -771,7 +771,7 @@ static void lpc_init(void) * In npcx9, the booter will not do this anymore. The HIF_TYP_SEL * field should be set by firmware. */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* Initialize eSPI module */ NPCX_DEVCNT |= 0x08; espi_init(); @@ -787,7 +787,7 @@ static void lpc_init(void) /* Clear Host Access Hold state */ NPCX_SMC_CTL = 0xC0; -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI /* * Set alternative pin from GPIO to CLKRUN no matter SERIRQ is under * continuous or quiet mode. @@ -800,7 +800,7 @@ static void lpc_init(void) * valid if CONFIG_SCI_GPIO isn't defined. eSPI sends SMI/SCI through VW * automatically by toggling them, too. It's unnecessary to set pin mux. */ -#if !defined(CONFIG_SCI_GPIO) && !defined(CONFIG_HOSTCMD_ESPI) +#if !defined(CONFIG_SCI_GPIO) && !defined(CONFIG_HOST_INTERFACE_ESPI) SET_BIT(NPCX_DEVALT(1), NPCX_DEVALT1_EC_SCI_SL); SET_BIT(NPCX_DEVALT(1), NPCX_DEVALT1_SMI_SL); #endif @@ -876,7 +876,7 @@ static void lpc_init(void) * Init PORT80 * Enable Port80, Enable Port80 function & Interrupt & Read auto */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI NPCX_DP80CTL = 0x2b; #else NPCX_DP80CTL = 0x29; @@ -926,7 +926,7 @@ static void lpc_init(void) /* initial IO port address via SIB-write modules */ host_register_init(); #else -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI /* * Initialize LRESET# interrupt only in case of LPC. For eSPI, there is * no dedicated GPIO pin for LRESET/PLTRST. PLTRST is indicated as a VW diff --git a/chip/npcx/shi_chip.h b/chip/npcx/shi_chip.h index c14aec196e..3fd73e8119 100644 --- a/chip/npcx/shi_chip.h +++ b/chip/npcx/shi_chip.h @@ -5,10 +5,9 @@ /* NPCX-specific SHI module for Chrome EC */ -#ifndef SHI_CHIP_H_ -#define SHI_CHIP_H_ +#ifndef __CROS_EC_SHI_CHIP_H_ +#define __CROS_EC_SHI_CHIP_H_ -#ifdef CONFIG_HOSTCMD_SHI /** * Called when the NSS level changes, signalling the start of a SHI * transaction. @@ -19,6 +18,5 @@ void shi_cs_event(enum gpio_signal signal); #ifdef NPCX_SHI_V2 void shi_cs_gpio_int(enum gpio_signal signal); #endif -#endif -#endif /* SHI_CHIP_H_ */ +#endif /* __CROS_EC_SHI_CHIP_H_ */ diff --git a/chip/npcx/sib.c b/chip/npcx/sib.c index b62946fc96..424048518e 100644 --- a/chip/npcx/sib.c +++ b/chip/npcx/sib.c @@ -19,7 +19,7 @@ * For eSPI - it is 200 us. * For LPC - it is 5 us. */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI #define HOST_TRANSACTION_TIMEOUT_US 200 #else #define HOST_TRANSACTION_TIMEOUT_US 5 diff --git a/chip/npcx/system.c b/chip/npcx/system.c index ac7056330f..97fcd01c41 100644 --- a/chip/npcx/system.c +++ b/chip/npcx/system.c @@ -872,7 +872,7 @@ void system_pre_init(void) BIT(NPCX_PWDWN_CTL6_ITIM6_PD) | #endif BIT(NPCX_PWDWN_CTL6_ITIM4_PD); /* Skip ITIM5_PD */ -#if !defined(CONFIG_HOSTCMD_ESPI) +#if !defined(CONFIG_HOST_INTERFACE_ESPI) pwdwn6 |= 1 << NPCX_PWDWN_CTL6_ESPI_PD; #endif NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_6) = pwdwn6; diff --git a/chip/stm32/usart_info_command.c b/chip/stm32/usart_info_command.c index 2649a97351..50d56aa2ba 100644 --- a/chip/stm32/usart_info_command.c +++ b/chip/stm32/usart_info_command.c @@ -25,8 +25,8 @@ static int command_usart_info(int argc, char **argv) " dropped %d bytes\n" " overran %d times\n", config->hw->index + 1, - atomic_clear((uint32_t *)&(config->state->rx_dropped)), - atomic_clear((uint32_t *)&(config->state->rx_overrun))); + atomic_clear((atomic_t *)&(config->state->rx_dropped)), + atomic_clear((atomic_t *)&(config->state->rx_overrun))); if (config->rx->info) config->rx->info(config); diff --git a/chip/stm32/usart_rx_dma.c b/chip/stm32/usart_rx_dma.c index a185878261..13c63949dd 100644 --- a/chip/stm32/usart_rx_dma.c +++ b/chip/stm32/usart_rx_dma.c @@ -81,7 +81,7 @@ static void usart_rx_dma_interrupt_common( /* (new_index == old_index): nothing to add to the queue. */ } - atomic_add((uint32_t *)&(config->state->rx_dropped), new_bytes - added); + atomic_add((atomic_t *)&(config->state->rx_dropped), new_bytes - added); if (dma_config->state->max_bytes < new_bytes) dma_config->state->max_bytes = new_bytes; @@ -115,5 +115,5 @@ void usart_rx_dma_info(struct usart_config const *config) DOWNCAST(config->rx, struct usart_rx_dma const, usart_rx); ccprintf(" DMA RX max_bytes %d\n", - atomic_clear((uint32_t *)&dma_config->state->max_bytes)); + atomic_clear((atomic_t *)&dma_config->state->max_bytes)); } diff --git a/chip/stm32/usart_rx_interrupt-stm32f4.c b/chip/stm32/usart_rx_interrupt-stm32f4.c index 198c6dd180..b796ae1175 100644 --- a/chip/stm32/usart_rx_interrupt-stm32f4.c +++ b/chip/stm32/usart_rx_interrupt-stm32f4.c @@ -33,7 +33,7 @@ static void usart_rx_interrupt_handler(struct usart_config const *config) uint8_t byte = STM32_USART_RDR(base); if (!queue_add_unit(config->producer.queue, &byte)) - atomic_add((uint32_t *)&(config->state->rx_dropped), 1); + atomic_add((atomic_t *)&(config->state->rx_dropped), 1); } } diff --git a/chip/stm32/usart_rx_interrupt-stm32l.c b/chip/stm32/usart_rx_interrupt-stm32l.c index 24ca7a0487..7c3f765f19 100644 --- a/chip/stm32/usart_rx_interrupt-stm32l.c +++ b/chip/stm32/usart_rx_interrupt-stm32l.c @@ -39,14 +39,14 @@ static void usart_rx_interrupt_handler(struct usart_config const *config) if (!(status & STM32_USART_SR_RXNE)) (void)STM32_USART_RDR(config->hw->base); - atomic_add((uint32_t *)&(config->state->rx_overrun), 1); + atomic_add((atomic_t *)&(config->state->rx_overrun), 1); } if (status & STM32_USART_SR_RXNE) { uint8_t byte = STM32_USART_RDR(base); if (!queue_add_unit(config->producer.queue, &byte)) - atomic_add((uint32_t *)&(config->state->rx_dropped), 1); + atomic_add((atomic_t *)&(config->state->rx_dropped), 1); } } diff --git a/chip/stm32/usart_rx_interrupt.c b/chip/stm32/usart_rx_interrupt.c index 3bc30d4aaf..49d4e83894 100644 --- a/chip/stm32/usart_rx_interrupt.c +++ b/chip/stm32/usart_rx_interrupt.c @@ -30,7 +30,7 @@ static void usart_rx_interrupt_handler(struct usart_config const *config) uint8_t byte = STM32_USART_RDR(base); if (!queue_add_unit(config->producer.queue, &byte)) - atomic_add((uint32_t *)&(config->state->rx_dropped), 1); + atomic_add((atomic_t *)&(config->state->rx_dropped), 1); } } diff --git a/chip/stm32/usb.c b/chip/stm32/usb.c index dde84efaea..a1f60e8906 100644 --- a/chip/stm32/usb.c +++ b/chip/stm32/usb.c @@ -578,7 +578,7 @@ void usb_wake(void) } /* Only allow one caller at a time. */ - if (!atomic_clear((int *)&usb_wake_done)) + if (!atomic_clear((atomic_t *)&usb_wake_done)) return; CPRINTF("WAKE\n"); diff --git a/chip/stm32/usb_hid_keyboard.c b/chip/stm32/usb_hid_keyboard.c index ac4a9f5a1f..b4561d591f 100644 --- a/chip/stm32/usb_hid_keyboard.c +++ b/chip/stm32/usb_hid_keyboard.c @@ -397,7 +397,7 @@ static void write_keyboard_report(void) return; } - if (atomic_clear((int *)&hid_ep_data_ready)) { + if (atomic_clear((atomic_t *)&hid_ep_data_ready)) { /* * Endpoint is not busy, and interrupt handler did not just * send the buffer: enable TX. diff --git a/common/build.mk b/common/build.mk index 901d0d3c9d..d00a7f8bb1 100644 --- a/common/build.mk +++ b/common/build.mk @@ -30,6 +30,7 @@ common-$(CONFIG_ACCEL_LIS2DS)+=math_util.o common-$(CONFIG_ACCEL_KXCJ9)+=math_util.o common-$(CONFIG_ACCEL_KX022)+=math_util.o common-$(CONFIG_TEMP_SENSOR_TMP112)+=math_util.o +common-$(CONFIG_TEMP_SENSOR_PCT2075)+=math_util.o ifneq ($(CORE),cortex-m) common-$(CONFIG_AES)+=aes.o endif @@ -83,7 +84,7 @@ common-$(CONFIG_DEVICE_STATE)+=device_state.o common-$(CONFIG_DPTF)+=dptf.o common-$(CONFIG_EC_EC_COMM_CLIENT)+=ec_ec_comm_client.o common-$(CONFIG_EC_EC_COMM_SERVER)+=ec_ec_comm_server.o -common-$(CONFIG_HOSTCMD_ESPI)+=espi.o +common-$(CONFIG_HOST_INTERFACE_ESPI)+=espi.o common-$(CONFIG_EXTPOWER_GPIO)+=extpower_gpio.o common-$(CONFIG_EXTPOWER)+=extpower_common.o common-$(CONFIG_FANS)+=fan.o pwm.o diff --git a/common/charge_manager.c b/common/charge_manager.c index 3d41c3a08d..041f41f1bc 100644 --- a/common/charge_manager.c +++ b/common/charge_manager.c @@ -1388,9 +1388,9 @@ void charge_manager_source_port(int port, int enable) int p, rp; if (enable) - atomic_or((uint32_t *)&source_port_bitmap, 1 << port); + atomic_or((atomic_t *)&source_port_bitmap, 1 << port); else - atomic_clear_bits((uint32_t *)&source_port_bitmap, 1 << port); + atomic_clear_bits((atomic_t *)&source_port_bitmap, 1 << port); /* No change, exit early. */ if (prev_bitmap == source_port_bitmap) diff --git a/common/charge_state_v2.c b/common/charge_state_v2.c index abb271cad4..75ffad576b 100644 --- a/common/charge_state_v2.c +++ b/common/charge_state_v2.c @@ -1200,7 +1200,12 @@ static int shutdown_on_critical_battery(void) switch (board_critical_shutdown_check(&curr)) { case CRITICAL_SHUTDOWN_HIBERNATE: if (IS_ENABLED(CONFIG_HIBERNATE)) { - if (power_get_state() == POWER_S3S5) + /* + * If the chipset is on its way down but not + * quite there yet, give it a little time to + * get there. + */ + if (!chipset_in_state(CHIPSET_STATE_ANY_OFF)) sleep(1); CPRINTS("Hibernate due to critical battery"); cflush(); @@ -1208,7 +1213,11 @@ static int shutdown_on_critical_battery(void) } break; case CRITICAL_SHUTDOWN_CUTOFF: - if (power_get_state() == POWER_S3S5) + /* + * Give the chipset just a sec to get to off if + * it's trying. + */ + if (!chipset_in_state(CHIPSET_STATE_ANY_OFF)) sleep(1); CPRINTS("Cutoff due to critical battery"); cflush(); diff --git a/common/ec_features.c b/common/ec_features.c index a7e097e733..2147c1b48a 100644 --- a/common/ec_features.c +++ b/common/ec_features.c @@ -147,6 +147,9 @@ uint32_t get_feature_flags1(void) #ifdef CONFIG_USB_MUX_AP_ACK_REQUEST | EC_FEATURE_MASK_1(EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK) #endif +#ifdef CONFIG_POWER_S4_RESIDENCY + | EC_FEATURE_MASK_1(EC_FEATURE_S4_RESIDENCY) +#endif ; return board_override_feature_flags1(result); } diff --git a/common/fmap.c b/common/fmap.c index 47fa75f0e9..6bae9c7f85 100644 --- a/common/fmap.c +++ b/common/fmap.c @@ -13,7 +13,7 @@ /* * FMAP structs. - * See https://chromium.googlesource.com/chromiumos/third_party/flashmap/+/master/lib/fmap.h + * See https://chromium.googlesource.com/chromiumos/third_party/flashmap/+/HEAD/lib/fmap.h */ #define FMAP_NAMELEN 32 #define FMAP_SIGNATURE "__FMAP__" diff --git a/common/keyboard_scan.c b/common/keyboard_scan.c index 071b441cfa..d192214f1e 100644 --- a/common/keyboard_scan.c +++ b/common/keyboard_scan.c @@ -140,9 +140,9 @@ void keyboard_scan_enable(int enable, enum kb_scan_disable_masks mask) { /* Access atomically */ if (enable) { - atomic_clear_bits((uint32_t *)&disable_scanning_mask, mask); + atomic_clear_bits((atomic_t *)&disable_scanning_mask, mask); } else { - atomic_or((uint32_t *)&disable_scanning_mask, mask); + atomic_or((atomic_t *)&disable_scanning_mask, mask); clear_typematic_key(); } diff --git a/common/led_common.c b/common/led_common.c index 85879b148f..6c0e2ac426 100644 --- a/common/led_common.c +++ b/common/led_common.c @@ -47,6 +47,16 @@ int led_auto_control_is_enabled(enum ec_led_id led_id) return (led_auto_control_flags & LED_AUTO_CONTROL_FLAG(led_id)) != 0; } +__attribute__((weak)) void board_led_auto_control(void) +{ + /* + * The projects have only power led won't change the led + * state immediately as the auto command is called for + * they only check the led state while the power state + * is changed. + */ +} + static enum ec_status led_command_control(struct host_cmd_handler_args *args) { const struct ec_params_led_control *p = args->params; @@ -69,6 +79,8 @@ static enum ec_status led_command_control(struct host_cmd_handler_args *args) if (p->flags & EC_LED_FLAGS_AUTO) { led_auto_control(p->led_id, 1); + if (!IS_ENABLED(CONFIG_LED_ONOFF_STATES)) + board_led_auto_control(); } else { if (led_set_brightness(p->led_id, p->brightness) != EC_SUCCESS) return EC_RES_INVALID_PARAM; diff --git a/common/mock/usb_pd_dpm_mock.c b/common/mock/usb_pd_dpm_mock.c index 8b6fbaa30e..766cdcecf4 100644 --- a/common/mock/usb_pd_dpm_mock.c +++ b/common/mock/usb_pd_dpm_mock.c @@ -31,6 +31,10 @@ void dpm_init(int port) dpm[port].mode_exit_request = false; } +void dpm_mode_exit_complete(int port) +{ +} + void dpm_vdm_acked(int port, enum tcpci_msg_type type, int vdo_count, uint32_t *vdm) { diff --git a/common/system.c b/common/system.c index 5e18170b59..621ed6a99d 100644 --- a/common/system.c +++ b/common/system.c @@ -72,11 +72,11 @@ STATIC_IF(CONFIG_HIBERNATE) uint32_t hibernate_seconds; STATIC_IF(CONFIG_HIBERNATE) uint32_t hibernate_microseconds; /* On-going actions preventing going into deep-sleep mode */ -uint32_t sleep_mask; +atomic_t sleep_mask; #ifdef CONFIG_LOW_POWER_IDLE_LIMITED /* Set it to prevent going into idle mode */ -uint32_t idle_disabled; +atomic_t idle_disabled; #endif /* SKU ID sourced from AP */ diff --git a/common/timer.c b/common/timer.c index 0490741c4c..0cb0d97289 100644 --- a/common/timer.c +++ b/common/timer.c @@ -49,7 +49,7 @@ static int timer_irq; static void expire_timer(task_id_t tskid) { /* we are done with this timer */ - atomic_clear_bits(&timer_running, 1 << tskid); + atomic_clear_bits((atomic_t *)&timer_running, 1 << tskid); /* wake up the taks waiting for this timer */ task_set_event(tskid, TASK_EVENT_TIMER); } @@ -142,7 +142,7 @@ int timer_arm(timestamp_t event, task_id_t tskid) return EC_ERROR_BUSY; timer_deadline[tskid] = event; - atomic_or(&timer_running, BIT(tskid)); + atomic_or((atomic_t *)&timer_running, BIT(tskid)); /* Modify the next event if needed */ if ((event.le.hi < now.le.hi) || @@ -156,7 +156,7 @@ void timer_cancel(task_id_t tskid) { ASSERT(tskid < TASK_ID_COUNT); - atomic_clear_bits(&timer_running, BIT(tskid)); + atomic_clear_bits((atomic_t *)&timer_running, BIT(tskid)); /* * Don't need to cancel the hardware timer interrupt, instead do * timer-related housekeeping when the next timer interrupt fires. diff --git a/common/usbc/usb_pd_dpm.c b/common/usbc/usb_pd_dpm.c index 36cfdf0f75..9587de4973 100644 --- a/common/usbc/usb_pd_dpm.c +++ b/common/usbc/usb_pd_dpm.c @@ -48,12 +48,16 @@ static struct { #define DPM_CHK_FLAG(port, flag) (dpm[(port)].flags & (flag)) /* Flags for internal DPM state */ -#define DPM_FLAG_MODE_ENTRY_DONE BIT(0) -#define DPM_FLAG_EXIT_REQUEST BIT(1) -#define DPM_FLAG_ENTER_DP BIT(2) -#define DPM_FLAG_ENTER_TBT BIT(3) -#define DPM_FLAG_ENTER_USB4 BIT(4) -#define DPM_FLAG_SEND_ATTENTION BIT(5) +#define DPM_FLAG_MODE_ENTRY_DONE BIT(0) +#define DPM_FLAG_EXIT_REQUEST BIT(1) +#define DPM_FLAG_ENTER_DP BIT(2) +#define DPM_FLAG_ENTER_TBT BIT(3) +#define DPM_FLAG_ENTER_USB4 BIT(4) +#define DPM_FLAG_ENTER_ANY (DPM_FLAG_ENTER_DP | DPM_FLAG_ENTER_TBT \ + | DPM_FLAG_ENTER_USB4) +#define DPM_FLAG_SEND_ATTENTION BIT(5) +#define DPM_FLAG_DATA_RESET_REQUESTED BIT(6) +#define DPM_FLAG_DATA_RESET_DONE BIT(7) #ifdef CONFIG_ZEPHYR static int init_vdm_attention_mutex(const struct device *dev) @@ -134,6 +138,7 @@ enum ec_status pd_request_enter_mode(int port, enum typec_mode mode) DPM_CLR_FLAG(port, DPM_FLAG_MODE_ENTRY_DONE); DPM_CLR_FLAG(port, DPM_FLAG_EXIT_REQUEST); + DPM_CLR_FLAG(port, DPM_FLAG_DATA_RESET_DONE); return EC_RES_SUCCESS; } @@ -143,6 +148,12 @@ void dpm_init(int port) dpm[port].flags = 0; } +void dpm_mode_exit_complete(int port) +{ + DPM_CLR_FLAG(port, DPM_FLAG_MODE_ENTRY_DONE | DPM_FLAG_EXIT_REQUEST | + DPM_FLAG_SEND_ATTENTION); +} + static void dpm_set_mode_entry_done(int port) { DPM_SET_FLAG(port, DPM_FLAG_MODE_ENTRY_DONE); @@ -155,6 +166,13 @@ void dpm_set_mode_exit_request(int port) DPM_SET_FLAG(port, DPM_FLAG_EXIT_REQUEST); } +void dpm_data_reset_complete(int port) +{ + DPM_CLR_FLAG(port, DPM_FLAG_DATA_RESET_REQUESTED); + DPM_SET_FLAG(port, DPM_FLAG_DATA_RESET_DONE); + DPM_CLR_FLAG(port, DPM_FLAG_MODE_ENTRY_DONE); +} + static void dpm_clear_mode_exit_request(int port) { DPM_CLR_FLAG(port, DPM_FLAG_EXIT_REQUEST); @@ -287,6 +305,22 @@ static void dpm_attempt_mode_entry(int port) if (IS_ENABLED(CONFIG_USBC_SS_MUX) && !usb_mux_set_completed(port)) return; + if (IS_ENABLED(CONFIG_USB_PD_REQUIRE_AP_MODE_ENTRY) && + IS_ENABLED(CONFIG_USB_PD_DATA_RESET_MSG) && + DPM_CHK_FLAG(port, DPM_FLAG_ENTER_ANY) && + !DPM_CHK_FLAG(port, DPM_FLAG_DATA_RESET_REQUESTED) && + !DPM_CHK_FLAG(port, DPM_FLAG_DATA_RESET_DONE)) { + pd_dpm_request(port, DPM_REQUEST_DATA_RESET); + DPM_SET_FLAG(port, DPM_FLAG_DATA_RESET_REQUESTED); + return; + } + + if (IS_ENABLED(CONFIG_USB_PD_REQUIRE_AP_MODE_ENTRY) && + IS_ENABLED(CONFIG_USB_PD_DATA_RESET_MSG) && + !DPM_CHK_FLAG(port, DPM_FLAG_DATA_RESET_DONE)) { + return; + } + /* Check if port, port partner and cable support USB4. */ if (IS_ENABLED(CONFIG_USB_PD_USB4) && board_is_tbt_usb4_port(port) && diff --git a/common/usbc/usb_pd_timer.c b/common/usbc/usb_pd_timer.c index 97aa699737..8cbfbef6ca 100644 --- a/common/usbc/usb_pd_timer.c +++ b/common/usbc/usb_pd_timer.c @@ -77,6 +77,9 @@ __maybe_unused static __const_data const char * const pd_timer_names[] = { [PE_TIMER_VCONN_ON] = "PE-VCONN_ON", [PE_TIMER_VDM_RESPONSE] = "PE-VDM_RESPONSE", [PE_TIMER_WAIT_AND_ADD_JITTER] = "PE-WAIT_AND_ADD_JITTER", + [PE_TIMER_VCONN_DISCHARGE] = "PE-VCONN_DISCHARGE", + [PE_TIMER_VCONN_REAPPLIED] = "PE-VCONN_REAPPLIED", + [PE_TIMER_DATA_RESET_FAIL] = "PE-DATA_RESET_FAIL", [PR_TIMER_CHUNK_SENDER_REQUEST] = "PR-CHUNK_SENDER_REQUEST", [PR_TIMER_CHUNK_SENDER_RESPONSE] = "PR-CHUNK_SENDER_RESPONSE", diff --git a/common/usbc/usb_pe_drp_sm.c b/common/usbc/usb_pe_drp_sm.c index 431dcdc9af..bbe499b612 100644 --- a/common/usbc/usb_pe_drp_sm.c +++ b/common/usbc/usb_pe_drp_sm.c @@ -20,9 +20,11 @@ #include "task.h" #include "tcpm/tcpm.h" #include "util.h" +#include "usb_charge.h" #include "usb_common.h" #include "usb_dp_alt_mode.h" #include "usb_mode.h" +#include "usb_mux.h" #include "usb_pd_dpm.h" #include "usb_pd_policy.h" #include "usb_pd.h" @@ -153,6 +155,8 @@ #define PE_FLAGS_MSG_DISCARDED BIT(29) /* FLAG to note that hard reset can't be performed due to battery low */ #define PE_FLAGS_SNK_WAITING_BATT BIT(30) +/* FLAG to note that a data reset is complete */ +#define PE_FLAGS_DATA_RESET_COMPLETE BIT(31) /* Message flags which should not persist on returning to ready state */ #define PE_FLAGS_READY_CLR (PE_FLAGS_LOCALLY_INITIATED_AMS \ @@ -171,7 +175,6 @@ */ #define PE_CHK_REPLY(port) (PE_CHK_FLAG(port, PE_FLAGS_MSG_RECEIVED) && \ !PE_CHK_FLAG(port, PE_FLAGS_MSG_DISCARDED)) - /* 6.7.3 Hard Reset Counter */ #define N_HARD_RESET_COUNT 2 @@ -319,6 +322,13 @@ enum usb_pe_state { PE_DR_SRC_GET_SOURCE_CAP, /* PD3.0 only states below here*/ +#ifdef CONFIG_USB_PD_DATA_RESET_MSG + /* DFP Data Reset States */ + PE_DDR_SEND_DATA_RESET, + PE_DDR_WAIT_FOR_VCONN_OFF, + PE_DDR_PERFORM_DATA_RESET, +#endif /* CONFIG_USB_PD_DATA_RESET_MSG */ + PE_FRS_SNK_SRC_START_AMS, PE_GIVE_BATTERY_CAP, PE_GIVE_BATTERY_STATUS, @@ -452,6 +462,11 @@ __maybe_unused static __const_data const char * const pe_state_names[] = { #ifdef CONFIG_USBC_VCONN [PE_VCS_FORCE_VCONN] = "PE_VCS_Force_Vconn", #endif +#ifdef CONFIG_USB_PD_DATA_RESET_MSG + [PE_DDR_SEND_DATA_RESET] = "PE_DDR_Send_Data_Reset", + [PE_DDR_WAIT_FOR_VCONN_OFF] = "PE_DDR_Wait_For_VCONN_Off", + [PE_DDR_PERFORM_DATA_RESET] = "PE_DDR_Perform_Data_Reset", +#endif /* CONFIG_USB_PD_DATA_RESET_MSG */ #endif /* CONFIG_USB_PD_REV30 */ }; @@ -1172,6 +1187,11 @@ void pe_report_error(int port, enum pe_error e, enum tcpci_msg_type type) get_state_pe(port) == PE_SRC_DISCOVERY || get_state_pe(port) == PE_VCS_CBL_SEND_SOFT_RESET || get_state_pe(port) == PE_VDM_IDENTITY_REQUEST_CBL) || +#ifdef CONFIG_USB_PD_DATA_RESET_MSG + get_state_pe(port) == PE_DDR_SEND_DATA_RESET || + get_state_pe(port) == PE_DDR_WAIT_FOR_VCONN_OFF || + get_state_pe(port) == PE_DDR_PERFORM_DATA_RESET || +#endif (pe_in_frs_mode(port) && get_state_pe(port) == PE_PRS_SNK_SRC_SEND_SWAP) ) { @@ -1529,7 +1549,21 @@ static bool common_src_snk_dpm_requests(int port) set_state_pe(port, PE_VCS_CBL_SEND_SOFT_RESET); return true; } +#ifdef CONFIG_USB_PD_DATA_RESET_MSG + else if (PE_CHK_DPM_REQUEST(port, DPM_REQUEST_DATA_RESET)) { + if (prl_get_rev(port, TCPCI_MSG_SOP) < PD_REV30) { + dpm_data_reset_complete(port); + return false; + } + pe_set_dpm_curr_request(port, DPM_REQUEST_DATA_RESET); + if (pe[port].data_role == PD_ROLE_DFP) + set_state_pe(port, PE_DDR_SEND_DATA_RESET); + else + return false; + return true; + } +#endif /* CONFIG_USB_PD_DATA_RESET_MSG */ return false; } @@ -2167,6 +2201,7 @@ static void pe_src_startup_entry(int port) /* Clear port discovery/mode flags */ pd_dfp_discovery_init(port); pd_dfp_mode_init(port); + dpm_init(port); pe[port].ama_vdo = PD_VDO_INVALID; pe[port].vpd_vdo = PD_VDO_INVALID; pe[port].discover_identity_counter = 0; @@ -3021,6 +3056,7 @@ static void pe_snk_startup_entry(int port) /* Clear port discovery/mode flags */ pd_dfp_discovery_init(port); pd_dfp_mode_init(port); + dpm_init(port); pe[port].discover_identity_counter = 0; /* Reset dr swap attempt counter */ @@ -6974,6 +7010,255 @@ static void pe_dr_src_get_source_cap_exit(int port) pe_sender_response_msg_exit(port); } +#ifdef CONFIG_USB_PD_DATA_RESET_MSG +/* + * PE_DDR_Send_Data_Reset + * See PD rev 3.1, v. 1.2, Figure 8-88. + */ +static void pe_ddr_send_data_reset_entry(int port) +{ + print_current_state(port); + /* Send Data Reset message */ + send_ctrl_msg(port, TCPCI_MSG_SOP, PD_CTRL_DATA_RESET); + pe_sender_response_msg_entry(port); +} + +static void pe_ddr_send_data_reset_run(int port) +{ + enum pe_msg_check msg_check = pe_sender_response_msg_run(port); + + /* Handle Discarded message, return to PE_SNK/SRC_READY */ + if (msg_check & PE_MSG_DISCARDED) { + pe_set_ready_state(port); + return; + } else if (msg_check == PE_MSG_SEND_PENDING) { + /* Wait until message is sent */ + return; + } + + /* + * Transition to the next Data Reset state after receiving Accept. + * Return to the ready state after receiving Not Supported. After + * receiving Reject or any other message type (Protocol Error), + * transition to Error Recovery. + */ + if (PE_CHK_FLAG(port, PE_FLAGS_MSG_RECEIVED)) { + const uint32_t hdr = rx_emsg[port].header; + + PE_CLR_FLAG(port, PE_FLAGS_MSG_RECEIVED); + + if (PD_HEADER_GET_SOP(hdr) == TCPCI_MSG_SOP && + PD_HEADER_CNT(hdr) == 0 && + !PD_HEADER_EXT(hdr) && + PD_HEADER_TYPE(hdr) == PD_CTRL_ACCEPT) { + /* + * Start DataResetFailTimer NOTE: This timer continues + * to run in every state until it is stopped or it times + * out. + */ + pd_timer_enable(port, PE_TIMER_DATA_RESET_FAIL, + PD_T_DATA_RESET_FAIL); + set_state_pe(port, tc_is_vconn_src(port) ? + PE_DDR_PERFORM_DATA_RESET : + PE_DDR_WAIT_FOR_VCONN_OFF); + return; + } else if (PD_HEADER_GET_SOP(hdr) == TCPCI_MSG_SOP && + PD_HEADER_CNT(hdr) == 0 && + !PD_HEADER_EXT(hdr) && + PD_HEADER_TYPE(hdr) == PD_CTRL_NOT_SUPPORTED) { + /* Just pretend it worked. */ + dpm_data_reset_complete(port); + pe_set_ready_state(port); + return; + } + + /* Otherwise, it's a protocol error. */ + PE_SET_FLAG(port, PE_FLAGS_PROTOCOL_ERROR); + } + + if (pd_timer_is_expired(port, PE_TIMER_SENDER_RESPONSE) || + PE_CHK_FLAG(port, PE_FLAGS_PROTOCOL_ERROR)) { + PE_CLR_FLAG(port, PE_FLAGS_PROTOCOL_ERROR); + set_state_pe(port, PE_WAIT_FOR_ERROR_RECOVERY); + return; + } +} + +static void pe_ddr_send_data_reset_exit(int port) +{ + pe_sender_response_msg_exit(port); +} + +/* + * PE_DDR_Wait_For_VCONN_Off + */ +static void pe_ddr_wait_for_vconn_off_entry(int port) +{ + print_current_state(port); + /* Initialize and start VCONNDischargeTimer */ + pd_timer_enable(port, PE_TIMER_VCONN_DISCHARGE, PD_T_VCONN_DISCHARGE); +} + +static void pe_ddr_wait_for_vconn_off_run(int port) +{ + if (PE_CHK_FLAG(port, PE_FLAGS_MSG_RECEIVED)) { + const uint32_t hdr = rx_emsg[port].header; + + PE_CLR_FLAG(port, PE_FLAGS_MSG_RECEIVED); + + if (PD_HEADER_GET_SOP(hdr) == TCPCI_MSG_SOP && + PD_HEADER_CNT(hdr) == 0 && + !PD_HEADER_EXT(hdr) && + PD_HEADER_TYPE(hdr) == PD_CTRL_PS_RDY) { + /* PS_RDY message received */ + pd_timer_enable(port, PE_TIMER_VCONN_REAPPLIED, + PD_T_VCONN_REAPPLIED); + set_state_pe(port, PE_DDR_PERFORM_DATA_RESET); + return; + } + + /* Otherwise, it's a protocol error. */ + PE_SET_FLAG(port, PE_FLAGS_PROTOCOL_ERROR); + } + + if (pd_timer_is_expired(port, PE_TIMER_VCONN_DISCHARGE) || + PE_CHK_FLAG(port, PE_FLAGS_PROTOCOL_ERROR)) { + PE_CLR_FLAG(port, PE_FLAGS_PROTOCOL_ERROR); + set_state_pe(port, PE_WAIT_FOR_ERROR_RECOVERY); + return; + } +} + +static void pe_ddr_wait_for_vconn_off_exit(int port) +{ + pd_timer_disable(port, PE_TIMER_VCONN_DISCHARGE); +} + +/* + * PE_DDR_Perform_Data_Reset + * See PD rev 3.1, v. 1.2, section 6.3.14. + */ +static void pe_ddr_perform_data_reset_entry(int port) +{ + print_current_state(port); + + /* + * 1) The DFP shall: + * a) Disconnect the Port’s USB 2.0 D+/D- signals. + * b) If operating in USB 3.2 remove the port’s Rx Terminations. + * c) If operating in [USB4] drive the port’s SBTX to a logic low. + */ + usb_mux_set(port, USB_PD_MUX_NONE, USB_SWITCH_DISCONNECT, + polarity_rm_dts(pd_get_polarity(port))); + + /* 2) Both the DFP and UFP Shall exit all Alternate Modes if any. */ + if (IS_ENABLED(CONFIG_USB_PD_ALT_MODE_DFP)) { + pd_dfp_exit_mode(port, TCPCI_MSG_SOP, 0, 0); + pd_dfp_exit_mode(port, TCPCI_MSG_SOP_PRIME, 0, 0); + pd_dfp_exit_mode(port, TCPCI_MSG_SOP_PRIME_PRIME, 0, 0); + } + + /* 3) Reset the cable */ + /* + * TODO(b/141363146): The PD spec is ambiguous about which state the PE + * should be in during the cable reset (step 3 in section 6.3.14). If + * the DFP is not the initial VCONN Source, the cable reset presumably + * starts in PE_DDR_Wait_for_VCONN_Off and finishes in + * PE_DDR_Perform_Data_Reset. To be consistent with the steps in 6.3.14, + * that would imply that steps 1 and 2 take place in + * PE_DDR_Send_Data_Reset. However, this would be inconsistent with the, + * "Tell the Policy Manager to Perform Data Reset," action in + * PE_DDR_Perform_Data_Reset in figure 8-88, DFP Data_Reset Message + * State Diagram, since the Data Reset process would have had to start + * before then. Resolve this ambiguity and update this implementation. + */ + if (IS_ENABLED(CONFIG_USBC_VCONN) && tc_is_vconn_src(port)) + pd_request_vconn_swap_off(port); + else + PE_SET_FLAG(port, PE_FLAGS_DATA_RESET_COMPLETE); +} + +static void pe_ddr_perform_data_reset_run(int port) +{ + /* + * PE_FLAGS_VCONN_SWAP_COMPLETE may be set in 2 cases: + * a) If the PE requested to turn VCONN off while entering this state, + * i.e. if the TCPM was VCONN Source at that time. If the TCPM did not + * start out as VCONN Source, then PE_DDR_Wait_For_VCONN_Off will have + * already started the VCONN reapplied timer. + * b) When this state requests to turn VCONN on after tVCONNReapplied + * expires. At this point, the Data Reset process is complete. + */ + if (IS_ENABLED(CONFIG_USBC_VCONN) && !tc_is_vconn_src(port) && + PE_CHK_FLAG(port, PE_FLAGS_VCONN_SWAP_COMPLETE)) { + PE_CLR_FLAG(port, PE_FLAGS_VCONN_SWAP_COMPLETE); + pd_timer_enable(port, PE_TIMER_VCONN_REAPPLIED, + PD_T_VCONN_REAPPLIED); + } else if (IS_ENABLED(CONFIG_USBC_VCONN) && + pd_timer_is_expired(port, PE_TIMER_VCONN_REAPPLIED)) { + pd_request_vconn_swap_on(port); + pd_timer_disable(port, PE_TIMER_VCONN_REAPPLIED); + + /* + * 4) After tDataReset the DFP shall: + * a) Reconnect the [USB 2.0] D+/D- signals + * b) If the Port was operating in [USB 3.2] or [USB4] + * reapply the port’s Rx Terminations + * TODO: Section 6.3.14 implies that tDataReset is a minimum + * time for the DFP to leave the lines disconnected during Data + * Reset, possibly starting after the cable reset. Section + * 6.6.10.2 implies that tDataReset is the maximum time for the + * DFP to send Data_Reset_Complete after receiving Accept. These + * interpretations are mutually exclusive. Resolve that + * ambiguity and update this implementation. + */ + usb_mux_set(port, USB_PD_MUX_NONE, USB_SWITCH_DISCONNECT, + polarity_rm_dts(pd_get_polarity(port))); + } else if (IS_ENABLED(CONFIG_USBC_VCONN) && + PE_CHK_FLAG(port, PE_FLAGS_VCONN_SWAP_COMPLETE) && + tc_is_vconn_src(port)) { + PE_CLR_FLAG(port, PE_FLAGS_VCONN_SWAP_COMPLETE); + PE_SET_FLAG(port, PE_FLAGS_DATA_RESET_COMPLETE); + } else if (PE_CHK_FLAG(port, PE_FLAGS_DATA_RESET_COMPLETE) && + !pd_timer_is_disabled(port, PE_TIMER_DATA_RESET_FAIL)) { + pd_timer_disable(port, PE_TIMER_DATA_RESET_FAIL); + send_ctrl_msg(port, TCPCI_MSG_SOP, PD_CTRL_DATA_RESET_COMPLETE); + } else if (PE_CHK_FLAG(port, PE_FLAGS_DATA_RESET_COMPLETE)) { + /* + * There is no specified response to Data_Reset_Complete, but + * make sure the port partner receives it before returning to a + * ready state. + */ + if (PE_CHK_FLAG(port, PE_FLAGS_MSG_DISCARDED)) + set_state_pe(port, PE_WAIT_FOR_ERROR_RECOVERY); + else if (PE_CHK_FLAG(port, PE_FLAGS_TX_COMPLETE)) + pe_set_ready_state(port); + return; + } else if (pd_timer_is_expired(port, PE_TIMER_DATA_RESET_FAIL) || + PE_CHK_FLAG(port, PE_FLAGS_PROTOCOL_ERROR)) { + PE_CLR_FLAG(port, PE_FLAGS_PROTOCOL_ERROR); + set_state_pe(port, PE_WAIT_FOR_ERROR_RECOVERY); + return; + } + + /* + * No messages are expected, so any received would be a protocol error. + */ + if (PE_CHK_FLAG(port, PE_FLAGS_MSG_RECEIVED)) { + PE_CLR_FLAG(port, PE_FLAGS_MSG_RECEIVED); + set_state_pe(port, PE_WAIT_FOR_ERROR_RECOVERY); + } +} + +static void pe_ddr_perform_data_reset_exit(int port) +{ + pd_timer_disable(port, PE_TIMER_VCONN_REAPPLIED); + pd_timer_disable(port, PE_TIMER_DATA_RESET_FAIL); + PE_CLR_FLAG(port, PE_FLAGS_DATA_RESET_COMPLETE); + dpm_data_reset_complete(port); +} +#endif /* CONFIG_USB_PD_DATA_RESET_MSG */ + const uint32_t * const pd_get_src_caps(int port) { return pe[port].src_caps; @@ -7022,7 +7307,7 @@ void pd_dfp_mode_init(int port) memset(pe[port].partner_amodes, 0, sizeof(pe[port].partner_amodes)); /* Reset the DPM and DP modules to enable alternate mode entry. */ - dpm_init(port); + dpm_mode_exit_complete(port); dp_init(port); if (IS_ENABLED(CONFIG_USB_PD_TBT_COMPAT_MODE)) @@ -7446,6 +7731,23 @@ static __const_data const struct usb_state pe_states[] = { .exit = pe_vcs_force_vconn_exit, }, #endif /* CONFIG_USBC_VCONN */ +#ifdef CONFIG_USB_PD_DATA_RESET_MSG + [PE_DDR_SEND_DATA_RESET] = { + .entry = pe_ddr_send_data_reset_entry, + .run = pe_ddr_send_data_reset_run, + .exit = pe_ddr_send_data_reset_exit, + }, + [PE_DDR_WAIT_FOR_VCONN_OFF] = { + .entry = pe_ddr_wait_for_vconn_off_entry, + .run = pe_ddr_wait_for_vconn_off_run, + .exit = pe_ddr_wait_for_vconn_off_exit, + }, + [PE_DDR_PERFORM_DATA_RESET] = { + .entry = pe_ddr_perform_data_reset_entry, + .run = pe_ddr_perform_data_reset_run, + .exit = pe_ddr_perform_data_reset_exit, + }, +#endif /* CONFIG_USB_PD_DATA_RESET_MSG */ #endif /* CONFIG_USB_PD_REV30 */ }; diff --git a/core/cortex-m/atomic.h b/core/cortex-m/atomic.h index e9b96f6fd5..ce183465e8 100644 --- a/core/cortex-m/atomic.h +++ b/core/cortex-m/atomic.h @@ -8,11 +8,9 @@ #ifndef __CROS_EC_ATOMIC_H #define __CROS_EC_ATOMIC_H +#include "atomic_t.h" #include "common.h" -typedef int atomic_t; -typedef atomic_t atomic_val_t; - static inline atomic_val_t atomic_clear_bits(atomic_t *addr, atomic_val_t bits) { return __atomic_fetch_and(addr, ~bits, __ATOMIC_SEQ_CST); diff --git a/core/cortex-m/cpu.h b/core/cortex-m/cpu.h index 0b03302bfc..dbad99650c 100644 --- a/core/cortex-m/cpu.h +++ b/core/cortex-m/cpu.h @@ -70,6 +70,26 @@ enum { #define CPU_SCB_DCISW CPUREG(0xe000ef60) #define CPU_SCB_DCCISW CPUREG(0xe000ef74) +/* Bitfield values for EXC_RETURN. */ +#define EXC_RETURN_ES_MASK BIT(0) +#define EXC_RETURN_ES_NON_SECURE 0 +#define EXC_RETURN_ES_SECURE BIT(0) +#define EXC_RETURN_SPSEL_MASK BIT(2) +#define EXC_RETURN_SPSEL_MSP 0 +#define EXC_RETURN_SPSEL_PSP BIT(2) +#define EXC_RETURN_MODE_MASK BIT(3) +#define EXC_RETURN_MODE_HANDLER 0 +#define EXC_RETURN_MODE_THREAD BIT(3) +#define EXC_RETURN_FTYPE_MASK BIT(4) +#define EXC_RETURN_FTYPE_ON 0 +#define EXC_RETURN_FTYPE_OFF BIT(4) +#define EXC_RETURN_DCRS_MASK BIT(5) +#define EXC_RETURN_DCRS_OFF 0 +#define EXC_RETURN_DCRS_ON BIT(5) +#define EXC_RETURN_S_MASK BIT(6) +#define EXC_RETURN_S_NON_SECURE 0 +#define EXC_RETURN_S_SECURE BIT(6) + /* Set up the cpu to detect faults */ void cpu_init(void); /* Enable the CPU I-cache and D-cache if they are not already enabled */ diff --git a/core/cortex-m/task.c b/core/cortex-m/task.c index fa5642cca6..09e13f445d 100644 --- a/core/cortex-m/task.c +++ b/core/cortex-m/task.c @@ -22,7 +22,7 @@ typedef union { * for __switchto() to work. */ uint32_t sp; /* Saved stack pointer for context switch */ - uint32_t events; /* Bitmaps of received events */ + atomic_t events; /* Bitmaps of received events */ uint64_t runtime; /* Time spent in task */ uint32_t *stack; /* Start of stack */ }; @@ -79,7 +79,7 @@ void __idle(void) * CSAE bit is set. Please notice this symptom only * occurs at npcx5. */ -#if defined(CHIP_FAMILY_NPCX5) && defined(CONFIG_HOSTCMD_ESPI) +#if defined(CHIP_FAMILY_NPCX5) && defined(CONFIG_HOST_INTERFACE_ESPI) /* Enable Host access wakeup */ SET_BIT(NPCX_WKEN(MIWU_TABLE_0, MIWU_GROUP_5), 6); #endif @@ -263,7 +263,7 @@ task_id_t task_get_current(void) return current_task - tasks; } -uint32_t *task_get_event_bitmap(task_id_t tskid) +atomic_t *task_get_event_bitmap(task_id_t tskid) { task_ *tsk = __task_id_to_ptr(tskid); return &tsk->events; @@ -389,7 +389,9 @@ void __keep task_start_irq_handler(void *excep_return) * and we are not called from another exception (this must match the * logic for when we chain to svc_handler() below). */ - if (!need_resched_or_profiling || (((uint32_t)excep_return & 0xf) == 1)) + if (!need_resched_or_profiling + || (((uint32_t)excep_return & EXC_RETURN_MODE_MASK) + == EXC_RETURN_MODE_HANDLER)) return; exc_start_time = t; @@ -402,7 +404,9 @@ void __keep task_resched_if_needed(void *excep_return) * Continue iff a rescheduling event happened or profiling is active, * and we are not called from another exception. */ - if (!need_resched_or_profiling || (((uint32_t)excep_return & 0xf) == 1)) + if (!need_resched_or_profiling + || (((uint32_t)excep_return & EXC_RETURN_MODE_MASK) + == EXC_RETURN_MODE_HANDLER)) return; svc_handler(0, 0); diff --git a/core/cortex-m0/atomic.h b/core/cortex-m0/atomic.h index 1774d90332..aef4d2a0a6 100644 --- a/core/cortex-m0/atomic.h +++ b/core/cortex-m0/atomic.h @@ -8,11 +8,9 @@ #ifndef __CROS_EC_ATOMIC_H #define __CROS_EC_ATOMIC_H +#include "atomic_t.h" #include "common.h" -typedef int atomic_t; -typedef atomic_t atomic_val_t; - /** * Implements atomic arithmetic operations on 32-bit integers. * diff --git a/core/cortex-m0/cpu.h b/core/cortex-m0/cpu.h index ac184090f9..c30095fd65 100644 --- a/core/cortex-m0/cpu.h +++ b/core/cortex-m0/cpu.h @@ -38,6 +38,14 @@ #define CPU_NVIC_CCR_UNALIGN_TRAP BIT(3) +/* Bitfield values for EXC_RETURN. */ +#define EXC_RETURN_SPSEL_MASK BIT(2) +#define EXC_RETURN_SPSEL_MSP 0 +#define EXC_RETURN_SPSEL_PSP BIT(2) +#define EXC_RETURN_MODE_MASK BIT(3) +#define EXC_RETURN_MODE_HANDLER 0 +#define EXC_RETURN_MODE_THREAD BIT(3) + /* Set up the cpu to detect faults */ void cpu_init(void); diff --git a/core/cortex-m0/task.c b/core/cortex-m0/task.c index 274b6a263d..ab13a7a172 100644 --- a/core/cortex-m0/task.c +++ b/core/cortex-m0/task.c @@ -22,7 +22,7 @@ typedef union { * for __switchto() to work. */ uint32_t sp; /* Saved stack pointer for context switch */ - uint32_t events; /* Bitmaps of received events */ + atomic_t events; /* Bitmaps of received events */ uint64_t runtime; /* Time spent in task */ uint32_t *stack; /* Start of stack */ }; @@ -197,7 +197,7 @@ task_id_t task_get_current(void) return current_task - tasks; } -uint32_t *task_get_event_bitmap(task_id_t tskid) +atomic_t *task_get_event_bitmap(task_id_t tskid) { task_ *tsk = __task_id_to_ptr(tskid); return &tsk->events; @@ -304,7 +304,9 @@ void task_start_irq_handler(void *excep_return) * Continue iff the tasks are ready and we are not called from another * exception (as the time accouting is done in the outer irq). */ - if (!start_called || ((uint32_t)excep_return & 0xf) == 1) + if (!start_called + || (((uint32_t)excep_return & EXC_RETURN_MODE_MASK) + == EXC_RETURN_MODE_HANDLER)) return; exc_start_time = t; @@ -322,7 +324,9 @@ void task_end_irq_handler(void *excep_return) * Continue iff the tasks are ready and we are not called from another * exception (as the time accouting is done in the outer irq). */ - if (!start_called || ((uint32_t)excep_return & 0xf) == 1) + if (!start_called + || (((uint32_t)excep_return & EXC_RETURN_MODE_MASK) + == EXC_RETURN_MODE_HANDLER)) return; /* Track time in interrupts */ diff --git a/core/host/atomic.h b/core/host/atomic.h index 83786de904..175b743d05 100644 --- a/core/host/atomic.h +++ b/core/host/atomic.h @@ -8,11 +8,9 @@ #ifndef __CROS_EC_ATOMIC_H #define __CROS_EC_ATOMIC_H +#include "atomic_t.h" #include "common.h" -typedef int atomic_t; -typedef atomic_t atomic_val_t; - static inline atomic_val_t atomic_clear_bits(atomic_t *addr, atomic_val_t bits) { return __atomic_fetch_and(addr, ~bits, __ATOMIC_SEQ_CST); diff --git a/core/host/task.c b/core/host/task.c index 44d8082d82..83e51fb83b 100644 --- a/core/host/task.c +++ b/core/host/task.c @@ -28,7 +28,7 @@ struct emu_task_t { pthread_t thread; pthread_cond_t resume; - uint32_t event; + atomic_t event; timestamp_t wake_time; uint8_t started; }; @@ -209,7 +209,7 @@ uint32_t task_set_event(task_id_t tskid, uint32_t event) return 0; } -uint32_t *task_get_event_bitmap(task_id_t tskid) +atomic_t *task_get_event_bitmap(task_id_t tskid) { return &tasks[tskid].event; } diff --git a/core/minute-ia/atomic.h b/core/minute-ia/atomic.h index 37a4454902..dbcd04b7de 100644 --- a/core/minute-ia/atomic.h +++ b/core/minute-ia/atomic.h @@ -8,12 +8,10 @@ #ifndef __CROS_EC_ATOMIC_H #define __CROS_EC_ATOMIC_H +#include "atomic_t.h" #include "common.h" #include "util.h" -typedef int atomic_t; -typedef atomic_t atomic_val_t; - static inline int bool_compare_and_swap_u32(uint32_t *var, uint32_t old_value, uint32_t new_value) { diff --git a/core/minute-ia/task.c b/core/minute-ia/task.c index cde3d80e12..91807c8c14 100644 --- a/core/minute-ia/task.c +++ b/core/minute-ia/task.c @@ -207,7 +207,7 @@ const char *task_get_name(task_id_t tskid) return "<< unknown >>"; } -uint32_t *task_get_event_bitmap(task_id_t tskid) +atomic_t *task_get_event_bitmap(task_id_t tskid) { task_ *tsk = __task_id_to_ptr(tskid); diff --git a/core/minute-ia/task_defs.h b/core/minute-ia/task_defs.h index 01632392cb..18458b1533 100644 --- a/core/minute-ia/task_defs.h +++ b/core/minute-ia/task_defs.h @@ -15,6 +15,7 @@ * defines for inline asm */ #ifndef __ASSEMBLER__ +#include "atomic.h" #include "common.h" #define USE_FPU_OFFSET_STR STRINGIFY(USE_FPU_OFFSET) /* "20" */ @@ -34,7 +35,7 @@ typedef union { * for __switchto() to work. */ uint32_t sp; /* Saved stack pointer for context switch */ - uint32_t events; /* Bitmaps of received events */ + atomic_t events; /* Bitmaps of received events */ uint64_t runtime; /* Time spent in task */ uint32_t *stack; /* Start of stack */ #ifdef CONFIG_FPU diff --git a/core/nds32/atomic.h b/core/nds32/atomic.h index b634c3a551..f50deaaba3 100644 --- a/core/nds32/atomic.h +++ b/core/nds32/atomic.h @@ -8,13 +8,11 @@ #ifndef __CROS_EC_ATOMIC_H #define __CROS_EC_ATOMIC_H +#include "atomic_t.h" #include "common.h" #include "cpu.h" #include "task.h" -typedef int atomic_t; -typedef atomic_t atomic_val_t; - static inline atomic_val_t atomic_clear_bits(atomic_t *addr, atomic_val_t bits) { atomic_val_t ret; diff --git a/core/nds32/init.S b/core/nds32/init.S index b8e109c434..159f3709d3 100644 --- a/core/nds32/init.S +++ b/core/nds32/init.S @@ -87,7 +87,7 @@ vector irq_15, 15 /* HW 15 */ .global eflash_sig eflash_sig: .byte 0xA5, 0xA5, 0xA5, 0xA5, 0xA5, 0xA5 -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI .byte 0xA4 /* eSPI */ #else .byte 0xA5 /* LPC */ diff --git a/core/nds32/task.c b/core/nds32/task.c index 3457af2bb5..376ba08ad7 100644 --- a/core/nds32/task.c +++ b/core/nds32/task.c @@ -25,7 +25,7 @@ typedef union { * for __switchto() to work. */ uint32_t sp; /* Saved stack pointer for context switch */ - uint32_t events; /* Bitmaps of received events */ + atomic_t events; /* Bitmaps of received events */ uint64_t runtime; /* Time spent in task */ uint32_t *stack; /* Start of stack */ }; @@ -250,7 +250,7 @@ task_id_t task_get_current(void) return start_called ? (current_task - tasks) : TASK_ID_INVALID; } -uint32_t *task_get_event_bitmap(task_id_t tskid) +atomic_t *task_get_event_bitmap(task_id_t tskid) { task_ *tsk = __task_id_to_ptr(tskid); return &tsk->events; diff --git a/core/riscv-rv32i/atomic.h b/core/riscv-rv32i/atomic.h index e92beb2ca0..91658e8065 100644 --- a/core/riscv-rv32i/atomic.h +++ b/core/riscv-rv32i/atomic.h @@ -8,13 +8,11 @@ #ifndef __CROS_EC_ATOMIC_H #define __CROS_EC_ATOMIC_H +#include "atomic_t.h" #include "common.h" #include "cpu.h" #include "task.h" -typedef int atomic_t; -typedef atomic_t atomic_val_t; - static inline atomic_val_t atomic_clear_bits(atomic_t *addr, atomic_val_t bits) { return __atomic_fetch_and(addr, ~bits, __ATOMIC_SEQ_CST); diff --git a/core/riscv-rv32i/init.S b/core/riscv-rv32i/init.S index 5715478356..8ee5479e0e 100644 --- a/core/riscv-rv32i/init.S +++ b/core/riscv-rv32i/init.S @@ -75,7 +75,7 @@ __ec_intc: .global eflash_sig eflash_sig: .byte 0xA5, 0xA5, 0xA5, 0xA5, 0xA5, 0xA5 -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI .byte 0xA4 /* eSPI */ #else .byte 0xA5 /* LPC */ diff --git a/core/riscv-rv32i/task.c b/core/riscv-rv32i/task.c index 89d7671fe1..b2fda7c6fb 100644 --- a/core/riscv-rv32i/task.c +++ b/core/riscv-rv32i/task.c @@ -20,7 +20,7 @@ typedef struct { * for __switchto() to work. */ uint32_t sp; /* Saved stack pointer for context switch */ - uint32_t events; /* Bitmaps of received events */ + atomic_t events; /* Bitmaps of received events */ uint64_t runtime; /* Time spent in task */ uint32_t *stack; /* Start of stack */ } task_; @@ -229,7 +229,7 @@ task_id_t __ram_code task_get_current(void) return current_task - tasks; } -uint32_t * __ram_code task_get_event_bitmap(task_id_t tskid) +atomic_t * __ram_code task_get_event_bitmap(task_id_t tskid) { task_ *tsk = __task_id_to_ptr(tskid); diff --git a/docs/configuration/config_ap_to_ec_comm.md b/docs/configuration/config_ap_to_ec_comm.md index 24b309feb7..0a517401be 100644 --- a/docs/configuration/config_ap_to_ec_comm.md +++ b/docs/configuration/config_ap_to_ec_comm.md @@ -9,10 +9,10 @@ details a system level of the operation of this feature. Configure the AP to EC communication channel, picking exactly one of the following options. -- `CONFIG_HOSTCMD_SHI` - [SPI Host Interface](../ec_terms.md#shi) (SHI) -- `CONFIG_HOSTCMD_HECI` - HECI interface -- `CONFIG_HOSTCMD_LPC` - [LPC](../ec_terms.md#lpc) bus -- `CONFIG_HOSTCMD_ESPI` - [eSPI](../ec_terms.md#espi) bus +- `CONFIG_HOST_INTERFACE_SHI` - [SPI Host Interface](../ec_terms.md#shi) (SHI) +- `CONFIG_HOST_INTERFACE_HECI` - HECI interface +- `CONFIG_HOST_INTERFACE_LPC` - [LPC](../ec_terms.md#lpc) bus +- `CONFIG_HOST_INTERFACE_ESPI` - [eSPI](../ec_terms.md#espi) bus In [config.h], search for options that start with the same name as your selected communication interface. Override defaults as needed. diff --git a/docs/ec_terms.md b/docs/ec_terms.md index 3b9f88416e..d5f3690615 100644 --- a/docs/ec_terms.md +++ b/docs/ec_terms.md @@ -239,7 +239,7 @@ [BC 1.2 Specification]: <https://www.usb.org/document-library/battery-charging-v12-spec-and-adopters-agreement> [CrOS Board Info]: <https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md> [CEC Wikipedia page]: <https://en.wikipedia.org/wiki/Consumer_Electronics_Control> -[DPTF Readme]: <https://github.com/intel/dptf/blob/master/README.txt> +[DPTF Readme]: <https://github.com/intel/dptf/blob/HEAD/README.txt> [eSPI Specification]: <https://www.intel.com/content/dam/support/us/en/documents/software/chipset-software/327432-004_espi_base_specification_rev1.0.pdf> [FAFT design doc]: <https://chromium.googlesource.com/chromiumos/third_party/autotest/+/HEAD/docs/faft-design-doc.md> [I2C Specification]: <https://www.nxp.com/docs/en/user-guide/UM10204.pdf> diff --git a/docs/fingerprint/fingerprint-dev-for-partners.md b/docs/fingerprint/fingerprint-dev-for-partners.md index 2d9332db5b..4fd6673861 100644 --- a/docs/fingerprint/fingerprint-dev-for-partners.md +++ b/docs/fingerprint/fingerprint-dev-for-partners.md @@ -650,7 +650,7 @@ Make sure that this interface is disabled: <!-- https://docs.google.com/drawings/d/1YhOUD-Qf69NUdugT6n0cX7o7CWvb5begcdmJwv7ch6I --> -[Dragonclaw Rev 0.2 1.8V Rework]: https://github.com/coreboot/chrome-ec/blob/master/docs/images/dragonclaw_rev_0.2_1.8v_load_switch_rework.pdf +[Dragonclaw Rev 0.2 1.8V Rework]: https://github.com/coreboot/chrome-ec/blob/HEAD/docs/images/dragonclaw_rev_0.2_1.8v_load_switch_rework.pdf <!-- https://docs.google.com/drawings/d/1w2qbb4AsSxY-KTK2vXZ6TKeWHveWvS3Dkgh61ocu0wc --> diff --git a/docs/fingerprint/fingerprint.md b/docs/fingerprint/fingerprint.md index 51c6192670..7b55ef7827 100644 --- a/docs/fingerprint/fingerprint.md +++ b/docs/fingerprint/fingerprint.md @@ -582,7 +582,7 @@ a given device can be found by viewing `chrome://system/#platform_identity_sku`. [CBI Info]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md [Chrome OS Config SKU]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/chromeos-config/README.md#identity [Chrome OS Project Configuration]: https://chromium.googlesource.com/chromiumos/config/+/HEAD/README.md -[Starlark]: https://docs.bazel.build/versions/master/skylark/language.html +[Starlark]: https://docs.bazel.build/versions/main/skylark/language.html [`create_fingerprint`]: https://chromium.googlesource.com/chromiumos/config/+/e1fa0d7f56eb3dd6e9378e4326de086ada46b7d3/util/hw_topology.star#444 [Morphius `config.star`]: https://chrome-internal.googlesource.com/chromeos/project/zork/morphius/+/593b657a776ed6b320c826916adc9cd845faf709/config.star#85 [regenerate the config]: https://chromium.googlesource.com/chromiumos/config/+/HEAD/README.md#making-configuration-changes-for-your-project diff --git a/docs/reducing_ec_image_size.md b/docs/reducing_ec_image_size.md index dd7d9bbcab..4b5c5bbf31 100644 --- a/docs/reducing_ec_image_size.md +++ b/docs/reducing_ec_image_size.md @@ -452,7 +452,7 @@ Note that there are some [FAFT tests][5] that rely on the GPIO name. If you enable this option, you may also need to change firmware testing configuration [file][6]. -[1]:./zephyr_build.md#Working-outside-the-chroot +[1]:./zephyr/zephyr_build.md#Working-outside-the-chroot [2]:https://github.com/zephyrproject-rtos/zephyr/blob/main/subsys/shell/Kconfig [3]:https://docs.zephyrproject.org/latest/guides/optimizations/tools.html [4]:https://github.com/zephyrproject-rtos/zephyr/issues/2112 diff --git a/docs/schematics/dragonclaw/README.md b/docs/schematics/dragonclaw/README.md index 66fde41df8..82a2fa2681 100644 --- a/docs/schematics/dragonclaw/README.md +++ b/docs/schematics/dragonclaw/README.md @@ -6,5 +6,5 @@ Note that you'll need to download and save the HTML file from The layout file is in the [`.brd`] file. -[`.brd`]: https://raw.githubusercontent.com/coreboot/chrome-ec/master/docs/schematics/dragonclaw/dragonclaw_v0.2.brd -[schematic]: https://raw.githubusercontent.com/coreboot/chrome-ec/master/docs/schematics/dragonclaw/dragonclaw_v0.2.html +[`.brd`]: https://raw.githubusercontent.com/coreboot/chrome-ec/HEAD/docs/schematics/dragonclaw/dragonclaw_v0.2.brd +[schematic]: https://raw.githubusercontent.com/coreboot/chrome-ec/HEAD/docs/schematics/dragonclaw/dragonclaw_v0.2.html diff --git a/docs/sitemap.md b/docs/sitemap.md index 2b9f4aaaf8..7258aacd17 100644 --- a/docs/sitemap.md +++ b/docs/sitemap.md @@ -35,7 +35,7 @@ ## Testing * [Unit Tests](./unit_tests.md) - * [Porting EC unit tests to Ztest](./ztest.md) + * [Porting EC unit tests to Ztest](./zephyr/ztest.md) * [Code Coverage](./code_coverage.md) ## Updaters @@ -59,10 +59,11 @@ ## Zephyr -* [Initialization Order](./zephyr_init.md) -* [Proof-of-Concept-Device Bringup](./zephyr_poc_device_bringup.md) -* [Shimming](./zephyr_shim.md) -* [Porting EC unit tests to Ztest](./ztest.md) +* [Building Zephyr OS](./zephyr/zephyr_build.md) +* [Initialization Order](./zephyr/zephyr_init.md) +* [Proof-of-Concept-Device Bringup](./zephyr/zephyr_poc_device_bringup.md) +* [Shimming](./zephyr/zephyr_shim.md) +* [Porting EC unit tests to Ztest](./zephyr/ztest.md) ## Miscellaneous diff --git a/docs/unit_tests.md b/docs/unit_tests.md index f26a8519c8..1d9da40f9d 100644 --- a/docs/unit_tests.md +++ b/docs/unit_tests.md @@ -196,7 +196,7 @@ Build and run the test as an EC unit test: ``` For building the test as a Zephyr Ztest unit test, follow the instructions in -[Porting EC unit tests to Ztest](./ztest.md) to build the unit test for Zephyr's +[Porting EC unit tests to Ztest](./zephyr/ztest.md) to build the unit test for Zephyr's "native_posix" host-based target. <!-- mdformat off(b/139308852) --> diff --git a/docs/zephyr_build.md b/docs/zephyr/zephyr_build.md index 60a9e1d97e..60a9e1d97e 100644 --- a/docs/zephyr_build.md +++ b/docs/zephyr/zephyr_build.md diff --git a/docs/zephyr_init.md b/docs/zephyr/zephyr_init.md index 8822736efb..8822736efb 100644 --- a/docs/zephyr_init.md +++ b/docs/zephyr/zephyr_init.md diff --git a/docs/zephyr_poc_device_bringup.md b/docs/zephyr/zephyr_poc_device_bringup.md index 394aa4a05b..394aa4a05b 100644 --- a/docs/zephyr_poc_device_bringup.md +++ b/docs/zephyr/zephyr_poc_device_bringup.md diff --git a/docs/zephyr_shim.md b/docs/zephyr/zephyr_shim.md index fac0383aff..fac0383aff 100644 --- a/docs/zephyr_shim.md +++ b/docs/zephyr/zephyr_shim.md diff --git a/docs/ztest.md b/docs/zephyr/ztest.md index 021b3391bd..021b3391bd 100644 --- a/docs/ztest.md +++ b/docs/zephyr/ztest.md diff --git a/driver/accelgyro_bmi3xx.c b/driver/accelgyro_bmi3xx.c index febe97a7aa..4b525c94df 100644 --- a/driver/accelgyro_bmi3xx.c +++ b/driver/accelgyro_bmi3xx.c @@ -370,6 +370,43 @@ static int read_temp(const struct motion_sensor_t *s, int *temp_ptr) return EC_ERROR_UNIMPLEMENTED; } +static int reset_offset(const struct motion_sensor_t *s, uint8_t offset_en) +{ + uint8_t offset_sel[2] = { BMI3_REG_UGAIN_OFF_SEL, 0 }; + uint8_t reg_data[4] = { 0 }; + + /* Reset the existing offset values by setting the bits in DMA*/ + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, + offset_sel, 2)); + + reg_data[0] = offset_en; + reg_data[1] = 0; + + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, + reg_data, 2)); + + /* Update the offset change to the sensor engine */ + reg_data[0] = (uint8_t)(BMI3_CMD_USR_GAIN_OFFS_UPDATE & + BMI3_SET_LOW_BYTE); + reg_data[1] = (uint8_t)((BMI3_CMD_USR_GAIN_OFFS_UPDATE & + BMI3_SET_HIGH_BYTE) >> 8); + RETURN_ERROR(bmi3_write_n(s, BMI3_REG_CMD, reg_data, 2)); + + /* Delay time for offset update */ + msleep(OFFSET_UPDATE_DELAY); + + /* Read the configuration from the feature engine register */ + RETURN_ERROR(bmi3_read_n(s, BMI3_FEATURE_IO_1, reg_data, 4)); + + if ((reg_data[3] & BMI3_UGAIN_OFFS_UPD_COMPLETE) + && ((reg_data[2] & BMI3_FEATURE_IO_1_ERROR_MASK) + == BMI3_FEATURE_IO_1_NO_ERROR)) { + return EC_SUCCESS; + } + + return EC_ERROR_NOT_CALIBRATED; +} + int get_gyro_offset(const struct motion_sensor_t *s, intv3_t v) { int i; @@ -393,28 +430,25 @@ int get_gyro_offset(const struct motion_sensor_t *s, intv3_t v) return EC_SUCCESS; } -int set_gyro_offset(const struct motion_sensor_t *s, intv3_t v) +static int write_gyro_offset(const struct motion_sensor_t *s, int *val) { uint8_t reg_data[6] = { 0 }; uint8_t base_addr[2] = { BMI3_GYRO_OFFSET_ADDR, 0 }; - int i, val[3]; - - for (i = X; i <= Z; ++i) { - val[i] = round_divide((int64_t)v[i] * BMI_OFFSET_GYRO_DIV_MDS, - BMI_OFFSET_GYRO_MULTI_MDS); - if (val[i] > 511) - val[i] = 511; - if (val[i] < -512) - val[i] = -512; - if (val[i] < 0) - val[i] = 1024 + val[i]; - } + uint8_t offset_sel[2] = { BMI3_REG_UGAIN_OFF_SEL, 0 }; + /* Enable user gain/offset update*/ + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, + offset_sel, 2)); + reg_data[0] = 0; + reg_data[1] = 0; + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, + reg_data, 2)); /* - * Set the user accel offset base address to feature engine + * Set the user gyro offset base address to feature engine * transmission address to start DMA transaction */ - RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, base_addr, 2)); + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, + base_addr, 2)); reg_data[0] = (uint8_t)(val[0] & BMI3_SET_LOW_BYTE); reg_data[1] = (uint8_t)((val[0] & 0x0300) >> 8); @@ -424,16 +458,66 @@ int set_gyro_offset(const struct motion_sensor_t *s, intv3_t v) reg_data[5] = (uint8_t)((val[2] & 0x0300) >> 8); /* Set the configuration to the feature engine register */ - RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, reg_data, - 6)); + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, + reg_data, 6)); /* Update the offset to the sensor engine */ reg_data[0] = (uint8_t)(BMI3_CMD_USR_GAIN_OFFS_UPDATE & BMI3_SET_LOW_BYTE); reg_data[1] = (uint8_t)((BMI3_CMD_USR_GAIN_OFFS_UPDATE & - BMI3_SET_HIGH_BYTE) >> 8); + BMI3_SET_HIGH_BYTE) >> 8); RETURN_ERROR(bmi3_write_n(s, BMI3_REG_CMD, reg_data, 2)); + msleep(OFFSET_UPDATE_DELAY); + + /* Read the configuration from the feature engine register */ + RETURN_ERROR(bmi3_read_n(s, BMI3_FEATURE_IO_1, reg_data, 4)); + + if ((reg_data[3] & BMI3_UGAIN_OFFS_UPD_COMPLETE) + && ((reg_data[2] & BMI3_FEATURE_IO_1_ERROR_MASK) + == BMI3_FEATURE_IO_1_NO_ERROR)) { + return EC_SUCCESS; + } + + return EC_ERROR_NOT_CALIBRATED; +} + +int set_gyro_offset(const struct motion_sensor_t *s, intv3_t v) +{ + uint8_t reg_data[4] = { 0 }; + uint8_t saved_conf[6] = { 0 }; + int i, val[3]; + + for (i = X; i <= Z; ++i) { + val[i] = round_divide((int64_t)v[i] * BMI_OFFSET_GYRO_DIV_MDS, + BMI_OFFSET_GYRO_MULTI_MDS); + if (val[i] > 511) + val[i] = 511; + if (val[i] < -512) + val[i] = -512; + if (val[i] < 0) + val[i] = 1024 + val[i]; + } + + /* Set the power mode as suspend */ + RETURN_ERROR(bmi3_read_n(s, BMI3_REG_ACC_CONF, saved_conf, 6)); + + /* Disable accelerometer and gyroscope */ + reg_data[0] = saved_conf[2]; + reg_data[1] = 0x00; + reg_data[2] = saved_conf[4]; + reg_data[3] = 0x00; + RETURN_ERROR(bmi3_write_n(s, BMI3_REG_ACC_CONF, reg_data, 4)); + + /* Reset the existing offset values */ + RETURN_ERROR(reset_offset(s, 2)); + + /* Set the gyro offset in the sensor registers */ + RETURN_ERROR(write_gyro_offset(s, val)); + + /* Restore ACC_CONF by storing saved_conf data */ + RETURN_ERROR(bmi3_write_n(s, BMI3_REG_ACC_CONF, &saved_conf[2], 4)); + return EC_SUCCESS; } @@ -460,10 +544,64 @@ int get_accel_offset(const struct motion_sensor_t *s, intv3_t v) return EC_SUCCESS; } -int set_accel_offset(const struct motion_sensor_t *s, intv3_t v) +static int write_accel_offsets(const struct motion_sensor_t *s, int *val) { - uint8_t reg_data[6] = { 0 }; uint8_t base_addr[2] = { BMI3_ACC_OFFSET_ADDR, 0 }; + uint8_t offset_sel[2] = { BMI3_REG_UGAIN_OFF_SEL, 0 }; + uint8_t reg_data[6] = {0}; + + /* Enable user gain/offset update*/ + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, + offset_sel, 2)); + reg_data[0] = 0; + reg_data[1] = 0; + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, + reg_data, 2)); + /* + * Set the user accel offset base address to feature engine + * transmission address to start DMA transaction + */ + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, + base_addr, 2)); + + reg_data[0] = (uint8_t)(val[0] & BMI3_SET_LOW_BYTE); + reg_data[1] = (uint8_t)((val[0] & 0x1F00) >> 8); + reg_data[2] = (uint8_t)(val[1] & BMI3_SET_LOW_BYTE); + reg_data[3] = (uint8_t)((val[1] & 0x1F00) >> 8); + reg_data[4] = (uint8_t)(val[2] & BMI3_SET_LOW_BYTE); + reg_data[5] = (uint8_t)((val[2] & 0x1F00) >> 8); + + /* Set the configuration to the feature engine register */ + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, + reg_data, 6)); + + /* Update the offset to the sensor engine */ + reg_data[0] = (uint8_t)(BMI3_CMD_USR_GAIN_OFFS_UPDATE & + BMI3_SET_LOW_BYTE); + + reg_data[1] = (uint8_t)((BMI3_CMD_USR_GAIN_OFFS_UPDATE & + BMI3_SET_HIGH_BYTE) >> 8); + + RETURN_ERROR(bmi3_write_n(s, BMI3_REG_CMD, reg_data, 2)); + + msleep(OFFSET_UPDATE_DELAY); + + /* Read the configuration from the feature engine register */ + RETURN_ERROR(bmi3_read_n(s, BMI3_FEATURE_IO_1, reg_data, 4)); + + if ((reg_data[3] & BMI3_UGAIN_OFFS_UPD_COMPLETE) + && ((reg_data[2] & BMI3_FEATURE_IO_1_ERROR_MASK) + == BMI3_FEATURE_IO_1_NO_ERROR)) { + return EC_SUCCESS; + } + + return EC_ERROR_NOT_CALIBRATED; +} + +int set_accel_offset(const struct motion_sensor_t *s, intv3_t v, + uint8_t reset_en) +{ + uint8_t reg_data[4] = { 0 }; uint8_t saved_conf[6] = { 0 }; int i, val[3]; @@ -488,31 +626,14 @@ int set_accel_offset(const struct motion_sensor_t *s, intv3_t v) reg_data[3] = 0x00; RETURN_ERROR(bmi3_write_n(s, BMI3_REG_ACC_CONF, reg_data, 4)); - /* - * Set the user accel offset base address to feature engine - * transmission address to start DMA transaction - */ - RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, base_addr, 2)); - - reg_data[0] = (uint8_t)(val[0] & BMI3_SET_LOW_BYTE); - reg_data[1] = (uint8_t)((val[0] & 0x1F00) >> 8); - reg_data[2] = (uint8_t)(val[1] & BMI3_SET_LOW_BYTE); - reg_data[3] = (uint8_t)((val[1] & 0x1F00) >> 8); - reg_data[4] = (uint8_t)(val[2] & BMI3_SET_LOW_BYTE); - reg_data[5] = (uint8_t)((val[2] & 0x1F00) >> 8); - - /* Set the configuration to the feature engine register */ - RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, reg_data, - 6)); - - /* Update the offset to the sensor engine */ - reg_data[0] = (uint8_t)(BMI3_CMD_USR_GAIN_OFFS_UPDATE & - BMI3_SET_LOW_BYTE); - - reg_data[1] = (uint8_t)((BMI3_CMD_USR_GAIN_OFFS_UPDATE & - BMI3_SET_HIGH_BYTE) >> 8); + /* Reset the existing offset values */ + if (reset_en) { + /* Reset is only done for writing offset and not for FOC */ + RETURN_ERROR(reset_offset(s, 1)); + } - RETURN_ERROR(bmi3_write_n(s, BMI3_REG_CMD, reg_data, 2)); + /* Set the accel offset in the sensor registers */ + RETURN_ERROR(write_accel_offsets(s, val)); /* Restore ACC_CONF by storing saved_conf data */ RETURN_ERROR(bmi3_write_n(s, BMI3_REG_ACC_CONF, &saved_conf[2], 4)); @@ -585,7 +706,10 @@ static int8_t perform_accel_foc(struct motion_sensor_t *s, int *target, rotate_inv(offset, *s->rot_standard_ref, offset); - RETURN_ERROR(set_accel_offset(s, offset)); + /* Set accel offset without resetting the existing offsets + * since we calculated the bias with the existing offsets + */ + RETURN_ERROR(set_accel_offset(s, offset, BMI3_DISABLE)); return EC_SUCCESS; } @@ -596,7 +720,7 @@ static int set_gyro_foc_config(struct motion_sensor_t *s) uint8_t base_addr[2] = { BMI3_BASE_ADDR_SC, 0 }; /* - * Set the user accel offset base address to feature engine + * Set the FOC base address to feature engine * transmission address to start DMA transaction */ RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, base_addr, 2)); @@ -629,7 +753,7 @@ static int get_calib_result(struct motion_sensor_t *s) for (i = 0; i < 25; i++) { /* A delay of 120ms is required to read this status register */ - msleep(120); + msleep(OFFSET_UPDATE_DELAY); /* Read the configuration from the feature engine register */ RETURN_ERROR(bmi3_read_n(s, BMI3_FEATURE_IO_1, reg_data, 4)); @@ -768,7 +892,7 @@ static int set_offset(const struct motion_sensor_t *s, switch (s->type) { case MOTIONSENSE_TYPE_ACCEL: /* Offset should be in units of mg */ - RETURN_ERROR(set_accel_offset(s, v)); + RETURN_ERROR(set_accel_offset(s, v, BMI3_ENABLE)); break; case MOTIONSENSE_TYPE_GYRO: /* Offset should be in units of mdps */ diff --git a/driver/accelgyro_bmi3xx.h b/driver/accelgyro_bmi3xx.h index b52d503f92..afd6855bc0 100644 --- a/driver/accelgyro_bmi3xx.h +++ b/driver/accelgyro_bmi3xx.h @@ -50,7 +50,7 @@ #define BMI3_REG_GYR_CONF 0x21 #define BMI3_REG_INT_MAP1 0x3A #define BMI3_REG_FIFO_WATERMARK 0x35 - +#define BMI3_REG_UGAIN_OFF_SEL 0x3F #define BMI3_REG_FIFO_CONF 0x36 #define BMI3_FIFO_STOP_ON_FULL 0x01 #define BMI3_FIFO_TIME_EN 0x01 @@ -106,9 +106,10 @@ #define BMI3_ACC_FOC_16G_REF 2048 #define BMI3_FOC_SAMPLE_LIMIT 32 -/* 20ms delay for 50Hz ODR */ #define FOC_TRY_COUNT 5 +/* 20ms delay for 50Hz ODR */ #define FOC_DELAY 20 +#define OFFSET_UPDATE_DELAY 120 #define BMI3_INT_STATUS_FWM 0x4000 #define BMI3_INT_STATUS_FFULL 0x8000 #define BMI3_INT_STATUS_ORIENTATION 0x0008 diff --git a/driver/bc12/mt6360.c b/driver/bc12/mt6360.c index 50aa4d0e45..e9fc769d5e 100644 --- a/driver/bc12/mt6360.c +++ b/driver/bc12/mt6360.c @@ -166,7 +166,11 @@ static void mt6360_usb_charger_task(const int port) /* vbus change, start bc12 detection */ if (evt & USB_CHG_EVENT_VBUS) { - if (pd_snk_is_vbus_provided(port)) + bool is_non_pd_sink = !pd_capable(port) && + pd_get_power_role(port) == PD_ROLE_SINK && + pd_snk_is_vbus_provided(port); + + if (is_non_pd_sink) mt6360_enable_bc12_detection(1); else mt6360_update_charge_manager( diff --git a/driver/build.mk b/driver/build.mk index cb7262e778..e0ccda2b10 100644 --- a/driver/build.mk +++ b/driver/build.mk @@ -121,6 +121,7 @@ driver-$(CONFIG_TEMP_SENSOR_G753)+=temp_sensor/g753.o driver-$(CONFIG_TEMP_SENSOR_G781)+=temp_sensor/g78x.o driver-$(CONFIG_TEMP_SENSOR_G782)+=temp_sensor/g78x.o driver-$(CONFIG_TEMP_SENSOR_OTI502)+=temp_sensor/oti502.o +driver-$(CONFIG_TEMP_SENSOR_PCT2075)+=temp_sensor/pct2075.o driver-$(CONFIG_TEMP_SENSOR_SB_TSI)+=temp_sensor/sb_tsi.o driver-$(CONFIG_TEMP_SENSOR_TMP006)+=temp_sensor/tmp006.o driver-$(CONFIG_TEMP_SENSOR_TMP112)+=temp_sensor/tmp112.o diff --git a/driver/charger/bq25710.c b/driver/charger/bq25710.c index d3aeb354af..0e0cf56725 100644 --- a/driver/charger/bq25710.c +++ b/driver/charger/bq25710.c @@ -54,6 +54,10 @@ #define CONFIG_CHARGER_BQ25720_IDCHG_TH2 1 #endif +#ifndef CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM +#define CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG 0 +#endif + /* * Helper macros */ @@ -62,6 +66,10 @@ CHARGE_OPTION_1, \ _field, _c, (_x)) +#define SET_CO2(_field, _v, _x) SET_BQ_FIELD(BQ257X0, \ + CHARGE_OPTION_2, \ + _field, _v, (_x)) + #define SET_CO2_BY_NAME(_field, _c, _x) SET_BQ_FIELD_BY_NAME(BQ257X0, \ CHARGE_OPTION_2, \ _field, _c, (_x)) @@ -78,6 +86,10 @@ CHARGE_OPTION_4, \ _field, _v, (_x)) +#define SET_CO4_BY_NAME(_field, _c, _x) SET_BQ_FIELD_BY_NAME(BQ25720, \ + CHARGE_OPTION_4, \ + _field, _c, (_x)) + #define SET_PO1(_field, _v, _x) SET_BQ_FIELD(BQ257X0, \ PROCHOT_OPTION_1, \ _field, _v, (_x)) @@ -387,6 +399,12 @@ static int bq257x0_init_charge_option_2(int chgnum) */ reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_2, PKPWR_TMAX, 0, reg); + if (IS_ENABLED(CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM)) { + /* Set input overload time in peak power mode. */ + reg = SET_CO2(PKPWR_TOVLD_DEG, + CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG, reg); + } + if (IS_ENABLED(CONFIG_CHARGER_BQ25710_EN_ACOC)) { /* Enable AC input over-current protection. */ reg = SET_CO2_BY_NAME(EN_ACOC, ENABLE, reg); @@ -399,12 +417,7 @@ static int bq257x0_init_charge_option_2(int chgnum) if (IS_ENABLED(CONFIG_CHARGER_BQ25710_BATOC_VTH_MINIMUM)) { /* Set battery over-current threshold to minimum. */ - if (IS_ENABLED(CONFIG_CHARGER_BQ25720)) - reg = SET_BQ_FIELD_BY_NAME(BQ25720, CHARGE_OPTION_2, - BATOC_VTH, 1P33, reg); - else - reg = SET_BQ_FIELD_BY_NAME(BQ25710, CHARGE_OPTION_2, - BATOC_VTH, 1P50, reg); + reg = SET_CO2_BY_NAME(BATOC_VTH, 1P33, reg); } return raw_write16(chgnum, BQ25710_REG_CHARGE_OPTION_2, reg); @@ -454,6 +467,9 @@ static int bq257x0_init_charge_option_4(int chgnum) if (IS_ENABLED(CONFIG_CHARGER_BQ25720_IDCHG_TH2_CUSTOM)) reg = SET_CO4(IDCHG_TH2, CONFIG_CHARGER_BQ25720_IDCHG_TH2, reg); + if (IS_ENABLED(CONFIG_CHARGER_BQ25720_PP_IDCHG2)) + reg = SET_CO4_BY_NAME(PP_IDCHG2, ENABLE, reg); + return raw_write16(chgnum, BQ25720_REG_CHARGE_OPTION_4, reg); } diff --git a/driver/charger/bq257x0_regs.h b/driver/charger/bq257x0_regs.h index 0df033f535..455233d501 100644 --- a/driver/charger/bq257x0_regs.h +++ b/driver/charger/bq257x0_regs.h @@ -57,6 +57,10 @@ /* * ChargeOption2 Register (0x31) */ +#define BQ257X0_CHARGE_OPTION_2_PKPWR_TOVLD_DEG_SHIFT 14 +#define BQ257X0_CHARGE_OPTION_2_PKPWR_TOVLD_DEG_BITS 2 +#define BQ25720_CHARGE_OPTION_2_PKPWR_TOVLD_DEG__10MS 3 + #define BQ257X0_CHARGE_OPTION_2_PKPWR_TMAX_SHIFT 8 #define BQ257X0_CHARGE_OPTION_2_PKPWR_TMAX_BITS 2 @@ -73,20 +77,10 @@ #define BQ257X0_CHARGE_OPTION_2_ACOC_VTH__1P33 0 #define BQ257X0_CHARGE_OPTION_2_ACOC_VTH__2P00 1 -#define BQ257X0_CHARGE_OPTION_2_ACOC_VTH_SHIFT 2 -#define BQ257X0_CHARGE_OPTION_2_ACOC_VTH_BITS 1 -#define BQ257X0_CHARGE_OPTION_2_ACOC_VTH__1P33 0 -#define BQ257X0_CHARGE_OPTION_2_ACOC_VTH__2P00 1 - -#define BQ25710_CHARGE_OPTION_2_BATOC_VTH_SHIFT 0 -#define BQ25710_CHARGE_OPTION_2_BATOC_VTH_BITS 1 -#define BQ25710_CHARGE_OPTION_2_BATOC_VTH__1P50 0 -#define BQ25710_CHARGE_OPTION_2_BATOC_VTH__2P00 1 - -#define BQ25720_CHARGE_OPTION_2_BATOC_VTH_SHIFT 0 -#define BQ25720_CHARGE_OPTION_2_BATOC_VTH_BITS 1 -#define BQ25720_CHARGE_OPTION_2_BATOC_VTH__1P33 0 -#define BQ25720_CHARGE_OPTION_2_BATOC_VTH__2P00 1 +#define BQ257X0_CHARGE_OPTION_2_BATOC_VTH_SHIFT 0 +#define BQ257X0_CHARGE_OPTION_2_BATOC_VTH_BITS 1 +#define BQ257X0_CHARGE_OPTION_2_BATOC_VTH__1P33 0 +#define BQ257X0_CHARGE_OPTION_2_BATOC_VTH__2P00 1 /* * ChargeOption3 Register (0x32) @@ -119,6 +113,11 @@ #define BQ25720_CHARGE_OPTION_4_IDCHG_TH2__1P25 0 #define BQ25720_CHARGE_OPTION_4_IDCHG_TH2__1P5 1 +#define BQ25720_CHARGE_OPTION_4_PP_IDCHG2_SHIFT 2 +#define BQ25720_CHARGE_OPTION_4_PP_IDCHG2_BITS 1 +#define BQ25720_CHARGE_OPTION_4_PP_IDCHG2__DISABLE 0 +#define BQ25720_CHARGE_OPTION_4_PP_IDCHG2__ENABLE 1 + /* * Vmin Active Protection Register (0x37) */ diff --git a/driver/charger/isl923x.h b/driver/charger/isl923x.h index 558c17f971..0de2a32ae5 100644 --- a/driver/charger/isl923x.h +++ b/driver/charger/isl923x.h @@ -42,7 +42,7 @@ /* Maximum charging current register value */ #define ISL923X_CURRENT_REG_MAX 0x17c0 /* bit<12:2> 10111110000 */ -#define RAA489000_CURRENT_REG_MAX 0x1ffc +#define RAA489000_CURRENT_REG_MAX 0x17fc /* 2-level adpater current limit duration T1 & T2 in micro seconds */ #define ISL923X_T1_10000 0x00 diff --git a/driver/ppc/sn5s330.c b/driver/ppc/sn5s330.c index 1aac04af02..3fa44ae803 100644 --- a/driver/ppc/sn5s330.c +++ b/driver/ppc/sn5s330.c @@ -464,7 +464,14 @@ static int sn5s330_init(int port) i2c_write8(i2c_port, i2c_addr_flags, SN5S330_INT_STATUS_REG4, regval); - /* Turn on PP2 FET. */ + /* + * Turn on PP2 FET. + * Although PP2 FET is already enabled during dead batter boot + * by the spec, we force that state here. + * + * TODO(207034759): Verify need or remove redundant PP2 set. + */ + status = sn5s330_pp_fet_enable(port, SN5S330_PP2, 1); if (status) { ppc_prints("Failed to turn on PP2 FET!", port); diff --git a/driver/ppc/sn5s330.h b/driver/ppc/sn5s330.h index fbf1159165..9768906182 100644 --- a/driver/ppc/sn5s330.h +++ b/driver/ppc/sn5s330.h @@ -111,6 +111,7 @@ enum sn5s330_pp_idx { /* FUNC_SET_9 */ #define SN5S330_FORCE_OVP_EN_SBU BIT(1) #define SN5S330_PP2_CONFIG BIT(2) +#define SN5S330_PWR_OVR_VBUS BIT(3) #define SN5S330_OVP_EN_CC BIT(4) #define SN5S330_CONFIG_UVP BIT(5) #define SN5S330_FORCE_ON_VBUS_OVP BIT(6) diff --git a/driver/tcpm/ps8xxx.c b/driver/tcpm/ps8xxx.c index 426219f1fa..e84aee8077 100644 --- a/driver/tcpm/ps8xxx.c +++ b/driver/tcpm/ps8xxx.c @@ -710,11 +710,12 @@ static int ps8xxx_get_chip_info(int port, int live, static int ps8xxx_enter_low_power_mode(int port) { /* - * PS8751 has the auto sleep function that enters low power mode on - * its own in ~2 seconds. Other chips don't have it. Stub it out for - * PS8751. + * PS8751/PS8815 has the auto sleep function that enters + * low power mode on its own in ~2 seconds. Other chips + * don't have it. Stub it out for PS8751/PS8815. */ - if (product_id[port] == PS8751_PRODUCT_ID) + if (product_id[port] == PS8751_PRODUCT_ID || + product_id[port] == PS8815_PRODUCT_ID) return EC_SUCCESS; return tcpci_enter_low_power_mode(port); diff --git a/driver/tcpm/rt1718s.c b/driver/tcpm/rt1718s.c index 9d5a8895ad..beabd8830b 100644 --- a/driver/tcpm/rt1718s.c +++ b/driver/tcpm/rt1718s.c @@ -326,7 +326,11 @@ static void rt1718s_bc12_usb_charger_task(const int port) uint32_t evt = task_wait_event(-1); if (evt & USB_CHG_EVENT_VBUS) { - if (pd_snk_is_vbus_provided(port)) + bool is_non_pd_sink = !pd_capable(port) && + pd_get_power_role(port) == PD_ROLE_SINK && + pd_snk_is_vbus_provided(port); + + if (is_non_pd_sink) rt1718s_enable_bc12_sink(port, true); else rt1718s_update_charge_manager( @@ -428,7 +432,7 @@ static int rt1718s_enter_low_power_mode(int port) int rt1718s_get_adc(int port, enum rt1718s_adc_channel channel, int *adc_val) { - static struct mutex adc_lock; + static mutex_t adc_lock; int rv; const int max_wait_times = 30; diff --git a/driver/temp_sensor/pct2075.c b/driver/temp_sensor/pct2075.c new file mode 100644 index 0000000000..bde1521edc --- /dev/null +++ b/driver/temp_sensor/pct2075.c @@ -0,0 +1,91 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* PCT2075 temperature sensor module for Chrome EC */ + +#include "common.h" +#include "console.h" +#include "pct2075.h" +#include "i2c.h" +#include "hooks.h" +#include "math_util.h" +#include "util.h" + +#define PCT2075_RESOLUTION 11 +#define PCT2075_SHIFT1 (16 - PCT2075_RESOLUTION) +#define PCT2075_SHIFT2 (PCT2075_RESOLUTION - 8) + +#define CPRINTS(format, args...) cprints(CC_THERMAL, format, ## args) + +static int temp_mk_local[PCT2075_COUNT]; + +static int raw_read16(int sensor, const int offset, int *data_ptr) +{ +#ifdef CONFIG_I2C_BUS_MAY_BE_UNPOWERED + /* + * Don't try to read if the port is unpowered + */ + if (!board_is_i2c_port_powered(pct2075_sensors[sensor].i2c_port)) + return EC_ERROR_NOT_POWERED; +#endif + return i2c_read16(pct2075_sensors[sensor].i2c_port, + pct2075_sensors[sensor].i2c_addr_flags, + offset, data_ptr); +} + +static int get_reg_temp(int sensor, int *temp_ptr) +{ + int temp_raw = 0; + + RETURN_ERROR(raw_read16(sensor, PCT2075_REG_TEMP, &temp_raw)); + + *temp_ptr = (int)(int16_t)temp_raw; + return EC_SUCCESS; +} + +static inline int pct2075_reg_to_mk(int16_t reg) +{ + int temp_mc; + + temp_mc = (((reg >> PCT2075_SHIFT1) * 1000) >> PCT2075_SHIFT2); + + return MILLI_CELSIUS_TO_MILLI_KELVIN(temp_mc); +} + +int pct2075_get_val_k(int idx, int *temp_k_ptr) +{ + if (idx >= PCT2075_COUNT) + return EC_ERROR_INVAL; + + *temp_k_ptr = MILLI_KELVIN_TO_KELVIN(temp_mk_local[idx]); + return EC_SUCCESS; +} + +int pct2075_get_val_mk(int idx, int *temp_mk_ptr) +{ + if (idx >= PCT2075_COUNT) + return EC_ERROR_INVAL; + + *temp_mk_ptr = temp_mk_local[idx]; + return EC_SUCCESS; +} + +static void pct2075_poll(void) +{ + int s; + int temp_reg = 0; + + for (s = 0; s < PCT2075_COUNT; s++) { + if (get_reg_temp(s, &temp_reg) == EC_SUCCESS) + temp_mk_local[s] = pct2075_reg_to_mk(temp_reg); + } +} +DECLARE_HOOK(HOOK_SECOND, pct2075_poll, HOOK_PRIO_TEMP_SENSOR); + +void pct2075_init(void) +{ +/* Incase we need to initialize somthing */ +} +DECLARE_HOOK(HOOK_INIT, pct2075_init, HOOK_PRIO_DEFAULT); diff --git a/driver/temp_sensor/pct2075.h b/driver/temp_sensor/pct2075.h new file mode 100644 index 0000000000..c09d0e383c --- /dev/null +++ b/driver/temp_sensor/pct2075.h @@ -0,0 +1,70 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_PCT2075_H +#define __CROS_EC_PCT2075_H + +#include "i2c.h" + +#define PCT2075_I2C_ADDR_FLAGS0 (0x48 | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS1 (0x49 | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS2 (0x4A | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS3 (0x4B | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS4 (0x4C | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS5 (0x4D | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS6 (0x4E | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS7 (0x4F | I2C_FLAG_BIG_ENDIAN) + +#define PCT2075_REG_TEMP 0x00 +#define PCT2075_REG_CONF 0x01 +#define PCT2075_REG_THYST 0x02 +#define PCT2075_REG_TOS 0x03 + +/* + * I2C port and address information for all the board PCT2075 sensors should be + * defined in an array of the following structures, with an enum PCT2075_sensor + * indexing the array. The enum PCT2075_sensor shall end with a PCT2075_COUNT + * defining the maximum number of sensors for the board. + */ + +struct pct2075_sensor_t { + int i2c_port; + int i2c_addr_flags; +}; + +extern const struct pct2075_sensor_t pct2075_sensors[]; + +/** + * Get the last polled value of a sensor. + * + * @param idx Index to read, from board's enum PCT2075_sensor + * definition + * + * @param temp_k_ptr Destination for temperature in K. + * + * @return EC_SUCCESS if successful, non-zero if error. + */ +int pct2075_get_val_k(int idx, int *temp_k_ptr); + +/** + * Get the last polled value of a sensor. + * + * @param idx Index to read, from board's enum PCT2075_sensor + * definition + * + * @param temp_mk_ptr Destination for temperature in mK. + * + * @return EC_SUCCESS if successful, non-zero if error. + */ +int pct2075_get_val_mk(int idx, int *temp_mk_ptr); + +/** + * Init the sensors. Note, this will run automatically on HOOK_INIT, but is + * made available for boards which may not always power the sensor in all + * states. + */ +void pct2075_init(void); + +#endif /* __CROS_EC_PCT2075_H */ diff --git a/driver/usb_mux/tusb1064.c b/driver/usb_mux/tusb1064.c index c236e3d1ab..6a82aca68f 100644 --- a/driver/usb_mux/tusb1064.c +++ b/driver/usb_mux/tusb1064.c @@ -14,12 +14,6 @@ #error "Must choose CONFIG_USB_MUX_TUSB1044 or CONFIG_USB_MUX_TUSB1064" #endif -/* - * configuration bits which never change in the General Register - * e.g. REG_GENERAL_DP_EN_CTRL or REG_GENERAL_EQ_OVERRIDE - */ -#define REG_GENERAL_STATIC_BITS REG_GENERAL_EQ_OVERRIDE - static int tusb1064_read(const struct usb_mux *me, uint8_t reg, uint8_t *val) { int buffer = 0xee; @@ -60,11 +54,54 @@ void tusb1044_hpd_update(const struct usb_mux *me, mux_state_t mux_state) } #endif +int tusb1064_set_dp_rx_eq(const struct usb_mux *me, int db) +{ + uint8_t reg; + int rv; + + if (db < TUSB1064_DP_EQ_RX_NEG_0_3_DB || db > TUSB1064_DP_EQ_RX_12_1_DB) + return EC_ERROR_INVAL; + + /* Set the requested gain values */ + reg = TUSB1064_DP1EQ(db) | TUSB1064_DP3EQ(db); + rv = tusb1064_write(me, TUSB1064_REG_DP1DP3EQ_SEL, reg); + if (rv) + return rv; + + reg = TUSB1064_DP0EQ(db) | TUSB1064_DP2EQ(db); + rv = tusb1064_write(me, TUSB1064_REG_DP0DP2EQ_SEL, reg); + if (rv) + return rv; + + /* Enable EQ_OVERRIDE so the gain registers are used */ + rv = tusb1064_read(me, TUSB1064_REG_GENERAL, ®); + if (rv) + return rv; + + reg |= REG_GENERAL_EQ_OVERRIDE; + + return tusb1064_write(me, TUSB1064_REG_GENERAL, reg); +} + /* Writes control register to set switch mode */ static int tusb1064_set_mux(const struct usb_mux *me, mux_state_t mux_state, bool *ack_required) { - int reg = REG_GENERAL_STATIC_BITS; + uint8_t reg; + int rv; + int mask; + + rv = tusb1064_read(me, TUSB1064_REG_GENERAL, ®); + if (rv) + return rv; + + /* Mask bits that may be set in this function */ + mask = REG_GENERAL_CTLSEL_USB3 | REG_GENERAL_CTLSEL_ANYDP | + REG_GENERAL_FLIPSEL; +#ifdef CONFIG_USB_MUX_TUSB1044 + mask |= REG_GENERAL_HPDIN_OVERRIDE; +#endif + reg &= ~mask; /* This driver does not use host command ACKs */ *ack_required = false; @@ -112,22 +149,8 @@ static int tusb1064_get_mux(const struct usb_mux *me, mux_state_t *mux_state) static int tusb1064_init(const struct usb_mux *me) { int res; - uint8_t reg; bool unused; - /* Default to "Floating Pin" DP Equalization */ - reg = TUSB1064_DP1EQ(TUSB1064_DP_EQ_RX_10_0_DB) | - TUSB1064_DP3EQ(TUSB1064_DP_EQ_RX_10_0_DB); - res = tusb1064_write(me, TUSB1064_REG_DP1DP3EQ_SEL, reg); - if (res) - return res; - - reg = TUSB1064_DP0EQ(TUSB1064_DP_EQ_RX_10_0_DB) | - TUSB1064_DP2EQ(TUSB1064_DP_EQ_RX_10_0_DB); - res = tusb1064_write(me, TUSB1064_REG_DP0DP2EQ_SEL, reg); - if (res) - return res; - /* * Note that bypassing the usb_mux API is okay for internal driver calls * since the task calling init already holds this port's mux lock. diff --git a/driver/usb_mux/tusb1064.h b/driver/usb_mux/tusb1064.h index f6aa8e612e..a71d6defa3 100644 --- a/driver/usb_mux/tusb1064.h +++ b/driver/usb_mux/tusb1064.h @@ -140,4 +140,13 @@ void tusb1044_hpd_update(const struct usb_mux *me, mux_state_t mux_state); #endif +/** + * Set DP Rx Equalization value + * + * @param *me pointer to usb_mux descriptor + * @param db requested gain setting for DP Rx path + * @return EC_SUCCESS if db param is valid and I2C is successful + */ +int tusb1064_set_dp_rx_eq(const struct usb_mux *me, int db); + #endif /* __CROS_EC_TUSB1064_H */ diff --git a/driver/usb_mux/usb_mux.c b/driver/usb_mux/usb_mux.c index ee7f96b905..319f802ff5 100644 --- a/driver/usb_mux/usb_mux.c +++ b/driver/usb_mux/usb_mux.c @@ -358,8 +358,15 @@ static int configure_mux(int port, if (IS_ENABLED(HAS_TASK_USB_MUX)) { assert(task_get_current() == TASK_ID_USB_MUX); } else { +#if defined(CONFIG_ZEPHYR) && defined(TEST_BUILD) + assert(port == + TASK_ID_TO_PD_PORT(task_get_current()) || + task_get_current() == + TASK_ID_TEST_RUNNER); +#else assert(port == TASK_ID_TO_PD_PORT(task_get_current())); +#endif /* defined(CONFIG_ZEPHYR) && defined(TEST_BUILD) */ } /* diff --git a/driver/usb_mux/virtual.c b/driver/usb_mux/virtual.c index 4388bb485a..0ca6c2a8d9 100644 --- a/driver/usb_mux/virtual.c +++ b/driver/usb_mux/virtual.c @@ -55,16 +55,10 @@ static inline void virtual_mux_update_state(int port, mux_state_t mux_state, * TCSS Mux to allow better synchronization between them and thereby * remain in the same state for achieving proper safe state * terminations. + * + * Note the AP will only ACK if the mux state changed in some way. */ - - /* TODO(b/186777984): Wait for an ACK for all mux state change */ - - if ((!(previous_mux_state & USB_PD_MUX_SAFE_MODE) && - (mux_state & USB_PD_MUX_SAFE_MODE)) || - ((previous_mux_state & USB_PD_MUX_SAFE_MODE) && - !(mux_state & USB_PD_MUX_SAFE_MODE)) || - ((previous_mux_state != USB_PD_MUX_NONE) && - (mux_state == USB_PD_MUX_NONE))) + if (previous_mux_state != mux_state) *ack_required = true; } diff --git a/include/atomic_t.h b/include/atomic_t.h new file mode 100644 index 0000000000..dddde95e5a --- /dev/null +++ b/include/atomic_t.h @@ -0,0 +1,18 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* This file is to provide atomic_t definition */ + +#ifndef __CROS_EC_ATOMIC_T_H +#define __CROS_EC_ATOMIC_T_H + +#ifndef CONFIG_ZEPHYR +typedef int atomic_t; +typedef atomic_t atomic_val_t; +#else +#include <sys/atomic.h> +#endif + +#endif /* __CROS_EC_ATOMIC_T_H */ diff --git a/include/chipset.h b/include/chipset.h index 333cef8ef4..8f242624a6 100644 --- a/include/chipset.h +++ b/include/chipset.h @@ -30,7 +30,7 @@ */ enum chipset_state_mask { CHIPSET_STATE_HARD_OFF = 0x01, /* Hard off (G3) */ - CHIPSET_STATE_SOFT_OFF = 0x02, /* Soft off (S5) */ + CHIPSET_STATE_SOFT_OFF = 0x02, /* Soft off (S5, S4) */ CHIPSET_STATE_SUSPEND = 0x04, /* Suspend (S3) */ CHIPSET_STATE_ON = 0x08, /* On (S0) */ CHIPSET_STATE_STANDBY = 0x10, /* Standby (S0ix) */ diff --git a/include/config.h b/include/config.h index 7fc59ac4a1..02f49f93ec 100644 --- a/include/config.h +++ b/include/config.h @@ -1106,6 +1106,17 @@ */ #undef CONFIG_CHARGER_BQ25710_CMP_REF_1P2 +/* Enable if CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG should be applied */ +#undef CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM + +/* + * Input overload time when in peak power mode (PKPWR_TOVLD_DEG). This + * limits how long the charger can draw ILIM2 from the adapter. This is + * a 2 bit field. On the bq25710 1 ms to 20 ms can be encoded. On the + * bq25720 1 ms to 10 ms can be encoded. + */ +#undef CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG + /* * This config option is used to enable the charger's AC over-current * protection. The converter turns off when the OC threshold is @@ -1150,6 +1161,13 @@ */ #undef CONFIG_CHARGER_BQ25710_PP_ACOK +/* + * This config option sets the PP_IDCHG2 bit in the Charge Option 4 + * register. This causes PROCHOT to be pulsed when IDCHG_TH2 is reached. + */ + +#undef CONFIG_CHARGER_BQ25720_PP_IDCHG2 + /* Enable if CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_MV should be applied */ #undef CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_CUSTOM @@ -2395,7 +2413,7 @@ * Accept EC host commands over the SPI host interface. The AP is SPI * controller and the EC is the SPI peripheral for this configuration. */ -#undef CONFIG_HOSTCMD_SHI +#undef CONFIG_HOST_INTERFACE_SHI /* * Host command rate limiting assures EC will have time to process lower @@ -3141,26 +3159,27 @@ #undef CONFIG_HID_HECI /* Support host command interface over HECI */ -#undef CONFIG_HOSTCMD_HECI +#undef CONFIG_HOST_INTERFACE_HECI /* * EC supports x86 host communication with AP. This can either be through LPC * or eSPI. The CONFIG_HOSTCMD_X86 will get automatically defined if either - * CONFIG_HOSTCMD_LPC or CONFIG_HOSTCMD_ESPI are defined. LPC and eSPI are - * mutually exclusive. + * CONFIG_HOST_INTERFACE_LPC or CONFIG_HOST_INTERFACE_ESPI are defined. + * LPC and eSPI are mutually exclusive. */ #undef CONFIG_HOSTCMD_X86 /* Support host command interface over LPC bus. */ -#undef CONFIG_HOSTCMD_LPC +#undef CONFIG_HOST_INTERFACE_LPC /* Support host command interface over eSPI bus. */ -#undef CONFIG_HOSTCMD_ESPI +#undef CONFIG_HOST_INTERFACE_ESPI /* - * SLP signals (SLP_S3 and SLP_S4) use virtual wires intead of physical pins - * with eSPI interface. + * SLP signals (SLP_S3, SLP_S4, and SLP_S5) use virtual wires instead of + * physical pins with eSPI interface. */ #undef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #undef CONFIG_HOSTCMD_ESPI_VW_SLP_S4 +#undef CONFIG_HOSTCMD_ESPI_VW_SLP_S5 /* MCHP next two items are EC eSPI slave configuration */ /* Maximum clock frequence eSPI EC slave advertises @@ -3512,6 +3531,9 @@ /* Support S0ix */ #undef CONFIG_POWER_S0IX +/* Advertise S4 residency */ +#undef CONFIG_POWER_S4_RESIDENCY + /* Support detecting failure to enter a sleep state (S0ix/S3) */ #undef CONFIG_POWER_SLEEP_FAILURE_DETECTION @@ -4006,8 +4028,10 @@ #undef CONFIG_TEMP_SENSOR_G781 /* G781 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_G782 /* G782 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_OTI502 /* OTI502 sensor, on I2C bus */ +#undef CONFIG_TEMP_SENSOR_PCT2075 /* PCT2075 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_SB_TSI /* SB_TSI sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_TMP006 /* TI TMP006 sensor, on I2C bus */ +#undef CONFIG_TEMP_SENSOR_TMP112 /* TI TMP112 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_TMP411 /* TI TMP411 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_TMP432 /* TI TMP432 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_TMP468 /* TI TMP468 sensor, on I2C bus */ @@ -4389,6 +4413,12 @@ #undef CONFIG_USB_PD_RUNTIME_FLAGS /* + * Define to enable the PD Data Reset Message. This is mandatory for + * USB4 and optional for USB 3.2 + */ +#undef CONFIG_USB_PD_DATA_RESET_MSG + +/* * Define if this board can enable VBUS discharge (eg. through a GPIO-controlled * discharge circuit, or through port controller registers) to discharge VBUS * rapidly on disconnect. Will be defined automatically when one of the below @@ -5507,16 +5537,29 @@ * are configured as virtual wires. */ #if defined(CONFIG_HOSTCMD_ESPI_VW_SLP_S3) || \ - defined(CONFIG_HOSTCMD_ESPI_VW_SLP_S4) + defined(CONFIG_HOSTCMD_ESPI_VW_SLP_S4) || \ + defined(CONFIG_HOSTCMD_ESPI_VW_SLP_S5) #define CONFIG_HOST_ESPI_VW_POWER_SIGNAL #endif /* + * S4 residency works by observing SLP_S5 via virtual wire (as SLP_S5 has not + * traditionally been routed to the EC). If the board family wants S4 residency, + * they need to use ECs that support eSPI. Note that S4 residency is not + * strictly a requirement to support suspend-to-disk, except on Intel platforms + * with Key Locker support (TGL+). + */ +#if defined(CONFIG_POWER_S4_RESIDENCY) && \ + !defined(CONFIG_HOSTCMD_ESPI_VW_SLP_S5) +#error "S4_RESIDENCY needs eSPI support or SLP_S5 routed" +#endif + +/* * Note that in Zephyr OS, eSPI can be enabled for virtual wires * without using eSPI for host commands. */ #if (!defined(CONFIG_ZEPHYR) && defined(CONFIG_HOST_ESPI_VW_POWER_SIGNAL) && \ - !defined(CONFIG_HOSTCMD_ESPI)) + !defined(CONFIG_HOST_INTERFACE_ESPI)) #error Must enable eSPI to enable virtual wires. #endif @@ -5641,17 +5684,17 @@ * Automatically define CONFIG_HOSTCMD_X86 if either child option is defined. * Ensure LPC and eSPI are mutually exclusive */ -#if defined(CONFIG_HOSTCMD_LPC) || defined(CONFIG_HOSTCMD_ESPI) +#if defined(CONFIG_HOST_INTERFACE_LPC) || defined(CONFIG_HOST_INTERFACE_ESPI) #define CONFIG_HOSTCMD_X86 #endif -#if defined(CONFIG_HOSTCMD_LPC) && defined(CONFIG_HOSTCMD_ESPI) +#if defined(CONFIG_HOST_INTERFACE_LPC) && defined(CONFIG_HOST_INTERFACE_ESPI) #error Must select only one type of host communication bus. #endif #if defined(CONFIG_HOSTCMD_X86) && \ - !defined(CONFIG_HOSTCMD_LPC) && \ - !defined(CONFIG_HOSTCMD_ESPI) + !defined(CONFIG_HOST_INTERFACE_LPC) && \ + !defined(CONFIG_HOST_INTERFACE_ESPI) #error Must select one type of host communication bus. #endif diff --git a/include/ec_commands.h b/include/ec_commands.h index b089cd08d4..41153dae1d 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -1502,6 +1502,10 @@ enum ec_feature_code { * mux. */ EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, + /* + * The EC supports entering and residing in S4. + */ + EC_FEATURE_S4_RESIDENCY = 44, }; #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) diff --git a/include/led_common.h b/include/led_common.h index a66455b008..1e4629a606 100644 --- a/include/led_common.h +++ b/include/led_common.h @@ -75,6 +75,12 @@ enum ec_led_state { }; /** + * Check the LED state while receive the auto control + * command. + */ +void board_led_auto_control(void); + +/** * Control state of LED. * * @param led_id ID of LED to control diff --git a/include/power.h b/include/power.h index 769a60fd53..e12f97cdb2 100644 --- a/include/power.h +++ b/include/power.h @@ -20,6 +20,7 @@ FORWARD_DECLARE_ENUM(power_state) { * which means totally unpowered...) */ POWER_S5, /* System is soft-off */ + POWER_S4, /* System is suspended to disk */ POWER_S3, /* Suspend; RAM on, processor is asleep */ POWER_S0, /* System is on */ #ifdef CONFIG_POWER_S0IX @@ -27,11 +28,15 @@ FORWARD_DECLARE_ENUM(power_state) { #endif /* Transitions */ POWER_G3S5, /* G3 -> S5 (at system init time) */ - POWER_S5S3, /* S5 -> S3 */ + POWER_S5S3, /* S5 -> S3 (skips S4 on non-Intel systems) */ POWER_S3S0, /* S3 -> S0 */ POWER_S0S3, /* S0 -> S3 */ - POWER_S3S5, /* S3 -> S5 */ + POWER_S3S5, /* S3 -> S5 (skips S4 on non-Intel systems) */ POWER_S5G3, /* S5 -> G3 */ + POWER_S3S4, /* S3 -> S4 */ + POWER_S4S3, /* S4 -> S3 */ + POWER_S4S5, /* S4 -> S5 */ + POWER_S5S4, /* S5 -> S4 */ #ifdef CONFIG_POWER_S0IX POWER_S0ixS0, /* S0ix -> S0 */ POWER_S0S0ix, /* S0 -> S0ix */ diff --git a/include/power/intel_x86.h b/include/power/intel_x86.h index 303db20de7..bc4e7ec8fb 100644 --- a/include/power/intel_x86.h +++ b/include/power/intel_x86.h @@ -41,6 +41,17 @@ #else #define SLP_S4_SIGNAL_L GPIO_PCH_SLP_S4_L #endif +/* + * The SLP_S5 signal has not traditionally been connected to the EC. If virtual + * wire support is enabled, then SLP_S5 will be available that way. Otherwise, + * use SLP_S4's GPIO as a proxy for SLP_S5. This matches old behavior and + * effectively prevents S4 residency. + */ +#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_S5 +#define SLP_S5_SIGNAL_L VW_SLP_S5_L +#else +#define SLP_S5_SIGNAL_L SLP_S4_SIGNAL_L +#endif /** * Handle RSMRST signal. diff --git a/include/system.h b/include/system.h index 57592217ad..0fc0206bb3 100644 --- a/include/system.h +++ b/include/system.h @@ -570,7 +570,7 @@ enum { * Current sleep mask. You may read from this variable, but must NOT * modify it; use enable_sleep() or disable_sleep() to do that. */ -extern uint32_t sleep_mask; +extern atomic_t sleep_mask; /* * Macros to use to get whether deep sleep is allowed or whether @@ -613,7 +613,7 @@ static inline void disable_sleep(uint32_t mask) * Do NOT access it directly. Use idle_is_disabled() to read it and * enable_idle()/disable_idle() to write it. */ -extern uint32_t idle_disabled; +extern atomic_t idle_disabled; static inline uint32_t idle_is_disabled(void) { diff --git a/include/task.h b/include/task.h index fdfae9d5c6..9d3dd661e8 100644 --- a/include/task.h +++ b/include/task.h @@ -8,6 +8,7 @@ #ifndef __CROS_EC_TASK_H #define __CROS_EC_TASK_H +#include "atomic_t.h" #include "common.h" #include "compile_time_macros.h" #include <stdbool.h> @@ -187,7 +188,7 @@ static inline bool in_deferred_context(void) /** * Return a pointer to the bitmap of events of the task. */ -uint32_t *task_get_event_bitmap(task_id_t tskid); +atomic_t *task_get_event_bitmap(task_id_t tskid); /** * Wait for the next event. diff --git a/include/usb_pd.h b/include/usb_pd.h index ba6f3d99ff..0bbe1aad9a 100644 --- a/include/usb_pd.h +++ b/include/usb_pd.h @@ -243,6 +243,10 @@ enum pd_rx_errors { #define PD_T_DISCOVER_IDENTITY (45*MSEC) /* between 40ms and 50ms */ #define PD_T_SYSJUMP (1000*MSEC) /* 1s */ #define PD_T_PR_SWAP_WAIT (100*MSEC) /* tPRSwapWait 100ms */ +#define PD_T_DATA_RESET (225*MSEC) /* between 200ms and 250ms */ +#define PD_T_DATA_RESET_FAIL (300*MSEC) /* 300ms */ +#define PD_T_VCONN_REAPPLIED (15*MSEC) /* between 10ms and 20ms */ +#define PD_T_VCONN_DISCHARGE (240*MSEC) /* between 160ms and 240ms */ /* * Non-spec timer to prevent going Unattached if Vbus drops before a partner FRS @@ -1008,6 +1012,7 @@ enum pd_dpm_request { DPM_REQUEST_SOP_PRIME_SOFT_RESET_SEND = BIT(20), DPM_REQUEST_FRS_DET_ENABLE = BIT(21), DPM_REQUEST_FRS_DET_DISABLE = BIT(22), + DPM_REQUEST_DATA_RESET = BIT(23), }; /** @@ -1134,9 +1139,9 @@ enum pd_ctrl_msg_type { PD_CTRL_VCONN_SWAP = 11, PD_CTRL_WAIT = 12, PD_CTRL_SOFT_RESET = 13, - /* 14-15 Reserved */ - /* Used for REV 3.0 */ + PD_CTRL_DATA_RESET = 14, + PD_CTRL_DATA_RESET_COMPLETE = 15, PD_CTRL_NOT_SUPPORTED = 16, PD_CTRL_GET_SOURCE_CAP_EXT = 17, PD_CTRL_GET_STATUS = 18, diff --git a/include/usb_pd_dpm.h b/include/usb_pd_dpm.h index 18b73fca84..c7ae53340d 100644 --- a/include/usb_pd_dpm.h +++ b/include/usb_pd_dpm.h @@ -22,12 +22,26 @@ void dpm_init(int port); /* + * Informs the DPM that a mode exit is complete. + * + * @param port USB-C port number + */ +void dpm_mode_exit_complete(int port); + +/* * Informs the DPM that Exit Mode request is received * * @param port USB-C port number */ void dpm_set_mode_exit_request(int port); +/* Informs the DPM that the PE has performed a Data Reset (or at least + * determined that the port partner doesn't support one). + * + * @param port USB-C port number + */ +void dpm_data_reset_complete(int port); + /* * Informs the DPM that a VDM ACK was received. * diff --git a/include/usb_pd_timer.h b/include/usb_pd_timer.h index 5746e76430..8e5984779d 100644 --- a/include/usb_pd_timer.h +++ b/include/usb_pd_timer.h @@ -36,6 +36,15 @@ enum pd_task_timer { PE_TIMER_CHUNKING_NOT_SUPPORTED, /* + * PD 3.0, rev. 3.1, v. 1.2, section 6.6.10.3: The DataResetFailTimer + * Shall be used by the DFP’s Policy Engine to ensure the Data Reset + * process completes within tDataResetFail of the last bit of the + * GoodCRC acknowledging the Accept Message in response to the + * Data_Reset Message. + */ + PE_TIMER_DATA_RESET_FAIL, + + /* * This timer is used during an Explicit Contract when discovering * whether a Port Partner is PD Capable using SOP'. */ @@ -122,11 +131,25 @@ enum pd_task_timer { PE_TIMER_TIMEOUT, /* + * The amount of timer that the DFP shall wait for the UFP to discharge + * VCONN (and send PS_RDY) during Data Reset. See PD 3.0, rev. 3.1, v. + * 1.2, section 6.6.10.1 VCONNDischargeTimer. + */ + PE_TIMER_VCONN_DISCHARGE, + + /* * This timer is used during a VCONN Swap. */ PE_TIMER_VCONN_ON, /* + * The amount of time that VCONN shall remain off during the cable reset + * portion of a Data Reset. See PD 3.0, rev. 3.1, v. 1.2, section 7.1.15 + * VCONN Power Cycle. + */ + PE_TIMER_VCONN_REAPPLIED, + + /* * This timer is used by the Initiator’s Policy Engine to ensure that * a Structured VDM Command request needing a response (e.g. Discover * Identity Command request) is responded to within a bounded time of diff --git a/power/common.c b/power/common.c index f3dbdb55f1..0285ca75a7 100644 --- a/power/common.c +++ b/power/common.c @@ -46,6 +46,7 @@ static const int s5_inactivity_timeout = 10; static const char * const state_names[] = { "G3", "S5", + "S4", "S3", "S0", #ifdef CONFIG_POWER_S0IX @@ -57,6 +58,10 @@ static const char * const state_names[] = { "S0->S3", "S3->S5", "S5->G3", + "S3->S4", + "S4->S3", + "S4->S5", + "S5->S4", #ifdef CONFIG_POWER_S0IX "S0ix->S0", "S0->S0ix", @@ -151,7 +156,7 @@ int power_signal_is_asserted(const struct power_signal_info *s) #ifdef CONFIG_BRINGUP static const char *power_signal_get_name(enum gpio_signal signal) { - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) { + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) { /* Check signal is from GPIOs or VWs */ if (espi_signal_is_vw(signal)) return espi_vw_get_wire_name( @@ -246,11 +251,11 @@ void power_set_state(enum power_state new_state) /* * Reset want_g3_exit flag here to prevent the situation that if the - * error handler in POWER_S5S3 decides to force shutdown the system and + * error handler in POWER_S5S4 decides to force shutdown the system and * the flag is set, the system will go to G3 and then immediately exit * G3 again. */ - if (state == POWER_S5S3) + if ((state == POWER_S5S4) || (state == POWER_S5S3)) want_g3_exit = 0; } @@ -525,24 +530,20 @@ static enum power_state power_common_state(enum power_state state) } break; + case POWER_S4: + /* fallthrough */ case POWER_S3: - /* Wait for a message */ - power_wait_signals(0); - task_wait_event(-1); - break; - + /* fallthrough */ case POWER_S0: - /* Wait for a message */ - power_wait_signals(0); - task_wait_event(-1); - break; #ifdef CONFIG_POWER_S0IX + /* fallthrough */ case POWER_S0ix: +#endif /* Wait for a message */ power_wait_signals(0); task_wait_event(-1); break; -#endif + default: /* No common functionality for transition states */ break; @@ -576,10 +577,15 @@ int chipset_in_state(int state_mask) need_mask = CHIPSET_STATE_HARD_OFF | CHIPSET_STATE_SOFT_OFF; break; case POWER_S5: + case POWER_S5S4: + case POWER_S4S5: + case POWER_S4: need_mask = CHIPSET_STATE_SOFT_OFF; break; case POWER_S5S3: case POWER_S3S5: + case POWER_S4S3: + case POWER_S3S4: need_mask = CHIPSET_STATE_SOFT_OFF | CHIPSET_STATE_SUSPEND; break; case POWER_S3: @@ -614,11 +620,16 @@ int chipset_in_or_transitioning_to_state(int state_mask) case POWER_S5G3: return state_mask & CHIPSET_STATE_HARD_OFF; case POWER_S5: - case POWER_G3S5: + case POWER_S4: case POWER_S3S5: + case POWER_G3S5: + case POWER_S4S5: + case POWER_S5S4: + case POWER_S3S4: return state_mask & CHIPSET_STATE_SOFT_OFF; - case POWER_S3: case POWER_S5S3: + case POWER_S3: + case POWER_S4S3: case POWER_S0S3: return state_mask & CHIPSET_STATE_SUSPEND; #ifdef CONFIG_POWER_S0IX diff --git a/power/falconlite.c b/power/falconlite.c index d2f8e5952a..b418edfd84 100644 --- a/power/falconlite.c +++ b/power/falconlite.c @@ -462,6 +462,11 @@ enum power_state power_handle_state(enum power_state state) case POWER_S5G3: power_seq_run(s5g3_power_seq, ARRAY_SIZE(s5g3_power_seq)); return POWER_G3; + + default: + CPRINTS("Unexpected power state %d", state); + ASSERT(0); + break; } return state; diff --git a/power/intel_x86.c b/power/intel_x86.c index 8c8ee908eb..e020874de6 100644 --- a/power/intel_x86.c +++ b/power/intel_x86.c @@ -29,6 +29,7 @@ enum sys_sleep_state { SYS_SLEEP_S3, SYS_SLEEP_S4, + SYS_SLEEP_S5, #ifdef CONFIG_POWER_S0IX SYS_SLEEP_S0IX, #endif @@ -37,6 +38,7 @@ enum sys_sleep_state { static const int sleep_sig[] = { [SYS_SLEEP_S3] = SLP_S3_SIGNAL_L, [SYS_SLEEP_S4] = SLP_S4_SIGNAL_L, + [SYS_SLEEP_S5] = SLP_S5_SIGNAL_L, #ifdef CONFIG_POWER_S0IX [SYS_SLEEP_S0IX] = GPIO_PCH_SLP_S0_L, #endif @@ -121,7 +123,7 @@ static enum power_state power_wait_s5_rtc_reset(void) } s5_exit_tries = 0; - return POWER_S5S3; /* Power up to next state */ + return POWER_S5S4; /* Power up to next state */ } #endif @@ -279,22 +281,34 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) return power_wait_s5_rtc_reset(); #endif - if (chipset_get_sleep_signal(SYS_SLEEP_S4) == 1) - return POWER_S5S3; /* Power up to next state */ + if (chipset_get_sleep_signal(SYS_SLEEP_S5) == 1) + return POWER_S5S4; /* Power up to next state */ + break; + + case POWER_S4: + if (chipset_get_sleep_signal(SYS_SLEEP_S5) == 0) { + /* Power down to next state */ + return POWER_S4S5; + } else if (chipset_get_sleep_signal(SYS_SLEEP_S4) == 1) { + /* Power up to the next level */ + return POWER_S4S3; + } + break; case POWER_S3: if (!power_has_signals(IN_PGOOD_ALL_CORE)) { - /* Required rail went away */ + /* Required rail went away, go straight to S5 */ chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL); return POWER_S3S5; } else if (chipset_get_sleep_signal(SYS_SLEEP_S3) == 1) { /* Power up to next state */ return POWER_S3S0; } else if (chipset_get_sleep_signal(SYS_SLEEP_S4) == 0) { - /* Power down to next state */ - return POWER_S3S5; + /* Power down to the next state */ + return POWER_S3S4; } + break; case POWER_S0: @@ -359,7 +373,15 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) power_s5_up = 1; return POWER_S5; + case POWER_S5S4: + return POWER_S4; /* Power up to next state */ + + case POWER_S3S4: + return POWER_S4; /* Power down to the next state */ + case POWER_S5S3: + /* fallthrough */ + case POWER_S4S3: if (!power_has_signals(IN_PGOOD_ALL_CORE)) { /* Required rail went away */ chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL); @@ -380,7 +402,7 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) case POWER_S3S0: if (!power_has_signals(IN_PGOOD_ALL_CORE)) { - /* Required rail went away */ + /* Required rail went away, go straight back to S5 */ chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL); return POWER_S3S5; } @@ -390,6 +412,10 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) lpc_s3_resume_clear_masks(); +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + /* Call hooks prior to chipset resume */ + hook_notify(HOOK_CHIPSET_RESUME_INIT); +#endif /* Call hooks now that rails are up */ hook_notify(HOOK_CHIPSET_RESUME); @@ -412,8 +438,13 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) return POWER_S0; case POWER_S0S3: + /* Call hooks before we remove power rails */ hook_notify(HOOK_CHIPSET_SUSPEND); +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + /* Call hooks after chipset suspend */ + hook_notify(HOOK_CHIPSET_SUSPEND_COMPLETE); +#endif /* Suspend wireless */ wireless_set_state(WIRELESS_SUSPEND); @@ -445,6 +476,11 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) * to go into deep sleep in S0ix. */ enable_sleep(SLEEP_MASK_AP_RUN); + +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + hook_notify(HOOK_CHIPSET_SUSPEND_COMPLETE); +#endif + return POWER_S0ix; case POWER_S0ixS0: @@ -454,11 +490,17 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) */ disable_sleep(SLEEP_MASK_AP_RUN); +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + hook_notify(HOOK_CHIPSET_RESUME_INIT); +#endif + sleep_resume_transition(); return POWER_S0; #endif case POWER_S3S5: + /* fallthrough */ + case POWER_S4S5: /* Call hooks before we remove power rails */ hook_notify(HOOK_CHIPSET_SHUTDOWN); diff --git a/power/mt817x.c b/power/mt817x.c index 8f11af2364..30d3ffed1e 100644 --- a/power/mt817x.c +++ b/power/mt817x.c @@ -748,6 +748,12 @@ enum power_state power_handle_state(enum power_state state) case POWER_S5G3: return POWER_G3; + + default: + /* Elm does not have space for such an extravagant print. */ + /* CPRINTS("Unexpected power state %d", state); */ + ASSERT(0); + break; } return state; diff --git a/power/mt8183.c b/power/mt8183.c index ddf49799e9..7c747541a6 100644 --- a/power/mt8183.c +++ b/power/mt8183.c @@ -570,6 +570,11 @@ enum power_state power_handle_state(enum power_state state) } return POWER_G3; + + default: + CPRINTS("Unexpected power state %d", state); + ASSERT(0); + break; } return state; diff --git a/power/mt8192.c b/power/mt8192.c index 5a4bafe600..3cb6e164d8 100644 --- a/power/mt8192.c +++ b/power/mt8192.c @@ -32,6 +32,7 @@ #include "system.h" #include "task.h" #include "timer.h" +#include "util.h" #ifdef CONFIG_BRINGUP #define GPIO_SET_LEVEL(signal, value) \ @@ -208,8 +209,7 @@ enum power_state power_chipset_init(void) gpio_enable_interrupt(GPIO_AP_EC_WARM_RST_REQ); gpio_enable_interrupt(GPIO_AP_IN_SLEEP_L); - if (system_get_reset_flags() & EC_RESET_FLAG_SYSJUMP && - !IS_ENABLED(CONFIG_VBOOT_EFS2)) { + if (system_jumped_late()) { if ((power_get_signals() & IN_ALL_S0) == IN_ALL_S0) { disable_sleep(SLEEP_MASK_AP_RUN); power_signal_enable_interrupt(GPIO_AP_EC_WATCHDOG_L); @@ -476,6 +476,11 @@ enum power_state power_handle_state(enum power_state state) return POWER_S5; return POWER_G3; + + default: + CPRINTS("Unexpected power state %d", state); + ASSERT(0); + break; } return state; diff --git a/power/qcom.c b/power/qcom.c index a119ce23d6..2310dfedfa 100644 --- a/power/qcom.c +++ b/power/qcom.c @@ -1119,6 +1119,11 @@ enum power_state power_handle_state(enum power_state state) case POWER_S5G3: return POWER_G3; + + default: + CPRINTS("Unexpected power state %d", state); + ASSERT(0); + break; } return state; diff --git a/power/rk3288.c b/power/rk3288.c index 39f19ddeff..851a8b4e9d 100644 --- a/power/rk3288.c +++ b/power/rk3288.c @@ -506,6 +506,11 @@ enum power_state power_handle_state(enum power_state state) case POWER_S5G3: return POWER_G3; + + default: + CPRINTS("Unexpected power state %d", state); + ASSERT(0); + break; } return state; diff --git a/power/rk3399.c b/power/rk3399.c index c1693057b9..e0ea7ee483 100644 --- a/power/rk3399.c +++ b/power/rk3399.c @@ -529,6 +529,11 @@ enum power_state power_handle_state(enum power_state state) case POWER_S5G3: return POWER_G3; + + default: + CPRINTS("Unexpected power state %d", state); + ASSERT(0); + break; } return state; diff --git a/power/sdm845.c b/power/sdm845.c index 7157f98cc3..7463e00069 100644 --- a/power/sdm845.c +++ b/power/sdm845.c @@ -823,6 +823,11 @@ enum power_state power_handle_state(enum power_state state) case POWER_S5G3: return POWER_G3; + + default: + CPRINTS("Unexpected power state %d", state); + ASSERT(0); + break; } return state; diff --git a/test/fake_usbc.c b/test/fake_usbc.c index dc631997cf..f6207c4c4f 100644 --- a/test/fake_usbc.c +++ b/test/fake_usbc.c @@ -259,6 +259,10 @@ void dpm_init(int port) { } +void dpm_mode_exit_complete(int port) +{ +} + void dpm_vdm_acked(int port, enum tcpci_msg_type type, int vdo_count, uint32_t *vdm) { diff --git a/test/fpsensor.mocklist b/test/fpsensor.mocklist index 7e8240bb8d..3968a04e7e 100644 --- a/test/fpsensor.mocklist +++ b/test/fpsensor.mocklist @@ -14,7 +14,7 @@ #elif defined(TEST_BUILD) /* Mock the sensor detection on dragonclaw v0.2 dev boards since we can't * otherwise change the detected version in hardware without a rework. See - * https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/docs/schematics/dragonclaw + * https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/docs/schematics/dragonclaw */ #define CONFIG_TEST_MOCK_LIST MOCK(FPSENSOR_DETECT) #endif /* BOARD_HOST */ diff --git a/test/i2c_bitbang.c b/test/i2c_bitbang.c index ab1136a922..dd84c0b83a 100644 --- a/test/i2c_bitbang.c +++ b/test/i2c_bitbang.c @@ -11,7 +11,13 @@ #include "util.h" const struct i2c_port_t i2c_bitbang_ports[] = { - {"", 0, 100, GPIO_I2C_SCL, GPIO_I2C_SDA} + { + .name = "", + .port = 0, + .kbps = 100, + .scl = GPIO_I2C_SCL, + .sda = GPIO_I2C_SDA + } }; const unsigned int i2c_bitbang_ports_used = 1; diff --git a/util/config_allowed.txt b/util/config_allowed.txt index ba0d54fd5a..26a22ceb06 100644 --- a/util/config_allowed.txt +++ b/util/config_allowed.txt @@ -488,22 +488,20 @@ CONFIG_HOSTCMD_ALIGNED CONFIG_HOSTCMD_AP_SET_SKUID CONFIG_HOSTCMD_BATTERY_V2 CONFIG_HOSTCMD_BUTTON -CONFIG_HOSTCMD_ESPI CONFIG_HOSTCMD_ESPI_EC_CHAN_BITMAP CONFIG_HOSTCMD_ESPI_EC_MAX_FREQ CONFIG_HOSTCMD_ESPI_EC_MODE CONFIG_HOSTCMD_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST CONFIG_HOSTCMD_ESPI_VW_SLP_S3 CONFIG_HOSTCMD_ESPI_VW_SLP_S4 +CONFIG_HOSTCMD_ESPI_VW_SLP_S5 CONFIG_HOSTCMD_EVENTS CONFIG_HOSTCMD_FLASHPD CONFIG_HOSTCMD_FLASH_SPI_INFO -CONFIG_HOSTCMD_HECI CONFIG_HOSTCMD_I2C_ADDR_FLAGS CONFIG_HOSTCMD_I2C_SLAVE_ADDR CONFIG_HOSTCMD_I2C_CONTROL CONFIG_HOSTCMD_LOCATE_CHIP -CONFIG_HOSTCMD_LPC CONFIG_HOSTCMD_PD CONFIG_HOSTCMD_PD_CHG_CTRL CONFIG_HOSTCMD_PD_PANIC @@ -512,7 +510,6 @@ CONFIG_HOSTCMD_RATE_LIMITING_PERIOD CONFIG_HOSTCMD_RATE_LIMITING_RECESS CONFIG_HOSTCMD_RWHASHPD CONFIG_HOSTCMD_SECTION_SORTED -CONFIG_HOSTCMD_SHI CONFIG_HOSTCMD_SKUID CONFIG_HOSTCMD_X86 CONFIG_HOST_COMMAND_STATUS @@ -520,6 +517,10 @@ CONFIG_HOST_ESPI_VW_POWER_SIGNAL CONFIG_HOST_EVENT64 CONFIG_HOST_EVENT64_REPORT_MASK CONFIG_HOST_EVENT_REPORT_MASK +CONFIG_HOST_INTERFACE_ESPI +CONFIG_HOST_INTERFACE_HECI +CONFIG_HOST_INTERFACE_LPC +CONFIG_HOST_INTERFACE_SHI CONFIG_HWTIMER_64BIT CONFIG_HW_CRC CONFIG_HW_SPECIFIC_UDELAY @@ -655,7 +656,6 @@ CONFIG_MAG_LSM6DSM_BMM150 CONFIG_MAG_LSM6DSM_LIS2MDL CONFIG_MALLOC CONFIG_MAPPED_STORAGE_BASE -CONFIG_MATH_UTIL CONFIG_MAX695X_SEVEN_SEGMENT_DISPLAY CONFIG_MCDP28X0 CONFIG_MCHP_48MHZ_OUT @@ -894,6 +894,7 @@ CONFIG_TEMP_SENSOR_G753 CONFIG_TEMP_SENSOR_G781 CONFIG_TEMP_SENSOR_G782 CONFIG_TEMP_SENSOR_OTI502 +CONFIG_TEMP_SENSOR_PCT2075 CONFIG_TEMP_SENSOR_POWER_GPIO CONFIG_TEMP_SENSOR_SB_TSI CONFIG_TEMP_SENSOR_TMP006 @@ -1052,9 +1053,6 @@ CONFIG_USB_PD_TCPMV2 CONFIG_USB_PD_TCPM_ANX3429 CONFIG_USB_PD_TCPM_ANX740X CONFIG_USB_PD_TCPM_ANX741X -CONFIG_USB_PD_TCPM_ANX7447 -CONFIG_USB_PD_TCPM_ANX7447_AUX_PU_PD -CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE_COMMAND CONFIG_USB_PD_TCPM_ANX74XX CONFIG_USB_PD_TCPM_ANX7688 CONFIG_USB_PD_TCPM_CCGXXF diff --git a/util/config_option_check.py b/util/config_option_check.py index 29e8fb8611..8bd8ecb1f0 100755 --- a/util/config_option_check.py +++ b/util/config_option_check.py @@ -66,11 +66,11 @@ ALLOWLIST_CONFIGS = ['CONFIG_ZTEST'] def obtain_current_config_options(): """Obtains current config options from include/config.h. - Scans through the master config file defined in CONFIG_FILE for all CONFIG_* + Scans through the main config file defined in CONFIG_FILE for all CONFIG_* options. Returns: - config_options: A list of all the config options in the master CONFIG_FILE. + config_options: A list of all the config options in the main CONFIG_FILE. """ config_options = [] @@ -148,11 +148,11 @@ def print_missing_config_options(hunks, config_options): Args: hunks: A list of Hunk objects which represent the hunks from the git diff output. - config_options: A list of all the config options in the master CONFIG_FILE. + config_options: A list of all the config options in the main CONFIG_FILE. Returns: missing_config_option: A boolean indicating if any CONFIG_* options - are missing from the master CONFIG_FILE in this commit or if any CONFIG_* + are missing from the main CONFIG_FILE in this commit or if any CONFIG_* options removed are no longer being used in the repo. """ missing_config_option = False diff --git a/util/ec3po/console.py b/util/ec3po/console.py index 9f28c8b7bf..e71216e3f2 100755 --- a/util/ec3po/console.py +++ b/util/ec3po/console.py @@ -98,8 +98,8 @@ class Console(object): Attributes: logger: A logger for this module. - master_pty: File descriptor to the master side of the PTY. Used for driving - output to the user and receiving user input. + controller_pty: File descriptor to the controller side of the PTY. Used for + driving output to the user and receiving user input. user_pty: A string representing the PTY name of the served console. cmd_pipe: A socket.socket or multiprocessing.Connection object which represents the console side of the command pipe. This must be a @@ -139,13 +139,13 @@ class Console(object): output_line_log_buffer: buffer for lines coming from the EC to log to debug """ - def __init__(self, master_pty, user_pty, interface_pty, cmd_pipe, dbg_pipe, + def __init__(self, controller_pty, user_pty, interface_pty, cmd_pipe, dbg_pipe, name=None): """Initalises a Console object with the provided arguments. Args: - master_pty: File descriptor to the master side of the PTY. Used for driving - output to the user and receiving user input. + controller_pty: File descriptor to the controller side of the PTY. Used for + driving output to the user and receiving user input. user_pty: A string representing the PTY name of the served console. interface_pty: A string representing the PTY name of the served command interface. @@ -162,7 +162,7 @@ class Console(object): console_prefix = ('%s - ' % name) if name else '' logger = logging.getLogger('%sEC3PO.Console' % console_prefix) self.logger = interpreter.LoggerAdapter(logger, {'pty': user_pty}) - self.master_pty = master_pty + self.controller_pty = controller_pty self.user_pty = user_pty self.interface_pty = interface_pty self.cmd_pipe = cmd_pipe @@ -189,7 +189,7 @@ class Console(object): def __str__(self): """Show internal state of Console object as a string.""" string = [] - string.append('master_pty: %s' % self.master_pty) + string.append('controller_pty: %s' % self.controller_pty) string.append('user_pty: %s' % self.user_pty) string.append('interface_pty: %s' % self.interface_pty) string.append('cmd_pipe: %s' % self.cmd_pipe) @@ -208,7 +208,7 @@ class Console(object): return '\n'.join(string) def LogConsoleOutput(self, data): - """Log to debug user MCU output to master_pty when line is filled. + """Log to debug user MCU output to controller_pty when line is filled. The logging also suppresses the Cr50 spinner lines by removing characters when it sees backspaces. @@ -261,7 +261,7 @@ class Console(object): def PrintHistory(self): """Print the history of entered commands.""" - fd = self.master_pty + fd = self.controller_pty # Make it pretty by figuring out how wide to pad the numbers. wide = (len(self.history) // 10) + 1 for i in range(len(self.history)): @@ -298,7 +298,7 @@ class Console(object): # Print the last entry in the history buffer. self.logger.debug('printing previous entry %d - %s', self.history_pos, self.history[self.history_pos]) - fd = self.master_pty + fd = self.controller_pty prev_cmd = self.history[self.history_pos] os.write(fd, prev_cmd) # Update the input buffer. @@ -312,7 +312,7 @@ class Console(object): self.logger.debug('History buffer is empty.') return - fd = self.master_pty + fd = self.controller_pty self.logger.debug('current history position: %d', self.history_pos) # Increment the history position. @@ -357,7 +357,7 @@ class Console(object): def SliceOutChar(self): """Remove a char from the line and shift everything over 1 column.""" - fd = self.master_pty + fd = self.controller_pty # Remove the character at the input_buffer_pos by slicing it out. self.input_buffer = self.input_buffer[0:self.input_buffer_pos] + \ self.input_buffer[self.input_buffer_pos+1:] @@ -551,14 +551,14 @@ class Console(object): EOFError: Allowed to propagate through from self.CheckForEnhancedECImage() i.e. from self.dbg_pipe.recv(). """ - fd = self.master_pty + fd = self.controller_pty # Enter the OOBM prompt mode if the user presses '%'. if byte == ord('%'): self.logger.debug('Begin OOBM command.') self.receiving_oobm_cmd = True # Print a "prompt". - os.write(self.master_pty, b'\r\n% ') + os.write(self.controller_pty, b'\r\n% ') return # Add chars to the pending OOBM command if we're currently receiving one. @@ -566,7 +566,7 @@ class Console(object): tmp_bytes = six.int2byte(byte) self.pending_oobm_cmd += tmp_bytes self.logger.debug('%s', tmp_bytes) - os.write(self.master_pty, tmp_bytes) + os.write(self.controller_pty, tmp_bytes) return if byte == ControlKey.CARRIAGE_RETURN: @@ -579,7 +579,7 @@ class Console(object): self.pending_oobm_cmd) # Reset the state. - os.write(self.master_pty, b'\r\n' + self.prompt) + os.write(self.controller_pty, b'\r\n' + self.prompt) self.input_buffer = b'' self.input_buffer_pos = 0 self.receiving_oobm_cmd = False @@ -742,7 +742,7 @@ class Console(object): # If there's nothing to move, we're done. if not count: return - fd = self.master_pty + fd = self.controller_pty seq = b'\033[' + str(count).encode('ascii') if direction == 'left': # Bind the movement. @@ -790,7 +790,7 @@ class Console(object): def SendBackspace(self): """Backspace a character on the console.""" - os.write(self.master_pty, b'\033[1D \033[1D') + os.write(self.controller_pty, b'\033[1D \033[1D') def ProcessOOBMQueue(self): """Retrieve an item from the OOBM queue and process it.""" @@ -854,10 +854,10 @@ class Console(object): def PrintOOBMHelp(self): """Prints out the OOBM help.""" # Print help syntax. - os.write(self.master_pty, b'\r\n' + b'Known OOBM commands:\r\n') - os.write(self.master_pty, b' interrogate <never | always | auto> ' + os.write(self.controller_pty, b'\r\n' + b'Known OOBM commands:\r\n') + os.write(self.controller_pty, b' interrogate <never | always | auto> ' b'[enhanced]\r\n') - os.write(self.master_pty, b' loglevel <int>\r\n') + os.write(self.controller_pty, b' loglevel <int>\r\n') def CheckBufferForEnhancedImage(self, data): """Adds data to a look buffer and checks to see for enhanced EC image. @@ -933,14 +933,14 @@ def StartLoop(console, command_active, shutdown_pipe=None): """ try: console.logger.debug('Console is being served on %s.', console.user_pty) - console.logger.debug('Console master is on %s.', console.master_pty) + console.logger.debug('Console controller is on %s.', console.controller_pty) console.logger.debug('Command interface is being served on %s.', console.interface_pty) console.logger.debug(console) # This checks for HUP to indicate if the user has connected to the pty. ep = select.epoll() - ep.register(console.master_pty, select.EPOLLHUP) + ep.register(console.controller_pty, select.EPOLLHUP) # This is used instead of "break" to avoid exiting the loop in the middle of # an iteration. @@ -952,13 +952,13 @@ def StartLoop(console, command_active, shutdown_pipe=None): while continue_looping: # Check to see if pts is connected to anything events = ep.poll(0) - master_connected = not events + controller_connected = not events # Check to see if pipes or the console are ready for reading. read_list = [console.interface_pty, console.cmd_pipe, console.dbg_pipe] - if master_connected: - read_list.append(console.master_pty) + if controller_connected: + read_list.append(console.controller_pty) if shutdown_pipe is not None: read_list.append(shutdown_pipe) @@ -970,12 +970,12 @@ def StartLoop(console, command_active, shutdown_pipe=None): ready_for_reading = select_output[0] for obj in ready_for_reading: - if obj is console.master_pty: + if obj is console.controller_pty: if not command_active.value: # Convert to bytes so we can look for non-printable chars such as # Ctrl+A, Ctrl+E, etc. try: - line = bytearray(os.read(console.master_pty, CONSOLE_MAX_READ)) + line = bytearray(os.read(console.controller_pty, CONSOLE_MAX_READ)) console.logger.debug('Input from user: %s, locked:%s', str(line).strip(), command_active.value) for i in line: @@ -985,7 +985,7 @@ def StartLoop(console, command_active, shutdown_pipe=None): except EOFError: console.logger.debug( 'ec3po console received EOF from dbg_pipe in HandleChar()' - ' while reading console.master_pty') + ' while reading console.controller_pty') continue_looping = False break except OSError: @@ -1019,11 +1019,11 @@ def StartLoop(console, command_active, shutdown_pipe=None): # Write it to the user console. if console.raw_debug: console.logger.debug('|CMD|-%s->%r', - ('u' if master_connected else '') + + ('u' if controller_connected else '') + ('i' if command_active.value else ''), data.strip()) - if master_connected: - os.write(console.master_pty, data) + if controller_connected: + os.write(console.controller_pty, data) if command_active.value: os.write(console.interface_pty, data) @@ -1040,18 +1040,18 @@ def StartLoop(console, command_active, shutdown_pipe=None): # Write it to the user console. if len(data) > 1 and console.raw_debug: console.logger.debug('|DBG|-%s->%r', - ('u' if master_connected else '') + + ('u' if controller_connected else '') + ('i' if command_active.value else ''), data.strip()) console.LogConsoleOutput(data) - if master_connected: + if controller_connected: end = len(data) - 1 if console.timestamp_enabled: # A timestamp is required at the beginning of this line if tm_req is True: now = datetime.now() tm = CanonicalizeTimeString(now.strftime(HOST_STRFTIME)) - os.write(console.master_pty, tm) + os.write(console.controller_pty, tm) tm_req = False # Insert timestamps into the middle where appropriate @@ -1066,7 +1066,7 @@ def StartLoop(console, command_active, shutdown_pipe=None): # timestamp required on next input if data[end] == b'\n'[0]: tm_req = True - os.write(console.master_pty, data_tm) + os.write(console.controller_pty, data_tm) if command_active.value: os.write(console.interface_pty, data) @@ -1083,10 +1083,10 @@ def StartLoop(console, command_active, shutdown_pipe=None): pass finally: - ep.unregister(console.master_pty) + ep.unregister(console.controller_pty) console.dbg_pipe.close() console.cmd_pipe.close() - os.close(console.master_pty) + os.close(console.controller_pty) os.close(console.interface_pty) if shutdown_pipe is not None: shutdown_pipe.close() @@ -1155,12 +1155,12 @@ def main(argv): itpr_process.start() # Open a new pseudo-terminal pair - (master_pty, user_pty) = pty.openpty() + (controller_pty, user_pty) = pty.openpty() # Set the permissions to 660. os.chmod(os.ttyname(user_pty), (stat.S_IRGRP | stat.S_IWGRP | stat.S_IRUSR | stat.S_IWUSR)) # Create a console. - console = Console(master_pty, os.ttyname(user_pty), cmd_pipe_interactive, + console = Console(controller_pty, os.ttyname(user_pty), cmd_pipe_interactive, dbg_pipe_interactive) # Start serving the console. v = threadproc_shim.Value(ctypes.c_bool, False) diff --git a/util/ec3po/console_unittest.py b/util/ec3po/console_unittest.py index 3a44e0efce..7e341e7e8d 100755 --- a/util/ec3po/console_unittest.py +++ b/util/ec3po/console_unittest.py @@ -162,8 +162,8 @@ class TestConsoleEditingMethods(unittest.TestCase): format=('%(asctime)s - %(module)s -' ' %(levelname)s - %(message)s')) - # Create a temp file and set both the master and slave PTYs to the file to - # create a loopback. + # Create a temp file and set both the controller and peripheral PTYs to the + # file to create a loopback. self.tempfile = tempfile.TemporaryFile() # Create some mock pipes. These won't be used since we'll mock out sends @@ -1067,8 +1067,8 @@ class TestConsoleCompatibility(unittest.TestCase): logging.basicConfig(level=logging.DEBUG, format=('%(asctime)s - %(module)s -' ' %(levelname)s - %(message)s')) - # Create a temp file and set both the master and slave PTYs to the file to - # create a loopback. + # Create a temp file and set both the controller and peripheral PTYs to the + # file to create a loopback. self.tempfile = tempfile.TemporaryFile() # Mock out the pipes. @@ -1350,8 +1350,8 @@ class TestOOBMConsoleCommands(unittest.TestCase): logging.basicConfig(level=logging.DEBUG, format=('%(asctime)s - %(module)s -' ' %(levelname)s - %(message)s')) - # Create a temp file and set both the master and slave PTYs to the file to - # create a loopback. + # Create a temp file and set both the controller and peripheral PTYs to the + # file to create a loopback. self.tempfile = tempfile.TemporaryFile() # Mock out the pipes. diff --git a/util/ectool.c b/util/ectool.c index 0bc35ef3b4..4da67aae52 100644 --- a/util/ectool.c +++ b/util/ectool.c @@ -896,6 +896,7 @@ static const char * const ec_feature_names[] = { "Host-controlled Type-C mode entry", [EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK] = "AP ack for Type-C mux configuration", + [EC_FEATURE_S4_RESIDENCY] = "S4 residency", }; int cmd_inventory(int argc, char *argv[]) diff --git a/util/flash_fp_mcu b/util/flash_fp_mcu index 57b2525141..16768d756c 100644 --- a/util/flash_fp_mcu +++ b/util/flash_fp_mcu @@ -142,7 +142,7 @@ warn_gpio() { } # Taken verbatim from -# https://chromium.googlesource.com/chromiumos/docs/+/master/lsb-release.md#shell +# https://chromium.googlesource.com/chromiumos/docs/+/HEAD/lsb-release.md#shell # This should not be used by anything except get_platform_name. # See https://crbug.com/98462. lsbval() { diff --git a/util/make_linux_ec_commands_h.sh b/util/make_linux_ec_commands_h.sh index 4deeaeef32..3afb7c2f41 100755 --- a/util/make_linux_ec_commands_h.sh +++ b/util/make_linux_ec_commands_h.sh @@ -57,7 +57,7 @@ patch "${tmp}" << EOF + * Copyright (C) 2012 Google, Inc + * + * NOTE: This file is auto-generated from ChromeOS EC Open Source code from -+ * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h ++ * https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/include/ec_commands.h */ /* Host communication command constants for Chrome EC */ diff --git a/util/tagbranch.sh b/util/tagbranch.sh index 3e196b6f25..e925ddf33a 100755 --- a/util/tagbranch.sh +++ b/util/tagbranch.sh @@ -29,7 +29,7 @@ # - the remote git server name shows up in 'git config -l' output in the # line starting with "remote.cros.url=" # - firmware branch names have format of firmware-<board>-XXXXXX -# - the current branch was cut off of <remote name>/master +# - the current branch was cut off of <remote name>/main # # The tag name generated by this script would be the XXXXX string with dots, # if any, replaced by underscores. @@ -44,10 +44,10 @@ fi export ORIGIN_NAME="cros" ORIGIN="$(git config "remote.${ORIGIN_NAME}.url")" -# The last common patch between this branch and the master. -BRANCH_POINT="$(git merge-base "${UPSTREAM}" "${ORIGIN_NAME}/master")" +# The last common patch between this branch and main. +BRANCH_POINT="$(git merge-base "${UPSTREAM}" "${ORIGIN_NAME}/main")" if [[ -z "${BRANCH_POINT}" ]]; then - echo "Failed to determine cros/master branch point" >&2 + echo "Failed to determine cros/main branch point" >&2 exit 1 fi @@ -56,8 +56,8 @@ TAG_BASE="$(sed 's/.*-// # drop everything up to including the last - s/\./_/g # replace dots and dashes with underscores ' <<< "${UPSTREAM}" )" -if [[ "${TAG_BASE}" == "master" ]]; then - echo "Nothing to tag in master branch" >&2 +if [[ "${TAG_BASE}" == "main" ]]; then + echo "Nothing to tag in main branch" >&2 exit 1 fi diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index f76690be19..b8d1744c23 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -121,15 +121,13 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC "${PLATFORM_EC}/common/base32.c" zephyr_library_sources_ifdef(CONFIG_HAS_TASK_POWERBTN "${PLATFORM_EC}/common/power_button_x86.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ACCEL_BMA255 - "${PLATFORM_EC}/driver/accel_bma2x2.c" - "${PLATFORM_EC}/common/math_util.c") + "${PLATFORM_EC}/driver/accel_bma2x2.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ACCEL_KX022 "${PLATFORM_EC}/driver/accel_kionix.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ACCEL_LIS2DW12 "${PLATFORM_EC}/driver/accel_lis2dw12.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ACCELGYRO_BMI - "${PLATFORM_EC}/driver/accelgyro_bmi_common.c" - "${PLATFORM_EC}/common/math_util.c") + "${PLATFORM_EC}/driver/accelgyro_bmi_common.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ACCELGYRO_BMI160 "${PLATFORM_EC}/driver/accelgyro_bmi160.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ACCELGYRO_BMI260 @@ -260,8 +258,7 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_PWM zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_ONOFF_STATES "${PLATFORM_EC}/common/led_onoff_states.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LID_ANGLE - "${PLATFORM_EC}/common/motion_lid.c" - "${PLATFORM_EC}/common/math_util.c") + "${PLATFORM_EC}/common/motion_lid.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE "${PLATFORM_EC}/common/lid_angle.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LID_SWITCH @@ -399,6 +396,8 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PRL_SM "${PLATFORM_EC}/common/usbc/usb_prl_sm.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_ANX7447 + "${PLATFORM_EC}/driver/tcpm/anx7447.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX "${PLATFORM_EC}/driver/tcpm/nct38xx.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8751 @@ -443,3 +442,5 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_VSTORE "${PLATFORM_EC}/common/vstore.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_RTC "${PLATFORM_EC}/common/rtc.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MATH_UTIL + "${PLATFORM_EC}/common/math_util.c") diff --git a/zephyr/Kconfig b/zephyr/Kconfig index d0ef3fc711..e05d2f75ea 100644 --- a/zephyr/Kconfig +++ b/zephyr/Kconfig @@ -176,7 +176,7 @@ choice PLATFORM_EC_CBI_STORAGE_TYPE See here for detailed information on CBI: - https://chromium.googlesource.com/chromiumos/docs/+/master/design_docs/cros_board_info.md + https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md config PLATFORM_EC_CBI_EEPROM bool "CBI EEPROM support" @@ -894,4 +894,10 @@ config PLATFORM_EC_AMD_STT to temporarily boost above the sustainable power limit, while the chassis skin temperatures are below limits. +config PLATFORM_EC_MATH_UTIL + bool "Math utility" + help + Math utilities including bitmask manipulation, division rounding, + trigonometric function, etc. + endif # PLATFORM_EC diff --git a/zephyr/Kconfig.battery b/zephyr/Kconfig.battery index 16664d20cf..f4b6276b89 100644 --- a/zephyr/Kconfig.battery +++ b/zephyr/Kconfig.battery @@ -270,6 +270,25 @@ config PLATFORM_EC_CHARGER_BQ25710_CMP_REF_1P2 voltage to 1.2 V. The power-on default is 2.3 V. This must be enabled if the board was designed for 1.2 V instead of 2.3 V. +config PLATFORM_EC_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM + bool "PKPWR_TOVLD_DEG override" + default n + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + Enable customizing the charger's PKPWR_TOVLD_DEG period. + +config PLATFORM_EC_CHARGER_BQ25710_PKPWR_TOVLD_DEG + int "PKPWR_TOVLD_DEG period" + range 0 3 + default 0 + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + Sets the input overload time when in peak power mode + (PKPWR_TOVLD_DEG). This limits how long the charger can draw + ILIM2 from the adapter. This is a 2 bit field. On the bq25710 + 1 ms to 20 ms can be encoded. On the bq25720 1 ms to 10 ms can + be encoded. + config PLATFORM_EC_CHARGER_BQ25710_EN_ACOC bool "Enable AC over-current protection" default n @@ -324,6 +343,15 @@ config PLATFORM_EC_CHARGER_BQ25710_PP_ACOK Sets the PP_ACOK in Prochot Option 1 register. This causes PROCHOT to be pulsed when the AC adapter is removed. +config PLATFORM_EC_CHARGER_BQ25720_PP_IDCHG2 + bool "Enable PROCHOT on battery current exceeding IDCHG_TH2" + default n + depends on PLATFORM_EC_CHARGER_BQ25720 + help + Sets the PP_IDCHG2 bit in Charge Option 4 register. This + causes PROCHOT to be pulsed when the battery discharge current + exceeds IDCHG_TH2. + config PLATFORM_EC_CHARGER_BQ25710_SENSE_RESISTOR int "Value of the charge sense-resistor, in mOhms" default 10 diff --git a/zephyr/Kconfig.espi b/zephyr/Kconfig.espi index 81b9f11e57..f35e4e8360 100644 --- a/zephyr/Kconfig.espi +++ b/zephyr/Kconfig.espi @@ -16,6 +16,12 @@ config PLATFORM_EC_ESPI_VW_SLP_S4 For power sequencing, use an eSPI virtual wire instead of defining GPIO_PCH_SLP_S4 in gpio_map.h. +config PLATFORM_EC_ESPI_VW_SLP_S5 + bool "SLP_S5 is an eSPI virtual wire instead of an alias for SLP_S4" + help + For power sequencing, use an eSPI virtual wire to read the SLP_S5 line, + as opposed to merging it into the same net as SLP_S4. + config PLATFORM_EC_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST bool "Reset SLP VW signals on eSPI reset" help diff --git a/zephyr/Kconfig.motionsense b/zephyr/Kconfig.motionsense index 69980f33da..01a7eb1698 100644 --- a/zephyr/Kconfig.motionsense +++ b/zephyr/Kconfig.motionsense @@ -98,6 +98,7 @@ config PLATFORM_EC_DYNAMIC_MOTION_SENSOR_COUNT config PLATFORM_EC_LID_ANGLE bool "Lid Angle" + select PLATFORM_EC_MATH_UTIL help Enable this to detect lid angle with two accelerometers. The andgle calculation requires the information about which sensor is on the lid @@ -187,12 +188,4 @@ config PLATFORM_EC_CONSOLE_CMD_ACCEL_SPOOF endif # PLATFORM_EC_ACCEL_SPOOF_MODE -config PLATFORM_EC_MOTION_SENSE_RUNTIME_PROBE_CUSTOM_CALL - bool "Disable deferred call that probes motion sensors on boot-up" - help - Disables deferred call that probes motion sensors on boot-up. - If this option is enabled, board logic code must call - board_detect_motionsensor manually. This is useful if board needs - manual control of sensors probing. - rsource "Kconfig.sensor_devices" diff --git a/zephyr/Kconfig.powerseq b/zephyr/Kconfig.powerseq index 27abd68e7c..d35caf6900 100644 --- a/zephyr/Kconfig.powerseq +++ b/zephyr/Kconfig.powerseq @@ -109,6 +109,16 @@ config PLATFORM_EC_POWERSEQ_S0IX option, Intel's low-power idle sleep state, also known as "modern sleep". +config PLATFORM_EC_POWERSEQ_S4 + bool "Advertise S4 residency" + depends on PLATFORM_EC_ESPI_VW_SLP_S5 + default y if AP_X86_INTEL_TGL + default y if AP_X86_INTEL_ADL + help + Advertise S4 residency capabilities to the AP. This is required for + AP hibernate (suspend-to-disk) on Intel platforms with Key Locker + support (TGL+) + config PLATFORM_EC_POWERSEQ_COMETLAKE bool "Use common Comet Lake code for power sequencing" depends on AP_X86_INTEL_CML diff --git a/zephyr/Kconfig.sensor_devices b/zephyr/Kconfig.sensor_devices index 94204b7b35..3ddf65148c 100644 --- a/zephyr/Kconfig.sensor_devices +++ b/zephyr/Kconfig.sensor_devices @@ -6,6 +6,7 @@ menu "Sensor Devices" config PLATFORM_EC_ACCELGYRO_BMI bool "Config used to include common accelgyro BMI features" + select PLATFORM_EC_MATH_UTIL help Do not set this directly in a .conf file. This value should be set using an `select` statement in other BMI family of drivers such as @@ -20,6 +21,7 @@ config PLATFORM_EC_ACCELGYRO_ICM config PLATFORM_EC_ACCEL_BMA255 bool "BMA2X2 Accelerometer Family Driver" + select PLATFORM_EC_MATH_UTIL help The driver supports Bosch's a triaxial, low-g acceleration sensor. It allows measurements of acceleration in three perpendicular axes. diff --git a/zephyr/Kconfig.stacks b/zephyr/Kconfig.stacks index 2ffe64b341..367564de7e 100644 --- a/zephyr/Kconfig.stacks +++ b/zephyr/Kconfig.stacks @@ -107,3 +107,14 @@ config TASK_USB_CHG_STACK_SIZE endif # SOC_SERIES_NPCX9 ############################################################################## + +############################################################################## +if SOC_SERIES_RISCV32_IT8XXX2 + +# Zephyr internal stack sizes + +config SHELL_STACK_SIZE + default 1560 + +endif # SOC_SERIES_RISCV32_IT8XXX2 +############################################################################## diff --git a/zephyr/Kconfig.usbc b/zephyr/Kconfig.usbc index 343de8b4a7..68769356b3 100644 --- a/zephyr/Kconfig.usbc +++ b/zephyr/Kconfig.usbc @@ -392,9 +392,15 @@ config PLATFORM_EC_USB_PD_VBUS_MEASURE_TCPC config PLATFORM_EC_USB_PD_VBUS_MEASURE_ADC_EACH_PORT bool "VBUS on each port is measured using an ADC channel" help - Enable this is there is a separate ADC channel for each USB-C VBUS + Enable this if there is a separate ADC channel for each USB-C VBUS voltage. +config PLATFORM_EC_USB_PD_VBUS_MEASURE_BY_BOARD + bool "VBUS on each port is measured per board specific" + help + Enable this if there are different VBUS measurement approaches on + the board, and also `board_get_vbus_voltage()` has to be implemented. + endchoice # Measuring VBUS voltage config PLATFORM_EC_USBC_VCONN @@ -585,6 +591,14 @@ config PLATFORM_EC_USB_PD_DP_HPD_GPIO_CUSTOM int svdm_get_hpd_gpio(int port); +config PLATFORM_EC_USB_PD_DATA_RESET_MSG + bool "Enable the PD Data Reset Message." + depends on PLATFORM_EC_USB_PD_REV30 + help + Enable this to support the Data Reset PD message flows. This is + mandatory for products supporting USB4 but optional for other PD 3.0 + products. + choice "VBUS detection method" prompt "Select the method to detect VBUS" @@ -932,6 +946,7 @@ choice "Type-C Port Manager (TCPM)" config PLATFORM_EC_USB_PD_TCPM_TCPCI bool "Use TCPCI" + select PLATFORM_EC_USBC_OCP help Enable a TCPC compatible with the Type-C Port Controller Interface (TCPCI) Specification. This driver supports both Rev1 v1.2 and Rev2 @@ -946,7 +961,6 @@ config PLATFORM_EC_USB_PD_TCPM_TCPCI # CONFIG_USB_PD_TCPM_ANX3429 # CONFIG_USB_PD_TCPM_ANX740X # CONFIG_USB_PD_TCPM_ANX741X -# CONFIG_USB_PD_TCPM_ANX7447 # CONFIG_USB_PD_TCPM_ANX7688 # CONFIG_USB_PD_TCPM_MT6370 # CONFIG_USB_PD_TCPM_RAA489000 @@ -1122,6 +1136,40 @@ config PLATFORM_EC_USB_PD_TCPM_MULTI_PS8XXX PS8805_PRODUCT_ID PS8815_PRODUCT_ID +config PLATFORM_EC_USB_PD_TCPM_ANX7447 + bool "Analogix ANX7447 USB-C Gen 2 Type-C Port Controller" + select PLATFORM_EC_USB_PD_TCPM_MUX + help + The Analogix ANX7447 is a USB Type-C Port Controller (TCPC) + for USB Type-C v1.2 Host, USB3.1 Gen2 and DisplayPort applications. + It has an on-chip microcontroller (OCM) to manage the signal + switching. It supports Power Delivery Rev. 3.0 and the DisplayPort + Alt Mode version 1.4a HBR3. + + Supported chips are: + ANX3447 + ANX7447 + +if PLATFORM_EC_USB_PD_TCPM_ANX7447 +config PLATFORM_EC_USB_PD_TCPM_ANX7447_AUX_PU_PD + bool "Enable ANX77447 AUX_N internal PU, and AUX_P internal PD." + depends on PLATFORM_EC_USB_PD_TCPM_ANX7447 + help + Use this config option to enable and internal pullup resistor on the + AUX_N and internal pulldown resistor on the AUX_P line. Only use this + config option if there are no external pu/pd resistors on these + signals. This configuration should be used to avoid noise issues on + the DDI1_AUX_N & DDI1_AUX_P signals (b/122873171) + +config PLATFORM_EC_USB_PD_TCPM_ANX7447_OCM_ERASE_COMMAND + bool "Enable console command to erase ANX7447 OCM flash" + depends on PLATFORM_EC_USB_PD_TCPM_ANX7447 + help + Adds an EC console command to erase the ANX7447 OCM flash. + Note: this is intended to be a temporary option and won't be needed + when ANX7447 are put on boards with OCM already erased +endif # PLATFORM_EC_USB_PD_TCPM_ANX7447 + config PLATFORM_EC_USB_PD_TCPM_NCT38XX bool "Nuvoton 3807/8 Single/Dual Port Controller with Power Delivery" help diff --git a/zephyr/boards/arm/brya/brya.dts b/zephyr/boards/arm/brya/brya.dts index 33f014981b..0df9f8d0fe 100644 --- a/zephyr/boards/arm/brya/brya.dts +++ b/zephyr/boards/arm/brya/brya.dts @@ -149,6 +149,11 @@ }; }; + vsby-psl-in-list { + /* Use PSL_IN1/2/3 as detection pins from hibernate mode */ + psl-in-pads = <&psl_in1 &psl_in2 &psl_in3>; + }; + def-lvol-io-list { compatible = "nuvoton,npcx-lvolctrl-def"; }; @@ -264,6 +269,22 @@ status = "okay"; }; +/* Power switch logic input pads */ +/* LID_OPEN_OD */ +&psl_in1 { + flag = <NPCX_PSL_RISING_EDGE>; +}; + +/* ACOK_EC_OD */ +&psl_in2 { + flag = <NPCX_PSL_RISING_EDGE>; +}; + +/* GSC_EC_PWR_BTN_ODL */ +&psl_in3 { + flag = <NPCX_PSL_FALLING_EDGE>; +}; + &thermistor_3V3_30K9_47K_4050B { status = "okay"; }; diff --git a/zephyr/boards/riscv/asurada/Kconfig.defconfig b/zephyr/boards/riscv/asurada/Kconfig.defconfig index e76e1cb2d1..463b0c30f3 100644 --- a/zephyr/boards/riscv/asurada/Kconfig.defconfig +++ b/zephyr/boards/riscv/asurada/Kconfig.defconfig @@ -15,9 +15,6 @@ config IDLE_STACK_SIZE config ISR_STACK_SIZE default 800 -config SHELL_STACK_SIZE - default 1048 - config SYSTEM_WORKQUEUE_STACK_SIZE default 1024 diff --git a/zephyr/boards/riscv/asurada/asurada.dts b/zephyr/boards/riscv/asurada/asurada.dts index 8dc3c2abb7..b0c46e4f6f 100644 --- a/zephyr/boards/riscv/asurada/asurada.dts +++ b/zephyr/boards/riscv/asurada/asurada.dts @@ -174,6 +174,10 @@ clock-frequency = <1804800>; }; +&ite_uart1_wrapper { + status = "okay"; +}; + &adc0 { status = "okay"; }; diff --git a/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig b/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig index 875969c7e4..1b1472dfe1 100644 --- a/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig +++ b/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig @@ -15,9 +15,6 @@ config IDLE_STACK_SIZE config ISR_STACK_SIZE default 800 -config SHELL_STACK_SIZE - default 1048 - config SYSTEM_WORKQUEUE_STACK_SIZE default 1024 diff --git a/zephyr/boards/riscv/it8xxx2/it8xxx2.dts b/zephyr/boards/riscv/it8xxx2/it8xxx2.dts index 2a2cd2539d..f4a46e335d 100644 --- a/zephyr/boards/riscv/it8xxx2/it8xxx2.dts +++ b/zephyr/boards/riscv/it8xxx2/it8xxx2.dts @@ -58,6 +58,10 @@ clock-frequency = <1804800>; }; +&ite_uart1_wrapper { + status = "okay"; +}; + &cros_kb_raw { status = "okay"; }; diff --git a/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig b/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig index b0a2db9686..385c98f275 100644 --- a/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig +++ b/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig @@ -81,9 +81,6 @@ CONFIG_PWM_ITE_IT8XXX2=y CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y -# Serial Host Interface (SHI) device. -CONFIG_CROS_SHI_IT8XXX2=y - # Timer configuration CONFIG_ITE_IT8XXX2_TIMER=y diff --git a/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts b/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts index a1b61d02ec..251c6a4236 100644 --- a/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts +++ b/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts @@ -242,6 +242,10 @@ clock-frequency = <1804800>; }; +&ite_uart1_wrapper { + status = "okay"; +}; + /* TEST1 */ &pwm0 { status = "okay"; diff --git a/zephyr/cmake/compiler/clang/compiler_flags.cmake b/zephyr/cmake/compiler/clang/compiler_flags.cmake index 815078a15a..f35b2870a6 100644 --- a/zephyr/cmake/compiler/clang/compiler_flags.cmake +++ b/zephyr/cmake/compiler/clang/compiler_flags.cmake @@ -7,4 +7,6 @@ include("${ZEPHYR_BASE}/cmake/compiler/clang/compiler_flags.cmake") # Disable -fno-freestanding. set_compiler_property(PROPERTY hosted) -check_set_compiler_property(APPEND PROPERTY warning_extended -Wunused-variable -Werror=unused-variable -Werror=missing-braces) +check_set_compiler_property(APPEND PROPERTY warning_extended -Wunused-variable + -Werror=unused-variable -Werror=missing-braces + -Werror=sometimes-uninitialized) diff --git a/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c b/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c index f238b1557b..0b1899feda 100644 --- a/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c +++ b/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c @@ -321,7 +321,6 @@ static int flash_it8xxx2_init(const struct device *dev) static struct cros_flash_it8xxx2_data cros_flash_data; -DEVICE_DEFINE(cros_flash_it8xxx2_0, DT_INST_LABEL(0), flash_it8xxx2_init, NULL, - &cros_flash_data, NULL, PRE_KERNEL_1, - CONFIG_KERNEL_INIT_PRIORITY_DEVICE, - &cros_flash_it8xxx2_driver_api); +DEVICE_DT_INST_DEFINE(0, flash_it8xxx2_init, NULL, &cros_flash_data, NULL, + PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, + &cros_flash_it8xxx2_driver_api); diff --git a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c index 522d48ff09..64753e0833 100644 --- a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c +++ b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c @@ -91,9 +91,9 @@ BUILD_ASSERT(ARRAY_SIZE(spi_response_state) == SPI_STATE_COUNT); static void spi_set_state(int state) { - /* SPI slave state machine */ + /* SPI peripheral state machine */ shi_state = state; - /* Response spi slave state */ + /* Response spi peripheral state */ IT83XX_SPI_SPISRDR = spi_response_state[state]; } @@ -142,12 +142,12 @@ static void spi_response_host_data(uint8_t *out_msg_addr, int tx_size) /* * After writing data to Tx FIFO is finished, this bit will - * be to indicate the SPI slave controller. + * be to indicate the SPI peripheral controller. */ IT83XX_SPI_TXFCR = IT83XX_SPI_TXFS; /* End Tx FIFO access */ IT83XX_SPI_TXRXFAR = 0; - /* SPI slave read Tx FIFO */ + /* SPI peripheral read Tx FIFO */ IT83XX_SPI_FCR = IT83XX_SPI_SPISRTXF; } @@ -356,7 +356,7 @@ static int cros_shi_ite_init(const struct device *dev) spi_set_state(SPI_STATE_READY_TO_RECV); /* Interrupt status register(write one to clear) */ IT83XX_SPI_ISR = 0xff; - /* SPI slave controller enable (after settings are ready) */ + /* SPI peripheral controller enable (after settings are ready) */ IT83XX_SPI_SPISGCR = IT83XX_SPI_SPISCEN; /* Ensure spi chip select alt function is enabled. */ @@ -365,7 +365,7 @@ static int cros_shi_ite_init(const struct device *dev) config[i].alt_fun); } - /* Enable SPI slave interrupt */ + /* Enable SPI peripheral interrupt */ IRQ_CONNECT(DT_INST_IRQN(0), 0, shi_ite_int_handler, 0, 0); irq_enable(DT_INST_IRQN(0)); diff --git a/zephyr/dts/bindings/emul/cros,isl923x_emul.yaml b/zephyr/dts/bindings/emul/cros,isl923x-emul.yaml index be8b1183a2..81663b5509 100644 --- a/zephyr/dts/bindings/emul/cros,isl923x_emul.yaml +++ b/zephyr/dts/bindings/emul/cros,isl923x-emul.yaml @@ -4,9 +4,14 @@ description: ISL923X Charger emulator -compatible: "cros,isl923x_emul" +compatible: "cros,isl923x-emul" include: base.yaml properties: reg: required: true + battery: + type: phandle + required: false + description: + Reference to battery emulator. diff --git a/zephyr/dts/bindings/emul/zephyr,syv682x.yaml b/zephyr/dts/bindings/emul/zephyr,syv682x.yaml index e1ce84e85d..8652b42b82 100644 --- a/zephyr/dts/bindings/emul/zephyr,syv682x.yaml +++ b/zephyr/dts/bindings/emul/zephyr,syv682x.yaml @@ -13,3 +13,7 @@ properties: type: phandle description: The GPIO that controls FRS enable on this device required: true + alert_gpio: + type: phandle + description: The GPIO that receives the alert signal from this device + required: true diff --git a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml index 2bc19d3ec4..863935c803 100644 --- a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml +++ b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml @@ -60,6 +60,7 @@ properties: - GPIO_EC_PCH_SYS_PWROK - GPIO_EC_PCH_WAKE_ODL - GPIO_EC_PCORE_INT_ODL + - GPIO_EC_PEN_CHG_DIS_ODL - GPIO_EC_PMIC_EN_ODL - GPIO_EC_PMIC_WATCHDOG_L - GPIO_EC_PROCHOT_IN_L @@ -132,6 +133,7 @@ properties: - GPIO_PG_MT6315_PROC_ODL - GPIO_PG_MT6360_ODL - GPIO_PG_PP5000_A_ODL + - GPIO_PG_PP5000_Z2_OD - GPIO_PMIC_EC_PWRGD - GPIO_PMIC_KPD_PWR_ODL - GPIO_PMIC_RESIN_L @@ -143,6 +145,7 @@ properties: - GPIO_S0_PGOOD - GPIO_S5_PGOOD - GPIO_SET_VMC_VOLT_AT_1V8 + - GPIO_SHI_CS_L - GPIO_SKU_ID0 - GPIO_SKU_ID1 - GPIO_SKU_ID2 @@ -176,6 +179,7 @@ properties: - GPIO_USB_C0_PPC_INT_ODL - GPIO_USB_C0_SWCTL_INT_ODL - GPIO_USB_C0_TCPC_INT_ODL + - GPIO_USB_C0_TCPC_RST - GPIO_USB_C0_TCPC_RST_L - GPIO_USB_C1_BC12_CHARGER_INT_ODL - GPIO_USB_C1_BC12_INT_L @@ -199,4 +203,5 @@ properties: - GPIO_WARM_RESET_L - GPIO_WP - GPIO_WP_L + - GPIO_X_EC_GPIO1 - GPIO_X_EC_GPIO2 diff --git a/zephyr/dts/bindings/motionsense/driver/bmi160.yaml b/zephyr/dts/bindings/motionsense/driver/bmi160.yaml index 8f490254a3..6ca096d87a 100644 --- a/zephyr/dts/bindings/motionsense/driver/bmi160.yaml +++ b/zephyr/dts/bindings/motionsense/driver/bmi160.yaml @@ -10,7 +10,7 @@ include: motionsense-sensor-base.yaml properties: i2c-spi-addr-flags: type: string - description: i2c address or SPI slave logic GPIO + description: i2c address or SPI peripheral logic GPIO enum: - "BMI160_ADDR0_FLAGS" default: "BMI160_ADDR0_FLAGS" diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml index 77d6282d7f..cbd9e82f2d 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml @@ -12,7 +12,7 @@ include: motionsense-sensor-base.yaml properties: i2c-spi-addr-flags: type: string - description: i2c address or SPI slave logic GPIO + description: i2c address or SPI peripheral logic GPIO enum: - "BMA2x2_I2C_ADDR1_FLAGS" - "BMA2x2_I2C_ADDR2_FLAGS" diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml index b90d824575..8aecc32077 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml @@ -12,7 +12,7 @@ include: motionsense-sensor-base.yaml properties: i2c-spi-addr-flags: type: string - description: i2c address or SPI slave logic GPIO + description: i2c address or SPI peripheral logic GPIO enum: - "KX022_ADDR0_FLAGS" - "KX022_ADDR1_FLAGS" diff --git a/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml b/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml index 2fc3d7eacd..ecad7ec1a7 100644 --- a/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml +++ b/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml @@ -10,7 +10,7 @@ include: motionsense-sensor-base.yaml properties: i2c-spi-addr-flags: type: string - description: i2c address or SPI slave logic GPIO + description: i2c address or SPI peripheral logic GPIO enum: - "TCS3400_I2C_ADDR_FLAGS" default: "TCS3400_I2C_ADDR_FLAGS" diff --git a/zephyr/dts/bindings/vendor-prefixes.txt b/zephyr/dts/bindings/vendor-prefixes.txt index 856fa81426..7402b7e579 100644 --- a/zephyr/dts/bindings/vendor-prefixes.txt +++ b/zephyr/dts/bindings/vendor-prefixes.txt @@ -6,3 +6,4 @@ # Zephyr module. The format is: # vendor-prefix<TAB>vendor name cros-ec The Chromium OS Embedded Controller Project +cros The Chromium OS Embedded Controller Project diff --git a/zephyr/emul/Kconfig.ln9310 b/zephyr/emul/Kconfig.ln9310 index 5773cf3721..c9e3e6fbc9 100644 --- a/zephyr/emul/Kconfig.ln9310 +++ b/zephyr/emul/Kconfig.ln9310 @@ -8,6 +8,7 @@ menuconfig EMUL_LN9310 bool "LN9310 switchcap emulator" default $(dt_compat_enabled,$(DT_COMPAT_LN9310_EMUL)) depends on I2C_EMUL + depends on ASSERT help Enable the LN9310 emulator. This driver uses the emulated I2C bus. It is used to test the ln9310 driver. Emulator API is available in diff --git a/zephyr/emul/Kconfig.sn5s330 b/zephyr/emul/Kconfig.sn5s330 index aba3bb9028..bb3e5eeea8 100644 --- a/zephyr/emul/Kconfig.sn5s330 +++ b/zephyr/emul/Kconfig.sn5s330 @@ -8,6 +8,7 @@ menuconfig EMUL_SN5S330 bool "sn5s330 emulator" default $(dt_compat_enabled,$(DT_COMPAT_SN5S330_EMUL)) depends on I2C_EMUL + depends on ASSERT help Enable the sn5s330 emulator. This driver uses the emulated I2C bus. It is used to test the sn5s330 driver. Emulator API is available in diff --git a/zephyr/emul/emul_charger.c b/zephyr/emul/emul_charger.c index d584ab882b..75ad869399 100644 --- a/zephyr/emul/emul_charger.c +++ b/zephyr/emul/emul_charger.c @@ -352,4 +352,5 @@ void charger_emul_init(struct charger_emul_data *data) data->ops.transmit = charger_emul_transmit_op; data->ops.rx_consumed = charger_emul_rx_consumed_op; + data->ops.control_change = NULL; } diff --git a/zephyr/emul/emul_isl923x.c b/zephyr/emul/emul_isl923x.c index e7a286e6fb..500f6e5f63 100644 --- a/zephyr/emul/emul_isl923x.c +++ b/zephyr/emul/emul_isl923x.c @@ -16,6 +16,7 @@ #include "driver/charger/isl923x_public.h" #include "emul/emul_common_i2c.h" #include "emul/emul_isl923x.h" +#include "emul/emul_smart_battery.h" #include "i2c.h" #include <logging/log.h> @@ -55,6 +56,10 @@ LOG_MODULE_REGISTER(isl923x_emul, CONFIG_ISL923X_EMUL_LOG_LEVEL); /** Mask used for the DC PROCHOT register */ #define REG_PROCHOT_DC_MASK GENMASK(13, 8) +#define DEFAULT_R_SNS 10 +#define R_SNS CONFIG_CHARGER_SENSE_RESISTOR +#define REG_TO_CURRENT(REG) ((REG) * DEFAULT_R_SNS / R_SNS) + struct isl923x_emul_data { /** Common I2C data */ struct i2c_common_emul_data common; @@ -84,6 +89,8 @@ struct isl923x_emul_data { uint16_t dc_prochot_reg; /** Emulated ADC vbus register */ uint16_t adc_vbus_reg; + /** Pointer to battery emulator. */ + int battery_ord; }; struct isl923x_emul_cfg { @@ -109,9 +116,11 @@ void isl923x_emul_reset(const struct emul *emulator) { struct isl923x_emul_data *data = emulator->data; struct i2c_common_emul_data common_backup = data->common; + int battery_ord = data->battery_ord; memset(data, 0, sizeof(struct isl923x_emul_data)); data->common = common_backup; + data->battery_ord = battery_ord; } void isl923x_emul_set_manufacturer_id(const struct emul *emulator, @@ -357,6 +366,35 @@ static int isl923x_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, return 0; } +static int isl923x_emul_finish_write(struct i2c_emul *emul, int reg, int bytes) +{ + struct isl923x_emul_data *data = ISL923X_DATA_FROM_I2C_EMUL(emul); + struct i2c_emul *battery_i2c_emul; + struct sbat_emul_bat_data *bat; + int16_t current; + + switch (reg) { + case ISL923X_REG_CHG_CURRENT: + /* Write current to battery. */ + if (data->battery_ord >= 0) { + battery_i2c_emul = sbat_emul_get_ptr(data->battery_ord); + if (battery_i2c_emul != NULL) { + bat = sbat_emul_get_bat_data(battery_i2c_emul); + if (bat != NULL) { + current = REG_TO_CURRENT( + data->current_limit_reg); + if (current > 0) + bat->cur = current; + else + bat->cur = -5; + } + } + } + break; + } + return 0; +} + static int emul_isl923x_init(const struct emul *emul, const struct device *parent) { @@ -378,7 +416,12 @@ static int emul_isl923x_init(const struct emul *emul, .common = { \ .write_byte = isl923x_emul_write_byte, \ .read_byte = isl923x_emul_read_byte, \ + .finish_write = isl923x_emul_finish_write, \ }, \ + .battery_ord = COND_CODE_1( \ + DT_INST_NODE_HAS_PROP(n, battery), \ + (DT_DEP_ORD(DT_INST_PROP(n, battery))), \ + (-1)), \ }; \ static struct isl923x_emul_cfg isl923x_emul_cfg_##n = { \ .common = { \ diff --git a/zephyr/emul/emul_lis2dw12.c b/zephyr/emul/emul_lis2dw12.c index 07fba6091f..53c3a8d951 100644 --- a/zephyr/emul/emul_lis2dw12.c +++ b/zephyr/emul/emul_lis2dw12.c @@ -29,6 +29,8 @@ struct lis2dw12_emul_data { struct i2c_common_emul_data common; /** Emulated who-am-i register */ uint8_t who_am_i_reg; + /** Emulated ctrl1 register */ + uint8_t ctrl1_reg; /** Emulated ctrl2 register */ uint8_t ctrl2_reg; /** Soft reset count */ @@ -87,11 +89,16 @@ static int lis2dw12_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, __ASSERT_NO_MSG(bytes == 0); *val = data->who_am_i_reg; break; + case LIS2DW12_CTRL1_ADDR: + __ASSERT_NO_MSG(bytes == 0); + *val = data->ctrl1_reg; + break; case LIS2DW12_CTRL2_ADDR: __ASSERT_NO_MSG(bytes == 0); *val = data->ctrl2_reg; break; default: + __ASSERT(false, "No read handler for register 0x%02x", reg); return -EINVAL; } return 0; @@ -106,6 +113,9 @@ static int lis2dw12_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, case LIS2DW12_WHO_AM_I_REG: LOG_ERR("Can't write to who-am-i register"); return -EINVAL; + case LIS2DW12_CTRL1_ADDR: + data->ctrl1_reg = val; + break; case LIS2DW12_CTRL2_ADDR: __ASSERT_NO_MSG(bytes == 1); if ((val & LIS2DW12_SOFT_RESET_MASK) != 0) { @@ -115,6 +125,7 @@ static int lis2dw12_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, data->ctrl2_reg = val & ~LIS2DW12_SOFT_RESET_MASK; break; default: + __ASSERT(false, "No write handler for register 0x%02x", reg); return -EINVAL; } return 0; diff --git a/zephyr/emul/emul_ln9310.c b/zephyr/emul/emul_ln9310.c index 3e6be65591..bc29fae432 100644 --- a/zephyr/emul/emul_ln9310.c +++ b/zephyr/emul/emul_ln9310.c @@ -253,104 +253,87 @@ static int ln9310_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, { struct ln9310_emul_data *data = LN9310_DATA_FROM_I2C_EMUL(emul); + __ASSERT(bytes == 1, "bytes 0x%x != 0x1 on reg 0x%x", bytes, reg); + switch (reg) { case LN9310_REG_INT1: - __ASSERT_NO_MSG(bytes == 1); data->int1_reg = val; break; case LN9310_REG_SYS_STS: - __ASSERT_NO_MSG(bytes == 1); data->sys_sts_reg = val; break; case LN9310_REG_INT1_MSK: - __ASSERT_NO_MSG(bytes == 1); data->int1_msk_reg = val; break; case LN9310_REG_STARTUP_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->startup_ctrl_reg = val; break; case LN9310_REG_LION_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->lion_ctrl_reg = val; break; case LN9310_REG_BC_STS_B: - __ASSERT_NO_MSG(bytes == 1); data->bc_sts_b_reg = val; break; case LN9310_REG_BC_STS_C: - LOG_ERR("Can't write to BC STS C register"); - return -EINVAL; + __ASSERT(false, + "Write to an unverified as safe " + "read-only register on 0x%x", + reg); + break; case LN9310_REG_CFG_0: - __ASSERT_NO_MSG(bytes == 1); data->cfg_0_reg = val; break; case LN9310_REG_CFG_4: - __ASSERT_NO_MSG(bytes == 1); data->cfg_4_reg = val; break; case LN9310_REG_CFG_5: - __ASSERT_NO_MSG(bytes == 1); data->cfg_5_reg = val; break; case LN9310_REG_PWR_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->power_ctrl_reg = val; break; case LN9310_REG_TIMER_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->timer_ctrl_reg = val; break; case LN9310_REG_LB_CTRL: - __ASSERT_NO_MSG(bytes = 1); data->lower_bound_ctrl_reg = val; break; case LN9310_REG_SPARE_0: - __ASSERT_NO_MSG(bytes == 1); data->spare_0_reg = val; break; case LN9310_REG_SWAP_CTRL_0: - __ASSERT_NO_MSG(bytes == 1); data->swap_ctrl_0_reg = val; break; case LN9310_REG_SWAP_CTRL_1: - __ASSERT_NO_MSG(bytes == 1); data->swap_ctrl_1_reg = val; break; case LN9310_REG_SWAP_CTRL_2: - __ASSERT_NO_MSG(bytes == 1); data->swap_ctrl_2_reg = val; break; case LN9310_REG_SWAP_CTRL_3: - __ASSERT_NO_MSG(bytes == 1); data->swap_ctrl_3_reg = val; break; case LN9310_REG_TRACK_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->track_ctrl_reg = val; break; case LN9310_REG_MODE_CHANGE_CFG: - __ASSERT_NO_MSG(bytes == 1); data->mode_change_cfg_reg = val; break; case LN9310_REG_SYS_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->sys_ctrl_reg = val; break; case LN9310_REG_FORCE_SC21_CTRL_1: - __ASSERT_NO_MSG(bytes == 1); data->force_sc21_ctrl_1_reg = val; break; case LN9310_REG_FORCE_SC21_CTRL_2: - __ASSERT_NO_MSG(bytes == 1); data->force_sc21_ctrl_2_reg = val; break; case LN9310_REG_TEST_MODE_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->test_mode_ctrl_reg = val; break; default: - return -EINVAL; + __ASSERT(false, "Unimplemented Register Access Error on 0x%x", + reg); } mode_change(data); return 0; @@ -379,101 +362,79 @@ static int ln9310_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, { struct ln9310_emul_data *data = LN9310_DATA_FROM_I2C_EMUL(emul); + __ASSERT(bytes == 0, "bytes 0x%x != 0x0 on reg 0x%x", bytes, reg); + switch (reg) { case LN9310_REG_INT1: - __ASSERT_NO_MSG(bytes == 0); *val = data->int1_reg; break; case LN9310_REG_SYS_STS: - __ASSERT_NO_MSG(bytes == 0); *val = data->sys_sts_reg; break; case LN9310_REG_INT1_MSK: - __ASSERT_NO_MSG(bytes == 0); *val = data->int1_msk_reg; break; case LN9310_REG_STARTUP_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->startup_ctrl_reg; break; case LN9310_REG_LION_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->lion_ctrl_reg; break; case LN9310_REG_BC_STS_B: - __ASSERT_NO_MSG(bytes == 0); *val = data->bc_sts_b_reg; break; case LN9310_REG_BC_STS_C: - __ASSERT_NO_MSG(bytes == 0); *val = data->bc_sts_c_reg; break; case LN9310_REG_CFG_0: - __ASSERT_NO_MSG(bytes == 0); *val = data->cfg_0_reg; break; case LN9310_REG_CFG_4: - __ASSERT_NO_MSG(bytes == 0); *val = data->cfg_4_reg; break; case LN9310_REG_CFG_5: - __ASSERT_NO_MSG(bytes == 0); *val = data->cfg_5_reg; break; case LN9310_REG_PWR_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->power_ctrl_reg; break; case LN9310_REG_TIMER_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->timer_ctrl_reg; break; case LN9310_REG_LB_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->lower_bound_ctrl_reg; break; case LN9310_REG_SPARE_0: - __ASSERT_NO_MSG(bytes == 0); *val = data->spare_0_reg; break; case LN9310_REG_SWAP_CTRL_0: - __ASSERT_NO_MSG(bytes == 0); *val = data->swap_ctrl_0_reg; break; case LN9310_REG_SWAP_CTRL_1: - __ASSERT_NO_MSG(bytes == 0); *val = data->swap_ctrl_1_reg; break; case LN9310_REG_SWAP_CTRL_2: - __ASSERT_NO_MSG(bytes == 0); *val = data->swap_ctrl_2_reg; break; case LN9310_REG_SWAP_CTRL_3: - __ASSERT_NO_MSG(bytes == 0); *val = data->swap_ctrl_3_reg; break; case LN9310_REG_TRACK_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->track_ctrl_reg; break; case LN9310_REG_MODE_CHANGE_CFG: - __ASSERT_NO_MSG(bytes == 0); *val = data->mode_change_cfg_reg; break; case LN9310_REG_SYS_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->sys_ctrl_reg; break; case LN9310_REG_FORCE_SC21_CTRL_1: - __ASSERT_NO_MSG(bytes == 0); *val = data->force_sc21_ctrl_1_reg; break; case LN9310_REG_FORCE_SC21_CTRL_2: - __ASSERT_NO_MSG(bytes == 0); *val = data->force_sc21_ctrl_2_reg; break; case LN9310_REG_TEST_MODE_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->test_mode_ctrl_reg; break; default: diff --git a/zephyr/emul/emul_sn5s330.c b/zephyr/emul/emul_sn5s330.c index f6b3217372..9aa931f4c4 100644 --- a/zephyr/emul/emul_sn5s330.c +++ b/zephyr/emul/emul_sn5s330.c @@ -101,116 +101,91 @@ struct i2c_emul *sn5s330_emul_to_i2c_emul(const struct emul *emul) return &(data->common.emul); } -int sn5s330_emul_peek_reg(const struct emul *emul, uint32_t reg, uint32_t *val) +/* Workhorse for mapping i2c reg to internal emulator data access */ +static uint8_t *sn5s330_emul_get_reg_ptr(struct sn5s330_emul_data *data, + int reg) { - struct sn5s330_emul_data *data = emul->data; - - switch (reg) { - case SN5S330_FUNC_SET1: - *val = data->func_set1_reg; - break; - default: - return -EINVAL; - } - return 0; -} - -static int sn5s330_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, - int bytes) -{ - struct sn5s330_emul_data *data = SN5S330_DATA_FROM_I2C_EMUL(emul); - - __ASSERT(bytes == 0, "bytes 0x%x != 0x0 on reg 0x%x", bytes, reg); - switch (reg) { case SN5S330_FUNC_SET1: - *val = data->func_set1_reg; - break; + return &(data->func_set1_reg); case SN5S330_FUNC_SET2: - *val = data->func_set2_reg; - break; + return &(data->func_set2_reg); case SN5S330_FUNC_SET3: - *val = data->func_set3_reg; - break; + return &(data->func_set3_reg); case SN5S330_FUNC_SET4: - *val = data->func_set4_reg; - break; + return &(data->func_set4_reg); case SN5S330_FUNC_SET5: - *val = data->func_set5_reg; - break; + return &(data->func_set5_reg); case SN5S330_FUNC_SET6: - *val = data->func_set6_reg; - break; + return &(data->func_set6_reg); case SN5S330_FUNC_SET7: - *val = data->func_set7_reg; - break; + return &(data->func_set7_reg); case SN5S330_FUNC_SET8: - *val = data->func_set8_reg; - break; + return &(data->func_set8_reg); case SN5S330_FUNC_SET9: - *val = data->func_set9_reg; - break; + return &(data->func_set9_reg); case SN5S330_FUNC_SET10: - *val = data->func_set10_reg; - break; + return &(data->func_set10_reg); case SN5S330_FUNC_SET11: - *val = data->func_set11_reg; - break; + return &(data->func_set11_reg); case SN5S330_FUNC_SET12: - *val = data->func_set12_reg; - break; + return &(data->func_set12_reg); case SN5S330_INT_STATUS_REG1: - *val = data->int_status_reg1; - break; + return &(data->int_status_reg1); case SN5S330_INT_STATUS_REG2: - *val = data->int_status_reg2; - break; + return &(data->int_status_reg2); case SN5S330_INT_STATUS_REG3: - *val = data->int_status_reg3; - break; + return &(data->int_status_reg3); case SN5S330_INT_STATUS_REG4: - *val = data->int_status_reg4; - break; + return &(data->int_status_reg4); case SN5S330_INT_MASK_RISE_REG1: - *val = data->int_mask_rise_reg1; - break; + return &(data->int_mask_rise_reg1); case SN5S330_INT_MASK_RISE_REG2: - *val = data->int_mask_rise_reg2; - break; + return &(data->int_mask_rise_reg2); case SN5S330_INT_MASK_RISE_REG3: - *val = data->int_mask_rise_reg3; - break; + return &(data->int_mask_rise_reg3); case SN5S330_INT_MASK_FALL_REG1: - *val = data->int_mask_fall_reg1; - break; + return &(data->int_mask_fall_reg1); case SN5S330_INT_MASK_FALL_REG2: - *val = data->int_mask_fall_reg2; - break; + return &(data->int_mask_fall_reg2); case SN5S330_INT_MASK_FALL_REG3: - *val = data->int_mask_fall_reg3; - break; + return &(data->int_mask_fall_reg3); case SN5S330_INT_TRIP_RISE_REG1: - *val = data->int_trip_rise_reg1; - break; + return &(data->int_trip_rise_reg1); case SN5S330_INT_TRIP_RISE_REG2: - *val = data->int_trip_rise_reg2; - break; + return &(data->int_trip_rise_reg2); case SN5S330_INT_TRIP_RISE_REG3: - *val = data->int_trip_rise_reg3; - break; + return &(data->int_trip_rise_reg3); case SN5S330_INT_TRIP_FALL_REG1: - *val = data->int_trip_fall_reg1; - break; + return &(data->int_trip_fall_reg1); case SN5S330_INT_TRIP_FALL_REG2: - *val = data->int_trip_fall_reg2; - break; + return &(data->int_trip_fall_reg2); case SN5S330_INT_TRIP_FALL_REG3: - *val = data->int_trip_fall_reg3; - break; + return &(data->int_trip_fall_reg3); default: __ASSERT(false, "Unimplemented Register Access Error on 0x%x", reg); + /* Statement never reached, required for compiler warnings */ + return NULL; } +} + +void sn5s330_emul_peek_reg(const struct emul *emul, uint32_t reg, uint8_t *val) +{ + struct sn5s330_emul_data *data = emul->data; + uint8_t *data_reg = sn5s330_emul_get_reg_ptr(data, reg); + + *val = *data_reg; +} + +static int sn5s330_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, + int bytes) +{ + struct sn5s330_emul_data *data = SN5S330_DATA_FROM_I2C_EMUL(emul); + uint8_t *reg_to_read = sn5s330_emul_get_reg_ptr(data, reg); + + __ASSERT(bytes == 0, "bytes 0x%x != 0x0 on reg 0x%x", bytes, reg); + *val = *reg_to_read; return 0; } @@ -219,46 +194,12 @@ static int sn5s330_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, int bytes) { struct sn5s330_emul_data *data = SN5S330_DATA_FROM_I2C_EMUL(emul); + uint8_t *reg_to_write; __ASSERT(bytes == 1, "bytes 0x%x != 0x1 on reg 0x%x", bytes, reg); + /* Specially check for read-only reg */ switch (reg) { - case SN5S330_FUNC_SET1: - data->func_set1_reg = val; - break; - case SN5S330_FUNC_SET2: - data->func_set2_reg = val; - break; - case SN5S330_FUNC_SET3: - data->func_set3_reg = val; - break; - case SN5S330_FUNC_SET4: - data->func_set4_reg = val; - break; - case SN5S330_FUNC_SET5: - data->func_set5_reg = val; - break; - case SN5S330_FUNC_SET6: - data->func_set6_reg = val; - break; - case SN5S330_FUNC_SET7: - data->func_set7_reg = val; - break; - case SN5S330_FUNC_SET8: - data->func_set8_reg = val; - break; - case SN5S330_FUNC_SET9: - data->func_set9_reg = val; - break; - case SN5S330_FUNC_SET10: - data->func_set10_reg = val; - break; - case SN5S330_FUNC_SET11: - data->func_set11_reg = val; - break; - case SN5S330_FUNC_SET12: - data->func_set12_reg = val; - break; case SN5S330_INT_STATUS_REG1: /* fallthrough */ case SN5S330_INT_STATUS_REG2: @@ -269,48 +210,9 @@ static int sn5s330_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, "0x%x", reg); /* fallthrough for checkpath */ - case SN5S330_INT_STATUS_REG4: - data->int_status_reg4 = val; - break; - case SN5S330_INT_MASK_RISE_REG1: - data->int_mask_rise_reg1 = val; - break; - case SN5S330_INT_MASK_RISE_REG2: - data->int_mask_rise_reg2 = val; - break; - case SN5S330_INT_MASK_RISE_REG3: - data->int_mask_rise_reg3 = val; - break; - case SN5S330_INT_MASK_FALL_REG1: - data->int_mask_fall_reg1 = val; - break; - case SN5S330_INT_MASK_FALL_REG2: - data->int_mask_fall_reg2 = val; - break; - case SN5S330_INT_MASK_FALL_REG3: - data->int_mask_fall_reg3 = val; - break; - case SN5S330_INT_TRIP_RISE_REG1: - data->int_trip_rise_reg1 = val; - break; - case SN5S330_INT_TRIP_RISE_REG2: - data->int_trip_rise_reg2 = val; - break; - case SN5S330_INT_TRIP_RISE_REG3: - data->int_trip_rise_reg3 = val; - break; - case SN5S330_INT_TRIP_FALL_REG1: - data->int_trip_fall_reg1 = val; - break; - case SN5S330_INT_TRIP_FALL_REG2: - data->int_trip_fall_reg2 = val; - break; - case SN5S330_INT_TRIP_FALL_REG3: - data->int_trip_fall_reg3 = val; - break; default: - __ASSERT(false, "Unimplemented Register Access Error on 0x%x", - reg); + reg_to_write = sn5s330_emul_get_reg_ptr(data, reg); + *reg_to_write = val; } return 0; diff --git a/zephyr/emul/emul_syv682x.c b/zephyr/emul/emul_syv682x.c index b9d2dc57c7..4527609270 100644 --- a/zephyr/emul/emul_syv682x.c +++ b/zephyr/emul/emul_syv682x.c @@ -29,6 +29,8 @@ struct syv682x_emul_data { const struct device *i2c; const struct device *frs_en_gpio_port; gpio_pin_t frs_en_gpio_pin; + const struct device *alert_gpio_port; + gpio_pin_t alert_gpio_pin; /** Configuration information */ const struct syv682x_emul_cfg *cfg; /** Current state of all emulated SYV682x registers */ @@ -51,6 +53,15 @@ struct syv682x_emul_cfg { struct syv682x_emul_data *data; }; +/* Asserts or deasserts the interrupt signal to the EC. */ +static void syv682x_emul_set_alert(struct syv682x_emul_data *data, bool alert) +{ + int res = gpio_emul_input_set(data->alert_gpio_port, + /* The signal is inverted. */ + data->alert_gpio_pin, !alert); + __ASSERT_NO_MSG(res == 0); +} + int syv682x_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) { struct syv682x_emul_data *data; @@ -64,48 +75,36 @@ int syv682x_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) return 0; } -void syv682x_emul_set_status(struct i2c_emul *emul, uint8_t val) +void syv682x_emul_set_condition(struct i2c_emul *emul, uint8_t status, + uint8_t control_4) { + uint8_t control_4_interrupt = control_4 & SYV682X_CONTROL_4_INT_MASK; struct syv682x_emul_data *data = CONTAINER_OF(emul, struct syv682x_emul_data, emul); int frs_en_gpio = gpio_emul_output_get(data->frs_en_gpio_port, data->frs_en_gpio_pin); - /* Only assert FRS status if FRS is enabled. */ __ASSERT_NO_MSG(frs_en_gpio >= 0); + + /* Only assert FRS status if FRS is enabled. */ if (!frs_en_gpio) - val &= ~SYV682X_STATUS_FRS; + status &= ~SYV682X_STATUS_FRS; - data->status_cond = val; - data->reg[SYV682X_STATUS_REG] |= val; + data->status_cond = status; + data->reg[SYV682X_STATUS_REG] |= status; - if (val & (SYV682X_STATUS_TSD | SYV682X_STATUS_OVP | + data->control_4_cond = control_4_interrupt; + /* Only update the interrupting bits of CONTROL_4. */ + data->reg[SYV682X_CONTROL_4_REG] &= ~SYV682X_CONTROL_4_INT_MASK; + data->reg[SYV682X_CONTROL_4_REG] |= control_4_interrupt; + + /* These conditions disable the power path. */ + if (status & (SYV682X_STATUS_TSD | SYV682X_STATUS_OVP | SYV682X_STATUS_OC_HV)) { data->reg[SYV682X_CONTROL_1_REG] |= SYV682X_CONTROL_1_PWR_ENB; } /* - * TODO(b/190519131): Make this emulator trigger GPIO-based interrupts - * by itself based on the status. In real life, the device should turn - * the power path off when either of these conditions occurs, and they - * should quickly dissipate. If they somehow stay set, the device should - * interrupt continuously. Relatedly, the emulator should only generate - * an interrupt based on FRS status if the FRS enable pin was asserted. - */ -} - -void syv682x_emul_set_control_4(struct i2c_emul *emul, uint8_t val) -{ - struct syv682x_emul_data *data; - uint8_t val_interrupt = val & SYV682X_CONTROL_4_INT_MASK; - - data = CONTAINER_OF(emul, struct syv682x_emul_data, emul); - data->control_4_cond = val_interrupt; - /* Only update the interrupting bits. */ - data->reg[SYV682X_CONTROL_4_REG] &= ~SYV682X_CONTROL_4_INT_MASK; - data->reg[SYV682X_CONTROL_4_REG] |= val_interrupt; - - /* * Note: The description of CONTROL_4 suggests that setting VCONN_OC * will turn off the VCONN channel. The "VCONN Channel Over Current * Response" plot shows that VCONN the device will merely throttle VCONN @@ -114,12 +113,14 @@ void syv682x_emul_set_control_4(struct i2c_emul *emul, uint8_t val) */ /* VBAT_OVP disconnects CC and VCONN. */ - if (val_interrupt & SYV682X_CONTROL_4_VBAT_OVP) { + if (control_4_interrupt & SYV682X_CONTROL_4_VBAT_OVP) { data->reg[SYV682X_CONTROL_4_REG] &= ~(SYV682X_CONTROL_4_CC1_BPS | SYV682X_CONTROL_4_CC2_BPS | SYV682X_CONTROL_4_VCONN1 | SYV682X_CONTROL_4_VCONN2); } + + syv682x_emul_set_alert(data, status | control_4_interrupt); } int syv682x_emul_get_reg(struct i2c_emul *emul, int reg, uint8_t *val) @@ -248,7 +249,7 @@ static struct i2c_emul_api syv682x_emul_api = { * @param emul Emulation information * @param parent Device to emulate * - * @return 0 indicating success (always) + * @return 0 on success or an error code on failure */ static int syv682x_emul_init(const struct emul *emul, const struct device *parent) @@ -264,6 +265,10 @@ static int syv682x_emul_init(const struct emul *emul, memset(data->reg, 0, sizeof(data->reg)); ret = i2c_emul_register(parent, emul->dev_label, &data->emul); + if (ret) + return ret; + + syv682x_emul_set_alert(data, false); return ret; } @@ -274,6 +279,10 @@ static int syv682x_emul_init(const struct emul *emul, DT_INST_PROP(n, frs_en_gpio), gpios)), \ .frs_en_gpio_pin = DT_GPIO_PIN( \ DT_INST_PROP(n, frs_en_gpio), gpios), \ + .alert_gpio_port = DEVICE_DT_GET(DT_GPIO_CTLR( \ + DT_INST_PROP(n, alert_gpio), gpios)), \ + .alert_gpio_pin = DT_GPIO_PIN( \ + DT_INST_PROP(n, alert_gpio), gpios), \ }; \ static const struct syv682x_emul_cfg syv682x_emul_cfg_##n = { \ .i2c_label = DT_INST_BUS_LABEL(n), \ diff --git a/zephyr/emul/emul_tcpci.c b/zephyr/emul/emul_tcpci.c index b2c21c2ec4..c37ef560a5 100644 --- a/zephyr/emul/emul_tcpci.c +++ b/zephyr/emul/emul_tcpci.c @@ -436,6 +436,39 @@ int tcpci_emul_connect_partner(const struct emul *emul, } /** Check description in emul_tcpci.h */ +int tcpci_emul_disconnect_partner(const struct emul *emul) +{ + struct tcpci_emul_data *data = emul->data; + uint16_t val; + uint16_t term; + int rc; + + data->partner = NULL; + /* Set both CC lines to open to indicate disconnect. */ + rc = tcpci_emul_get_reg(emul, TCPC_REG_CC_STATUS, &val); + if (rc != 0) + return rc; + + term = TCPC_REG_CC_STATUS_TERM(val); + + rc = tcpci_emul_set_reg(emul, TCPC_REG_CC_STATUS, + TCPC_REG_CC_STATUS_SET(term, TYPEC_CC_VOLT_OPEN, + TYPEC_CC_VOLT_OPEN)); + if (rc != 0) + return rc; + + data->reg[TCPC_REG_ALERT] |= TCPC_REG_ALERT_CC_STATUS; + rc = tcpci_emul_alert_changed(emul); + if (rc != 0) + return rc; + /* TODO: Wait until DisableSourceVbus (TCPC_REG_COMMAND_SRC_CTRL_LOW?), + * and then set VBUS present = 0 and vSafe0V = 1 after appropriate + * delays. + */ + return 0; +} + +/** Check description in emul_tcpci.h */ void tcpci_emul_partner_msg_status(const struct emul *emul, enum tcpci_emul_tx_status status) { diff --git a/zephyr/include/cros/ite/it8xxx2.dtsi b/zephyr/include/cros/ite/it8xxx2.dtsi index 54ca7f63e3..96f5875e78 100644 --- a/zephyr/include/cros/ite/it8xxx2.dtsi +++ b/zephyr/include/cros/ite/it8xxx2.dtsi @@ -6,6 +6,10 @@ #include <cros/binman.dtsi> / { + chosen { + cros-ec,flash = &fiu0; + }; + named-bbram-regions { compatible = "named-bbram-regions"; diff --git a/zephyr/include/cros/nuvoton/npcx.dtsi b/zephyr/include/cros/nuvoton/npcx.dtsi index 8767ee7c5b..705935d25e 100644 --- a/zephyr/include/cros/nuvoton/npcx.dtsi +++ b/zephyr/include/cros/nuvoton/npcx.dtsi @@ -10,6 +10,9 @@ #include <nuvoton/npcx.dtsi> / { + chosen { + cros-ec,flash = &fiu0; + }; named-bbram-regions { compatible = "named-bbram-regions"; diff --git a/zephyr/include/emul/emul_sn5s330.h b/zephyr/include/emul/emul_sn5s330.h index 00b473e206..af158a8444 100644 --- a/zephyr/include/emul/emul_sn5s330.h +++ b/zephyr/include/emul/emul_sn5s330.h @@ -23,9 +23,9 @@ struct i2c_emul *sn5s330_emul_to_i2c_emul(const struct emul *emul); * @param emul The emulator to query * @param reg The register to read * @param val Pointer to write the register value to - * @return 0 on success */ -int sn5s330_emul_peek_reg(const struct emul *emul, uint32_t reg, uint32_t *val); +void sn5s330_emul_peek_reg(const struct emul *emul, uint32_t reg, + uint8_t *val); /** * @brief Reset the sn5s330 emulator diff --git a/zephyr/include/emul/emul_syv682x.h b/zephyr/include/emul/emul_syv682x.h index 46580e8257..ebfa094d77 100644 --- a/zephyr/include/emul/emul_syv682x.h +++ b/zephyr/include/emul/emul_syv682x.h @@ -24,15 +24,16 @@ #define SYV682X_CONTROL_4_REG 0x04 /* Status Register */ -#define SYV682X_STATUS_OC_HV BIT(7) -#define SYV682X_STATUS_RVS BIT(6) -#define SYV682X_STATUS_OC_5V BIT(5) -#define SYV682X_STATUS_OVP BIT(4) -#define SYV682X_STATUS_FRS BIT(3) -#define SYV682X_STATUS_TSD BIT(2) -#define SYV682X_STATUS_VSAFE_5V BIT(1) -#define SYV682X_STATUS_VSAFE_0V BIT(0) -#define SYV682X_STATUS_INT_MASK 0xfc +#define SYV682X_STATUS_OC_HV BIT(7) +#define SYV682X_STATUS_RVS BIT(6) +#define SYV682X_STATUS_OC_5V BIT(5) +#define SYV682X_STATUS_OVP BIT(4) +#define SYV682X_STATUS_FRS BIT(3) +#define SYV682X_STATUS_TSD BIT(2) +#define SYV682X_STATUS_VSAFE_5V BIT(1) +#define SYV682X_STATUS_VSAFE_0V BIT(0) +#define SYV682X_STATUS_INT_MASK 0xfc +#define SYV682X_STATUS_NONE 0 /* Control Register 1 */ #define SYV682X_CONTROL_1_CH_SEL BIT(1) @@ -99,6 +100,7 @@ #define SYV682X_CONTROL_4_VCONN_OCP BIT(2) #define SYV682X_CONTROL_4_CC_FRS BIT(1) #define SYV682X_CONTROL_4_INT_MASK 0x0c +#define SYV682X_CONTROL_4_NONE 0 /** * @brief Get pointer to SYV682x emulator using device tree order number. @@ -110,24 +112,17 @@ struct i2c_emul *syv682x_emul_get(int ord); /** - * @brief Set the underlying interrupt conditions affecting the status register + * @brief Set the underlying interrupt conditions affecting the SYV682x * - * @param emul SYV682x emulator - * @param val A status register value corresponding to the underlying - * conditions - */ -void syv682x_emul_set_status(struct i2c_emul *emul, uint8_t val); - -/** - * @brief Set the underlying interrupt conditions affecting the control 4 - * register - * - * @param emul SYV682x emulator - * @param val A control 4 register value corresponding to the underlying - * conditions; only the bits in SYV682X_CONTROL_4_INT_MASK have an - * effect. + * @param emul SYV682x emulator + * @param status A status register value corresponding to the underlying + * conditions + * @param control_4 A control 4 register value corresponding to the underlying + * conditions; only the bits in SYV682X_CONTROL_4_INT_MASK have + * an effect. */ -void syv682x_emul_set_control_4(struct i2c_emul *emul, uint8_t val); +void syv682x_emul_set_condition(struct i2c_emul *emul, uint8_t status, + uint8_t control_4); /** * @brief Set value of a register of SYV682x diff --git a/zephyr/include/emul/emul_tcpci.h b/zephyr/include/emul/emul_tcpci.h index 7be5b2711c..3a5a3047d7 100644 --- a/zephyr/include/emul/emul_tcpci.h +++ b/zephyr/include/emul/emul_tcpci.h @@ -299,6 +299,14 @@ int tcpci_emul_connect_partner(const struct emul *emul, enum tcpc_cc_voltage_status partner_cc2, enum tcpc_cc_polarity polarity); +/** @brief Emulate the disconnection of the partner device to emulated TCPCI + * + * @param emul Pointer to TCPCI emulator + * + * @return 0 on success + */ +int tcpci_emul_disconnect_partner(const struct emul *emul); + /** * @brief Allows port partner to select if message was received correctly * diff --git a/zephyr/projects/brya/brya/gpio.dts b/zephyr/projects/brya/brya/gpio.dts index 9ec2af0a12..daaa2db547 100644 --- a/zephyr/projects/brya/brya/gpio.dts +++ b/zephyr/projects/brya/brya/gpio.dts @@ -142,6 +142,11 @@ enum-name = "GPIO_ENABLE_BACKLIGHT"; label = "EC_EDP_BL_EN"; }; + ec_prochot_in_l { + gpios = <&gpiof 0 GPIO_INPUT>; + enum-name = "GPIO_EC_PROCHOT_IN_L"; + label = "EC_PROCHOT_IN_L"; + }; }; hibernate-wake-pins { diff --git a/zephyr/projects/brya/brya/include/gpio_map.h b/zephyr/projects/brya/brya/include/gpio_map.h index 978b0a921c..ab0224d0d4 100644 --- a/zephyr/projects/brya/brya/include/gpio_map.h +++ b/zephyr/projects/brya/brya/include/gpio_map.h @@ -31,8 +31,11 @@ #ifdef CONFIG_PLATFORM_EC_POWERSEQ #define POWER_SIGNAL_INT(gpio, edge) \ GPIO_INT(gpio, edge, power_signal_interrupt) +#define AP_PROCHOT_INT(gpio, edge) \ + GPIO_INT(gpio, edge, throttle_ap_prochot_input_interrupt) #else #define POWER_SIGNAL_INT(gpio, edge) +#define AP_PROCHOT_INT(gpio, edge) #endif @@ -47,5 +50,6 @@ POWER_SIGNAL_INT(GPIO_SLP_SUS_L, GPIO_INT_EDGE_BOTH) \ POWER_SIGNAL_INT(GPIO_PG_EC_DSW_PWROK, GPIO_INT_EDGE_BOTH) \ POWER_SIGNAL_INT(GPIO_PG_EC_RSMRST_ODL, GPIO_INT_EDGE_BOTH) \ - POWER_SIGNAL_INT(GPIO_PG_EC_ALL_SYS_PWRGD, GPIO_INT_EDGE_BOTH) + POWER_SIGNAL_INT(GPIO_PG_EC_ALL_SYS_PWRGD, GPIO_INT_EDGE_BOTH) \ + AP_PROCHOT_INT(GPIO_EC_PROCHOT_IN_L, GPIO_INT_EDGE_BOTH) #endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/brya/brya/prj.conf b/zephyr/projects/brya/brya/prj.conf index 13ef01133f..ae8e6e0d2d 100644 --- a/zephyr/projects/brya/brya/prj.conf +++ b/zephyr/projects/brya/brya/prj.conf @@ -36,6 +36,9 @@ CONFIG_PLATFORM_EC_HOSTCMD=y CONFIG_PLATFORM_EC_TEMP_SENSOR=y CONFIG_PLATFORM_EC_THERMISTOR=y +# Miscellaneous configs +CONFIG_PLATFORM_EC_HIBERNATE_PSL=y + # Keyboard CONFIG_PLATFORM_EC_KEYBOARD=y CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042=y @@ -62,3 +65,4 @@ CONFIG_PLATFORM_EC_POWERSEQ_S0IX=y CONFIG_PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION=y # Treat 2nd reset from H1 as Power-On CONFIG_PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON=y +CONFIG_PLATFORM_EC_THROTTLE_AP=y diff --git a/zephyr/projects/corsola/BUILD.py b/zephyr/projects/corsola/BUILD.py new file mode 100644 index 0000000000..beb7e3ab7c --- /dev/null +++ b/zephyr/projects/corsola/BUILD.py @@ -0,0 +1,47 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Default chip is it8xxx2, some variants will use NPCX9X. + + +def register_corsola_project( + project_name, + chip="it8xxx2", + extra_dts_overlays=(), + extra_kconfig_files=(), +): + register_func = register_binman_project + if chip.startswith("npcx9"): + register_func = register_npcx_project + + register_func( + project_name=project_name, + zephyr_board=chip, + dts_overlays=[*extra_dts_overlays], + kconfig_files=[here / "prj.conf", *extra_kconfig_files], + ) + + +register_corsola_project( + "krabby", + extra_dts_overlays=[ + here / "adc_krabby.dts", + here / "battery_krabby.dts", + here / "gpio_krabby.dts", + here / "i2c_krabby.dts", + here / "motionsense_krabby.dts", + here / "pwm_krabby.dts", + ], + extra_kconfig_files=[here / "prj_krabby.conf"], +) + +register_corsola_project( + project_name="kingler", + chip="npcx9", + extra_dts_overlays=[ + here / "battery_kingler.dts", + here / "gpio_kingler.dts", + ], + extra_kconfig_files=[here / "prj_kingler.conf"], +) diff --git a/zephyr/projects/corsola/CMakeLists.txt b/zephyr/projects/corsola/CMakeLists.txt new file mode 100644 index 0000000000..79ac32d915 --- /dev/null +++ b/zephyr/projects/corsola/CMakeLists.txt @@ -0,0 +1,33 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cmake_minimum_required(VERSION 3.13.1) + +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) + +zephyr_library_include_directories(include) + +# Include selected EC source from the baseboard +zephyr_library_sources( + "src/board_chipset.c" + "src/hibernate.c" +) + +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/usbc_config.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/usb_pd_policy.c") +zephyr_library_sources_ifdef(CONFIG_VARIANT_CORSOLA_DB_DETECTION + "src/variant_db_detection.c") + +if(DEFINED CONFIG_BOARD_KRABBY) + project(krabby) + zephyr_library_sources("src/krabby/hooks.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C "src/krabby/i2c.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_COMMON + "src/krabby/led.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC + "src/krabby/usbc_config.c") +elseif(DEFINED CONFIG_BOARD_KINGLER) + project(kingler) +endif() + diff --git a/zephyr/projects/corsola/Kconfig b/zephyr/projects/corsola/Kconfig new file mode 100644 index 0000000000..746c8b8cc8 --- /dev/null +++ b/zephyr/projects/corsola/Kconfig @@ -0,0 +1,32 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +config BOARD_KRABBY + bool "Google Krabby Board" + help + Build Google Krabby reference board. Krabby has MediaTek MT8186 SoC + with ITE it81202-bx EC. + +config BOARD_KINGLER + bool "Google Kingler Board" + help + Build Google Kingler reference board. Krabby has MediaTek MT8186 SoC + with NPCX993FA0BX EC. + +config VARIANT_CORSOLA_DB_DETECTION + bool "Corsola Platform Runtime Daughter Board Detection" + help + Daughter board detection for Type-C subboard or HDMI subboard. This + includes pin configuration and driver loading. + default y + +config VARIANT_CORSOLA_USBA + bool "Corsola Platform USB-A support" + help + Support Corsola USB-A related functions. Enable this function if + it has USB-A ports. + depends on PLATFORM_EC_USBC + default y + +source "Kconfig.zephyr" diff --git a/zephyr/projects/corsola/krabby/adc.dts b/zephyr/projects/corsola/adc_krabby.dts index 7f308c04f9..7f308c04f9 100644 --- a/zephyr/projects/corsola/krabby/adc.dts +++ b/zephyr/projects/corsola/adc_krabby.dts diff --git a/zephyr/projects/corsola/kingler/battery.dts b/zephyr/projects/corsola/battery_kingler.dts index 02a6d0d3b9..02a6d0d3b9 100644 --- a/zephyr/projects/corsola/kingler/battery.dts +++ b/zephyr/projects/corsola/battery_kingler.dts diff --git a/zephyr/projects/corsola/krabby/battery.dts b/zephyr/projects/corsola/battery_krabby.dts index deb803bb8c..deb803bb8c 100644 --- a/zephyr/projects/corsola/krabby/battery.dts +++ b/zephyr/projects/corsola/battery_krabby.dts diff --git a/zephyr/projects/corsola/gpio_kingler.dts b/zephyr/projects/corsola/gpio_kingler.dts new file mode 100644 index 0000000000..2056f13f64 --- /dev/null +++ b/zephyr/projects/corsola/gpio_kingler.dts @@ -0,0 +1,287 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + named-gpios { + compatible = "named-gpios"; + + base_imu_int_l { + gpios = <&gpio5 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "BASE_IMU_INT_L"; + enum-name = "GPIO_BASE_IMU_INT_L"; + }; + spi_ap_clk_ec { + gpios = <&gpio5 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "SPI_AP_CLK_EC"; + }; + spi_ap_cs_ec_l { + gpios = <&gpio5 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "SPI_AP_CS_EC_L"; + enum-name = "GPIO_SHI_CS_L"; + }; + spi_ap_do_ec_di { + gpios = <&gpio4 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "SPI_AP_DO_EC_DI"; + }; + spi_ap_di_ec_do { + gpios = <&gpio4 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "SPI_AP_DI_EC_DO"; + }; + ap_ec_warm_rst_req { + gpios = <&gpio5 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "AP_EC_WARM_RST_REQ"; + enum-name = "GPIO_AP_EC_WARM_RST_REQ"; + }; + ap_ec_wdtrst_l { + gpios = <&gpio5 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "AP_EC_WDTRST_L"; + enum-name = "GPIO_AP_EC_WDTRST_L"; + }; + ap_in_sleep_l { + gpios = <&gpio5 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "AP_IN_SLEEP_L"; + enum-name = "GPIO_AP_IN_SLEEP_L"; + }; + en_ulp { + gpios = <&gpioc 6 GPIO_OUT_LOW>; + label = "EN_ULP"; + enum-name = "GPIO_EN_ULP"; + }; + en_ec_id_odl { + gpios = <&gpio7 6 GPIO_ODR_LOW>; + label = "EN_EC_ID_ODL"; + enum-name = "GPIO_EN_EC_ID_ODL"; + }; + sys_rst_odl { + gpios = <&gpioc 5 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>; + label = "SYS_RST_ODL"; + enum-name = "GPIO_SYS_RST_ODL"; + }; + ec_i2c_sensor_scl { + gpios = <&gpiob 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "EC_I2C_SENSOR_SCL"; + }; + ec_i2c_sensor_sda { + gpios = <&gpiob 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "EC_I2C_SENSOR_SDA"; + }; + ec_i2c_usb_c0_scl { + gpios = <&gpio9 0 GPIO_INPUT>; + label = "EC_I2C_USB_C0_SCL"; + }; + ec_i2c_usb_c0_sda { + gpios = <&gpio8 7 GPIO_INPUT>; + label = "EC_I2C_USB_C0_SDA"; + }; + ec_i2c_usb_c1_scl { + gpios = <&gpio9 2 GPIO_INPUT>; + label = "EC_I2C_USB_C1_SCL"; + }; + ec_i2c_usb_c1_sda { + gpios = <&gpio9 1 GPIO_INPUT>; + label = "EC_I2C_USB_C1_SDA"; + }; + ec_i2c_pwr_cbi_scl { + gpios = <&gpiod 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "EC_I2C_PWR_CBI_SCL"; + }; + ec_i2c_pwr_cbi_sda { + gpios = <&gpiod 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "EC_I2C_PWR_CBI_SDA"; + }; + ec_i2c_batt_scl { + gpios = <&gpio3 3 GPIO_INPUT>; + label = "EC_I2C_BATT_SCL"; + }; + ec_i2c_batt_sda { + gpios = <&gpio3 6 GPIO_INPUT>; + label = "EC_I2C_BATT_SDA"; + }; + ec_pen_chg_dis_odl { + gpios = <&gpioe 4 GPIO_ODR_LOW>; + label = "EC_PEN_CHG_DIS_ODL"; + enum-name = "GPIO_EC_PEN_CHG_DIS_ODL"; + }; + ec_wp_odl { + gpios = <&gpioe 3 GPIO_INPUT>; + label = "EC_WP_ODL"; + enum-name = "GPIO_WP_L"; + }; + lid_accel_int_l { + gpios = <&gpiob 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "LID_ACCEL_INT_L"; + enum-name = "GPIO_LID_ACCEL_INT_L"; + }; + tablet_mode_l { + gpios = <&gpiob 2 GPIO_INPUT>; + label = "TABLET_MODE_L"; + enum-name = "GPIO_TABLET_MODE_L"; + }; + ec_ap_int_odl { + gpios = <&gpioc 1 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + label = "EC_AP_INT_ODL"; + enum-name = "GPIO_EC_INT_L"; + }; + ec_kso_02_inv { + gpios = <&gpio1 7 GPIO_OUT_LOW>; + label = "EC_KSO_02_INV"; + enum-name = "GPIO_KBD_KSO2"; + }; + usb_c0_bc12_int_odl { + gpios = <&gpio8 3 GPIO_INPUT>; + label = "USB_C0_BC12_INT_ODL"; + }; + ec_entering_rw { + gpios = <&gpio0 3 GPIO_OUT_LOW>; + label = "EC_ENTERING_RW"; + enum-name = "GPIO_ENTERING_RW"; + }; + charger_prochot_odl { + gpios = <&gpiob 1 GPIO_INPUT>; + label = "CHARGER_PROCHOT_ODL"; + enum-name = "GPIO_CHARGER_PROCHOT_ODL"; + }; + ec_rst_odl { + gpios = <&gpio7 7 GPIO_INPUT>; + label = "EC_RST_ODL"; + enum-name = "GPIO_EC_RST_ODL"; + }; + lid_open { + gpios = <&gpiod 2 GPIO_INPUT>; + label = "LID_OPEN"; + enum-name = "GPIO_LID_OPEN"; + }; + acok_od { + gpios = <&gpio0 0 GPIO_INPUT>; + label = "ACOK_OD"; + enum-name = "GPIO_AC_PRESENT"; + }; + gsc_ec_pwr_btn_odl { + gpios = <&gpio0 1 GPIO_INPUT>; + label = "GSC_EC_PWR_BTN_ODL"; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + en_5v_usm { + gpios = <&gpio0 2 GPIO_OUT_LOW>; + label = "EN_5V_USM"; + enum-name = "GPIO_EN_5V_USM"; + }; + packet_mode_en { + gpios = <&gpio0 2 GPIO_OUT_LOW>; + label = "PACKET_MODE_EN"; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + x_ec_gpio2 { + gpios = <&gpiod 4 GPIO_INPUT>; + label = "X_EC_GPIO2"; + enum-name = "GPIO_X_EC_GPIO2"; + }; + ap_sysrst_odl_r { + gpios = <&gpioa 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "AP_EC_SYSRST_ODL_R"; + enum-name = "GPIO_AP_EC_SYSRST_ODL"; + }; + ap_xhci_init_done { + gpios = <&gpioa 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + label = "AP_XHCI_INIT_DONE"; + enum-name = "GPIO_AP_XHCI_INIT_DONE"; + }; + usb_c0_ppc_int_odl { + gpios = <&gpio6 7 GPIO_INPUT>; + label = "USB_C0_PPC_INT_ODL"; + enum-name = "GPIO_USB_C0_PPC_INT_ODL"; + }; + pg_pp5000_z2_od { + gpios = <&gpio7 0 GPIO_INPUT>; + label = "PG_PP5000_Z2_OD"; + enum-name = "GPIO_PG_PP5000_Z2_OD"; + }; + x_ec_gpio1 { + gpios = <&gpio6 2 GPIO_OUT_LOW>; + label = "X_EC_GPIO1"; + enum-name = "GPIO_X_EC_GPIO1"; + }; + dp_aux_path_sel { + gpios = <&gpio6 3 GPIO_OUT_LOW>; + label = "DP_AUX_PATH_SEL"; + enum-name = "GPIO_DP_AUX_PATH_SEL"; + }; + ec_bl_en_od { + gpios = <&gpio4 0 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>; + label = "EC_BL_EN_OD"; + enum-name = "GPIO_EC_BL_EN_OD"; + }; + ec_x_gpio3 { + gpios = <&gpiod 3 GPIO_OUT_LOW>; + label = "EC_X_GPIO3"; + enum-name = "GPIO_EC_X_GPIO3"; + }; + usb_c0_tcpc_int_odl { + gpios = <&gpio7 3 GPIO_INPUT>; + label = "USB_C0_TCPC_INT_ODL"; + enum-name = "GPIO_USB_C0_TCPC_INT_ODL"; + }; + usb_c0_tcpc_rst { + gpios = <&gpioc 0 GPIO_OUT_LOW>; + label = "USB_C0_TCPC_RST"; + enum-name = "GPIO_USB_C0_TCPC_RST"; + }; + en_pp5000_usb_a0_vbus_x { + gpios = <&gpio6 0 GPIO_OUT_LOW>; + label = "EN_PP5000_USB_A0_VBUS_X"; + enum-name = "GPIO_EN_PP5000_USB_A0_VBUS"; + }; + hdmi_prsnt_odl { + gpios = <&gpio3 7 GPIO_INPUT>; + label = "HDMI_PRSNT_ODL"; + enum-name = "GPIO_HDMI_PRSNT_ODL"; + }; + en_pp5000_z2 { + gpios = <&gpio3 4 GPIO_OUT_LOW>; + label = "EN_PP5000_Z2"; + enum-name = "GPIO_EN_PP5000_Z2"; + }; + usb_c1_tcpc_int_odl { + gpios = <&gpioe 1 GPIO_INPUT>; + label = "USB_C1_TCPC_INT_ODL"; + enum-name = "GPIO_USB_C1_TCPC_INT_ODL"; + }; + ec_batt_pres_odl { + gpios = <&gpioe 0 GPIO_INPUT>; + label = "EC_BATT_PRES_ODL"; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + usb_a0_fault_odl { + gpios = <&gpioc 7 GPIO_INPUT>; + label = "USB_A0_FAULT_ODL"; + enum-name = "GPIO_USB_A0_FAULT_ODL"; + }; + ec_ap_dp_hpd_odl { + gpios = <&gpio6 1 GPIO_ODR_HIGH>; + label = "EC_AP_DP_HPD_ODL"; + enum-name = "GPIO_EC_AP_DP_HPD_ODL"; + }; + ec_pmic_en_odl { + gpios = <&gpio7 4 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>; + label = "EC_PMIC_EN_ODL"; + enum-name = "GPIO_EC_PMIC_EN_ODL"; + }; + ec_volup_btn_odl { + gpios = <&gpiod 5 GPIO_INPUT>; + label = "EC_VOLUP_BTN_ODL"; + enum-name = "GPIO_VOLUME_UP_L"; + }; + ec_voldn_btn_odl { + gpios = <&gpioe 2 GPIO_INPUT>; + label = "EC_VOLDN_BTN_ODL"; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + ccd_mode_odl { + gpios = <&gpioe 5 GPIO_INPUT>; + label = "CCD_MODE_ODL"; + enum-name = "GPIO_CCD_MODE_ODL"; + }; + }; +}; diff --git a/zephyr/projects/corsola/krabby/gpio.dts b/zephyr/projects/corsola/gpio_krabby.dts index 29fc7dd879..29fc7dd879 100644 --- a/zephyr/projects/corsola/krabby/gpio.dts +++ b/zephyr/projects/corsola/gpio_krabby.dts diff --git a/zephyr/projects/corsola/krabby/i2c.dts b/zephyr/projects/corsola/i2c_krabby.dts index 7205bf19bc..7205bf19bc 100644 --- a/zephyr/projects/corsola/krabby/i2c.dts +++ b/zephyr/projects/corsola/i2c_krabby.dts diff --git a/zephyr/projects/corsola/include/baseboard_usbc_config.h b/zephyr/projects/corsola/include/baseboard_usbc_config.h new file mode 100644 index 0000000000..8fa0ff5cd6 --- /dev/null +++ b/zephyr/projects/corsola/include/baseboard_usbc_config.h @@ -0,0 +1,15 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Corsola daughter board detection */ + +#ifndef __CROS_EC_BASEBOARD_USBC_CONFIG_H +#define __CROS_EC_BASEBOARD_USBC_CONFIG_H + +#include "gpio.h" + +void ppc_interrupt(enum gpio_signal signal); + +#endif /* __CROS_EC_BASEBOARD_USBC_CONFIG_H */ diff --git a/zephyr/projects/corsola/include/gpio_map.h b/zephyr/projects/corsola/include/gpio_map.h new file mode 100644 index 0000000000..6db8f94b76 --- /dev/null +++ b/zephyr/projects/corsola/include/gpio_map.h @@ -0,0 +1,162 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_GPIO_MAP_H +#define __ZEPHYR_GPIO_MAP_H + +#include <devicetree.h> +#include <gpio_signal.h> + +#define GPIO_BATT_PRES_ODL NAMED_GPIO(ec_batt_pres_odl) + +#define GPIO_ENTERING_RW GPIO_UNIMPLEMENTED + +/* daughterboard GPIO remap */ +#define GPIO_EN_HDMI_PWR GPIO_EC_X_GPIO1 +#define GPIO_USB_C1_FRS_EN GPIO_EC_X_GPIO1 +#define GPIO_USB_C1_PPC_INT_ODL GPIO_X_EC_GPIO2 +#define GPIO_PS185_EC_DP_HPD GPIO_X_EC_GPIO2 +#define GPIO_USB_C1_DP_IN_HPD GPIO_EC_X_GPIO3 +#define GPIO_PS185_PWRDN_ODL GPIO_EC_X_GPIO3 + +/* TODO: support CONFIG_WP_ACTIVE_HIGH for zephyr */ +#define GPIO_WP GPIO_UNIMPLEMENTED +#define GPIO_WP_L GPIO_UNIMPLEMENTED + +#ifdef CONFIG_PLATFORM_EC_POWER_BUTTON + #define PWRBTN_INT() GPIO_INT(GPIO_POWER_BUTTON_L, \ + GPIO_INT_EDGE_BOTH, \ + power_button_interrupt) +#else + #define PWRBTN_INT() +#endif + +#ifdef CONFIG_PLATFORM_EC_VOLUME_BUTTONS + #define VOLBTN_INT(pin) GPIO_INT(pin, \ + GPIO_INT_EDGE_BOTH, \ + button_interrupt) +#else + #define VOLBTN_INT(pin) +#endif + +#ifdef CONFIG_SOC_IT8XXX2 + #define AP_SPI_INT() GPIO_INT(GPIO_SPI0_CS, \ + GPIO_INT_EDGE_BOTH, \ + spi_event) +#elif defined(CONFIG_SOC_NPCX9M3F) + /* TODO(b:203619750): enable SPI interrupt */ + #define AP_SPI_INT() +#endif + +#ifdef CONFIG_PLATFORM_EC_TABLET_MODE + #define GMR_TABLET_INT() GPIO_INT(GPIO_TABLET_MODE_L, \ + GPIO_INT_EDGE_BOTH, \ + gmr_tablet_switch_isr) +#else + #define GMR_TABLET_INT() +#endif + +/* TODO(b:203619750): enable power sequencing interrupt */ +#ifdef CONFIG_PLATFORM_EC_POWERSEQ_MT8186 + #define WARM_RST_REQ_INT() GPIO_INT(GPIO_AP_EC_WARM_RST_REQ, \ + GPIO_INT_EDGE_RISING, \ + chipset_reset_request_interrupt) + #define AP_IN_SLEEP_INT() GPIO_INT(GPIO_AP_IN_SLEEP_L, \ + GPIO_INT_EDGE_BOTH, \ + power_signal_interrupt) +#else + #define WARM_RST_REQ_INT() + #define AP_IN_SLEEP_INT() +#endif + +#ifdef CONFIG_PLATFORM_EC_ACCEL_LIS2DW12 + #define LID_ACCEL_INT() GPIO_INT(GPIO_LID_ACCEL_INT_L, \ + GPIO_INT_EDGE_FALLING, \ + lis2dw12_interrupt) +#else + #define LID_ACCEL_INT() +#endif + +#ifdef CONFIG_PLATFORM_EC_EXTPOWER_GPIO + #define EXTPWR_INT() GPIO_INT(GPIO_AC_PRESENT, \ + GPIO_INT_EDGE_BOTH, \ + extpower_interrupt) +#else + #define EXTPWR_INT() +#endif + +#ifdef CONFIG_PLATFORM_EC_LID_SWITCH + #define LID_SWITCH_INT() GPIO_INT(GPIO_LID_OPEN, \ + GPIO_INT_EDGE_BOTH, \ + lid_interrupt) +#else + #define LID_SWITCH_INT() +#endif + +#ifdef CONFIG_PLATFORM_EC_SWITCH + #define SWITCH_INT() GPIO_INT(GPIO_WP, \ + GPIO_INT_EDGE_BOTH, \ + switch_interrupt) +#else + #define SWITCH_INT() +#endif + +#ifdef CONFIG_VARIANT_CORSOLA_DB_DETECTION + #define X_EC_GPIO2_INT() GPIO_INT(GPIO_X_EC_GPIO2, \ + GPIO_INT_EDGE_BOTH, \ + x_ec_interrupt) +#else + #define X_EC_GPIO2_INT() +#endif + +#ifdef CONFIG_VARIANT_CORSOLA_USBA + #define USBA_INT() GPIO_INT(GPIO_AP_XHCI_INIT_DONE, \ + GPIO_INT_EDGE_BOTH, \ + usb_a0_interrupt) +#else + #define USBA_INT() +#endif + +#ifdef CONFIG_PLATFORM_EC_GMR_TABLET_MODE +#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L +#endif + +/* TODO: remove after icm426xx driver added */ +static inline void motion_interrupt(enum gpio_signal signal) +{ +} + +/* + * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items. + * + * Each GPIO_INT requires three parameters: + * gpio_signal - The enum gpio_signal for the interrupt gpio + * interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH) + * handler - The platform/ec interrupt handler. + * + * Ensure that this files includes all necessary headers to declare all + * referenced handler functions. + * + * For example, one could use the follow definition: + * #define EC_CROS_GPIO_INTERRUPTS \ + * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print) + */ +#define EC_CROS_GPIO_INTERRUPTS \ + PWRBTN_INT() \ + VOLBTN_INT(GPIO_VOLUME_DOWN_L) \ + VOLBTN_INT(GPIO_VOLUME_UP_L) \ + LID_SWITCH_INT() \ + WARM_RST_REQ_INT() \ + GMR_TABLET_INT() \ + GPIO_INT(GPIO_BASE_IMU_INT_L, \ + GPIO_INT_EDGE_FALLING, motion_interrupt) \ + LID_ACCEL_INT() \ + USBA_INT() \ + EXTPWR_INT() \ + SWITCH_INT() \ + AP_SPI_INT() \ + X_EC_GPIO2_INT() + +#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/corsola/krabby/include/i2c_map.h b/zephyr/projects/corsola/include/i2c_map.h index 898d5c398c..898d5c398c 100644 --- a/zephyr/projects/corsola/krabby/include/i2c_map.h +++ b/zephyr/projects/corsola/include/i2c_map.h diff --git a/zephyr/projects/corsola/include/variant_db_detection.h b/zephyr/projects/corsola/include/variant_db_detection.h new file mode 100644 index 0000000000..40853016f8 --- /dev/null +++ b/zephyr/projects/corsola/include/variant_db_detection.h @@ -0,0 +1,32 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Corsola daughter board detection */ + +#ifndef __CROS_EC_CORSOLA_DB_DETECTION_H +#define __CROS_EC_CORSOLA_DB_DETECTION_H + +enum corsola_db_type { + CORSOLA_DB_NONE = -1, + CORSOLA_DB_TYPEC, + CORSOLA_DB_HDMI, + CORSOLA_DB_COUNT, +}; + +#ifdef CONFIG_VARIANT_CORSOLA_DB_DETECTION +/* + * Get the connected daughterboard type. + * + * @return The daughterboard type. + */ +enum corsola_db_type corsola_get_db_type(void); +#else +inline enum corsola_db_type corsola_get_db_type(void) +{ + return CORSOLA_DB_NONE; +}; +#endif /* CONFIG_VARIANT_CORSOLA_DB_DETECTION */ + +#endif /* __CROS_EC_CORSOLA_DB_DETECTION_H */ diff --git a/zephyr/projects/corsola/kingler/gpio.dts b/zephyr/projects/corsola/kingler/gpio.dts deleted file mode 100644 index 638e95c9fb..0000000000 --- a/zephyr/projects/corsola/kingler/gpio.dts +++ /dev/null @@ -1,337 +0,0 @@ -/ { - named-gpios { - compatible = "named-gpios"; - - ec_wp_l { - gpios = <&gpio5 0 GPIO_INPUT>; - label = "EC_WP_L"; - enum-name = "GPIO_WP_L"; - }; - ccd_mode_odl { - gpios = <&gpioc 6 GPIO_ODR_HIGH>; - label = "CCD_MODE_ODL"; - }; - ec_gsc_packet_mode { - gpios = <&gpiob 1 GPIO_OUT_LOW>; - label = "EC_GSC_PACKET_MODE"; - }; - mech_pwr_btn_odl { - gpios = <&gpiod 2 GPIO_INPUT>; - label = "MECH_PWR_BTN_ODL"; - enum-name = "GPIO_POWER_BUTTON_L"; - }; - ec_pwr_btn_odl { - gpios = <&gpio0 1 GPIO_INPUT>; - label = "EC_PWR_BTN_ODL"; - enum-name = "GPIO_EC_PWR_BTN_ODL"; - }; - slp_s3_l { - gpios = <&gpio6 1 GPIO_INPUT>; - label = "SLP_S3_L"; - enum-name = "GPIO_PCH_SLP_S3_L"; - }; - slp_s5_l { - gpios = <&gpio7 2 GPIO_INPUT>; - label = "SLP_S5_L"; - enum-name = "GPIO_PCH_SLP_S5_L"; - }; - slp_s3_s0i3_l { - gpios = <&gpio7 4 GPIO_INPUT>; - label = "SLP_S3_S0I3_L"; - enum-name = "GPIO_PCH_SLP_S0_L"; - }; - pg_pwr_s5 { - gpios = <&gpioc 0 GPIO_INPUT>; - label = "PG_PWR_S5"; - enum-name = "GPIO_S5_PGOOD"; - }; - pg_pcore_s0_r_od { - gpios = <&gpiob 6 GPIO_INPUT>; - label = "PG_PCORE_S0_R_OD"; - enum-name = "GPIO_S0_PGOOD"; - }; - acok_od { - gpios = <&gpio0 0 GPIO_INPUT>; - label = "ACOK_OD"; - enum-name = "GPIO_AC_PRESENT"; - }; - ec_pcore_int_odl { - gpios = <&gpiof 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PCORE_INT_ODL"; - enum-name = "GPIO_EC_PCORE_INT_ODL"; - }; - pg_groupc_s0_od { - gpios = <&gpioa 3 GPIO_INPUT>; - label = "PG_GROUPC_S0_OD"; - enum-name = "GPIO_PG_GROUPC_S0_OD"; - }; - pg_lpddr4x_s3_od { - gpios = <&gpio9 5 GPIO_INPUT>; - label = "PG_LPDDR4X_S3_OD"; - enum-name = "GPIO_PG_LPDDR4X_S3_OD"; - }; - en_pwr_s5 { - gpios = <&gpiob 7 GPIO_OUT_LOW>; - label = "EN_PWR_S5"; - enum-name = "GPIO_EN_PWR_A"; - }; - en_pwr_s0_r { - gpios = <&gpiof 1 GPIO_OUT_LOW>; - label = "EN_PWR_S0_R"; - enum-name = "GPIO_EN_PWR_S0_R"; - }; - en_pwr_pcore_s0_r { - gpios = <&gpioe 1 GPIO_OUT_LOW>; - label = "EN_PWR_PCORE_S0_R"; - enum-name = "GPIO_EN_PWR_PCORE_S0_R"; - }; - ec_entering_rw { - gpios = <&gpio6 6 GPIO_OUT_LOW>; - label = "EC_ENTERING_RW"; - enum-name = "GPIO_ENTERING_RW"; - }; - ec_sys_rst_l { - gpios = <&gpio7 6 GPIO_ODR_HIGH>; - label = "EC_SYS_RST_L"; - enum-name = "GPIO_SYS_RESET_L"; - }; - ec_soc_rsmrst_l { - gpios = <&gpioc 5 GPIO_OUT_LOW>; - label = "EC_SOC_RSMRST_L"; - enum-name = "GPIO_PCH_RSMRST_L"; - }; - ec_clr_cmos { - gpios = <&gpioa 1 GPIO_OUT_LOW>; - label = "EC_CLR_CMOS"; - }; - ec_mem_event { - gpios = <&gpioa 5 GPIO_OUT_LOW>; - label = "EC_MEM_EVENT"; - }; - ec_soc_pwr_btn_l { - gpios = <&gpio6 3 GPIO_OUT_HIGH>; - label = "EC_SOC_PWR_BTN_L"; - enum-name = "GPIO_PCH_PWRBTN_L"; - }; - ec_soc_pwr_good { - gpios = <&gpiod 3 GPIO_OUT_LOW>; - label = "EC_SOC_PWR_GOOD"; - enum-name = "GPIO_PCH_SYS_PWROK"; - }; - ec_soc_wake_l { - gpios = <&gpio0 3 GPIO_OUT_HIGH>; - label = "EC_SOC_WAKE_L"; - enum-name = "GPIO_EC_PCH_WAKE_ODL"; - }; - ec_soc_int_l { - gpios = <&gpio8 3 GPIO_OUT_HIGH>; - label = "EC_SOC_INT_L"; - }; - prochot_odl { - gpios = <&gpiod 5 GPIO_ODR_HIGH>; - label = "PROCHOT_ODL"; - enum-name = "GPIO_CPU_PROCHOT"; - }; - soc_alert_ec_l { - gpios = <&gpioe 2 GPIO_INPUT>; - label = "SOC_ALERT_EC_L"; - }; - soc_thermtrip_odl { - gpios = <&gpioe 5 GPIO_INPUT>; - label = "SOC_THERMTRIP_ODL"; - }; - usb_c0_tcpc_int_odl { - gpios = <&gpioe 0 GPIO_INPUT>; - label = "USB_C0_TCPC_INT_ODL"; - }; - usb_c1_tcpc_int_odl { - gpios = <&gpioc 7 GPIO_INPUT>; - label = "USB_C1_TCPC_INT_ODL"; - }; - usb_c0_ppc_int_odl { - gpios = <&gpio7 5 GPIO_INPUT>; - label = "USB_C0_PPC_INT_ODL"; - }; - usb_c1_ppc_int_odl { - gpios = <&gpiod 4 GPIO_INPUT>; - label = "USB_C1_PPC_INT_ODL"; - }; - usb_c0_bc12_int_odl { - gpios = <&gpioa 4 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "USB_C0_BC12_INT_ODL"; - }; - usb_c1_bc12_int_odl { - gpios = <&gpio9 6 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "USB_C1_BC12_INT_ODL"; - }; - usb_c0_c1_fault_odl { - gpios = <&gpio7 3 GPIO_ODR_HIGH>; - label = "USB_C0_C1_FAULT_ODL"; - }; - usb_c0_tcpc_rst_l { - gpios = <&gpio3 4 GPIO_OUT_HIGH>; - label = "USB_C0_TCPC_RST_L"; - }; - usb_c1_tcpc_rst_l { - gpios = <&gpio3 7 GPIO_OUT_HIGH>; - label = "USB_C1_TCPC_RST_L"; - }; - usb_c0_hpd { - gpios = <&gpiof 5 GPIO_OUT_LOW>; - label = "USB_C0_HPD"; - }; - usb_c1_hpd { - gpios = <&gpiof 4 GPIO_OUT_LOW>; - label = "USB_C1_HPD"; - }; - 3axis_int_l { - gpios = <&gpioa 2 (GPIO_INPUT | GPIO_PULL_DOWN)>; - label = "3AXIS_INT_L"; - }; - lid_open { - gpios = <&gpio0 2 GPIO_INPUT>; - label = "LID_OPEN"; - enum-name = "GPIO_LID_OPEN"; - }; - voldn_btn_odl { - gpios = <&gpioa 7 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "VOLDN_BTN_ODL"; - enum-name = "GPIO_VOLUME_DOWN_L"; - }; - volup_btn_odl { - gpios = <&gpio9 3 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "VOLUP_BTN_ODL"; - enum-name = "GPIO_VOLUME_UP_L"; - }; - ec_batt_pres_odl { - gpios = <&gpio9 4 GPIO_INPUT>; - label = "EC_BATT_PRES_ODL"; - enum-name = "GPIO_BATT_PRES_ODL"; - }; - ec_disable_disp_bl { - gpios = <&gpioa 6 GPIO_OUT_HIGH>; - label = "EC_DISABLE_DISP_BL"; - }; - ec_i2c_usb_a0_c0_scl { - gpios = <&gpiob 5 GPIO_INPUT>; - label = "EC_I2C_USB_A0_C0_SCL"; - }; - ec_i2c_usb_a0_c0_sda { - gpios = <&gpiob 4 GPIO_INPUT>; - label = "EC_I2C_USB_A0_C0_SDA"; - }; - ec_i2c_usb_a1_c1_scl { - gpios = <&gpio9 0 GPIO_INPUT>; - label = "EC_I2C_USB_A1_C1_SCL"; - }; - ec_i2c_usb_a1_c1_sda { - gpios = <&gpio8 7 GPIO_INPUT>; - label = "EC_I2C_USB_A1_C1_SDA"; - }; - ec_i2c_batt_scl { - gpios = <&gpio9 2 GPIO_INPUT>; - label = "EC_I2C_BATT_SCL"; - }; - ec_i2c_batt_sda { - gpios = <&gpio9 1 GPIO_INPUT>; - label = "EC_I2C_BATT_SDA"; - }; - ec_i2c_usbc_mux_scl { - gpios = <&gpiod 1 GPIO_INPUT>; - label = "EC_I2C_USBC_MUX_SCL"; - }; - ec_i2c_usbc_mux_sda { - gpios = <&gpiod 0 GPIO_INPUT>; - label = "EC_I2C_USBC_MUX_SDA"; - }; - ec_i2c_power_scl { - gpios = <&gpiof 3 GPIO_INPUT>; - label = "EC_I2C_POWER_SCL"; - }; - ec_i2c_power_sda { - gpios = <&gpiof 2 GPIO_INPUT>; - label = "EC_I2C_POWER_SDA"; - }; - ec_i2c_cbi_scl { - gpios = <&gpio3 3 GPIO_INPUT>; - label = "EC_I2C_CBI_SCL"; - }; - ec_i2c_cbi_sda { - gpios = <&gpio3 6 GPIO_INPUT>; - label = "EC_I2C_CBI_SDA"; - }; - ec_i2c_sensor_scl { - gpios = <&gpioe 4 GPIO_INPUT>; - label = "EC_I2C_SENSOR_SCL"; - }; - ec_i2c_sensor_sda { - gpios = <&gpioe 3 GPIO_INPUT>; - label = "EC_I2C_SENSOR_SDA"; - }; - ec_i2c_soc_sic { - gpios = <&gpiob 3 GPIO_INPUT>; - label = "EC_I2C_SOC_SIC"; - }; - ec_i2c_soc_sid { - gpios = <&gpiob 2 GPIO_INPUT>; - label = "EC_I2C_SOC_SID"; - }; - en_kb_bl { - gpios = <&gpio9 7 GPIO_OUT_HIGH>; - label = "EN_KB_BL"; - }; - ec_kso_02_inv { - gpios = <&gpio1 7 GPIO_OUT_LOW>; - label = "EC_KSO_02_INV"; - enum-name = "GPIO_KBD_KSO2"; - }; - ec_espi_rst_l { - gpios = <&gpio5 4 GPIO_PULL_UP>; - label = "EC_ESPI_RST_L"; - }; - 6axis_int_l { - gpios = <&gpioa 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "6AXIS_INT_L"; - }; - tablet_mode { - gpios = <&gpioc 1 GPIO_INPUT>; - label = "TABLET_MODE"; - }; - ec_gpio56 { - gpios = <&gpio5 6 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_GPIO56"; - }; - ec_ps2_clk { - gpios = <&gpio6 7 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PS2_CLK"; - }; - ec_ps2_dat { - gpios = <&gpio7 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PS2_DAT"; - }; - ec_ps2_rst { - gpios = <&gpio6 2 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PS2_RST"; - }; - ec_gpiob0 { - gpios = <&gpiob 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_GPIOB0"; - }; - ec_gpio81 { - gpios = <&gpio8 1 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_GPIO81"; - }; - ec_flprg2 { - gpios = <&gpio8 6 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_FLPRG2"; - }; - ec_psl_gpo { - gpios = <&gpiod 7 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PSL_GPO"; - }; - ec_pwm7 { - gpios = <&gpio6 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PWM7"; - }; - }; -}; diff --git a/zephyr/projects/corsola/kingler/i2c.dts b/zephyr/projects/corsola/kingler/i2c.dts deleted file mode 100644 index 699c4b9b7b..0000000000 --- a/zephyr/projects/corsola/kingler/i2c.dts +++ /dev/null @@ -1,38 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - aliases { - i2c-0 = &i2c0_0; - i2c-1 = &i2c1_0; - i2c-2 = &i2c2_0; - i2c-3 = &i2c3_0; - i2c-4 = &i2c4_1; - i2c-5 = &i2c5_0; - i2c-7 = &i2c7_0; - }; - - named-i2c-ports { - compatible = "named-i2c-ports"; - - battery { - i2c-port = <&i2c2_0>; - remote-port = <0>; - enum-name = "I2C_PORT_BATTERY"; - label = "BATTERY"; - }; - }; - - -}; - -&i2c2_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_STANDARD>; -}; - -&i2c_ctrl2 { - status = "okay"; -}; diff --git a/zephyr/projects/corsola/kingler/include/gpio_map.h b/zephyr/projects/corsola/kingler/include/gpio_map.h deleted file mode 100644 index 025bb78743..0000000000 --- a/zephyr/projects/corsola/kingler/include/gpio_map.h +++ /dev/null @@ -1,29 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#include <devicetree.h> -#include <gpio_signal.h> - -/* - * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items. - * - * Each GPIO_INT requires three parameters: - * gpio_signal - The enum gpio_signal for the interrupt gpio - * interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH) - * handler - The platform/ec interrupt handler. - * - * Ensure that this files includes all necessary headers to declare all - * referenced handler functions. - * - * For example, one could use the follow definition: - * #define EC_CROS_GPIO_INTERRUPTS \ - * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print) - */ -#define EC_CROS_GPIO_INTERRUPTS - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/corsola/krabby/BUILD.py b/zephyr/projects/corsola/krabby/BUILD.py deleted file mode 100644 index e533544d8c..0000000000 --- a/zephyr/projects/corsola/krabby/BUILD.py +++ /dev/null @@ -1,16 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -register_binman_project( - project_name="krabby", - zephyr_board="it8xxx2", - dts_overlays=[ - "adc.dts", - "battery.dts", - "gpio.dts", - "i2c.dts", - "motionsense.dts", - "pwm.dts", - ], -) diff --git a/zephyr/projects/corsola/krabby/CMakeLists.txt b/zephyr/projects/corsola/krabby/CMakeLists.txt deleted file mode 100644 index dd59e4e2fb..0000000000 --- a/zephyr/projects/corsola/krabby/CMakeLists.txt +++ /dev/null @@ -1,33 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -cmake_minimum_required(VERSION 3.13.1) -add_compile_definitions(BOARD_KRABBY) - -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) -project(krabby) - -zephyr_library_include_directories(include) - -set(PLATFORM_EC_BASEBOARD "${PLATFORM_EC}/baseboard/corsola" CACHE PATH - "Path to the platform/ec baseboard directory") -set(PLATFORM_EC_BOARD "${PLATFORM_EC}/board/krabby" CACHE PATH - "Path to the platform/ec board directory") - -# Include selected EC source from the baseboard -zephyr_library_sources( - "${PLATFORM_EC_BASEBOARD}/board_chipset.c" - "${PLATFORM_EC_BASEBOARD}/board_id.c" - "${PLATFORM_EC_BASEBOARD}/hibernate.c" - "${PLATFORM_EC_BASEBOARD}/regulator.c" - "${PLATFORM_EC_BASEBOARD}/usbc_config.c" - "${PLATFORM_EC_BASEBOARD}/usb_pd_policy.c") - -# Include selected EC source from the board -zephyr_library_sources( - "${PLATFORM_EC_BOARD}/hooks.c" - "${PLATFORM_EC_BOARD}/led.c") - -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C - "src/i2c.c") diff --git a/zephyr/projects/corsola/krabby/include/gpio_map.h b/zephyr/projects/corsola/krabby/include/gpio_map.h deleted file mode 100644 index 9122c85ffc..0000000000 --- a/zephyr/projects/corsola/krabby/include/gpio_map.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#include <devicetree.h> -#include <gpio_signal.h> - -#define GPIO_ENTERING_RW GPIO_UNIMPLEMENTED -#define GPIO_WP_L GPIO_UNIMPLEMENTED - -#ifdef CONFIG_PLATFORM_EC_GMR_TABLET_MODE -#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L -#endif - -/* TODO: remove after icm426xx driver added */ -static inline void motion_interrupt(enum gpio_signal signal) -{ -} - -/* - * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items. - * - * Each GPIO_INT requires three parameters: - * gpio_signal - The enum gpio_signal for the interrupt gpio - * interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH) - * handler - The platform/ec interrupt handler. - * - * Ensure that this files includes all necessary headers to declare all - * referenced handler functions. - * - * For example, one could use the follow definition: - * #define EC_CROS_GPIO_INTERRUPTS \ - * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print) - */ -#define EC_CROS_GPIO_INTERRUPTS \ - GPIO_INT(GPIO_POWER_BUTTON_L, \ - GPIO_INT_EDGE_BOTH, power_button_interrupt) \ - GPIO_INT(GPIO_LID_OPEN, \ - GPIO_INT_EDGE_BOTH, lid_interrupt) \ - GPIO_INT(GPIO_TABLET_MODE_L, \ - GPIO_INT_EDGE_BOTH, gmr_tablet_switch_isr) \ - GPIO_INT(GPIO_AP_EC_WARM_RST_REQ, \ - GPIO_INT_EDGE_RISING, chipset_reset_request_interrupt) \ - GPIO_INT(GPIO_AP_IN_SLEEP_L, \ - GPIO_INT_EDGE_BOTH, power_signal_interrupt) \ - GPIO_INT(GPIO_BASE_IMU_INT_L, \ - GPIO_INT_EDGE_FALLING, motion_interrupt) \ - GPIO_INT(GPIO_LID_ACCEL_INT_L, \ - GPIO_INT_EDGE_FALLING, lis2dw12_interrupt) \ - GPIO_INT(GPIO_VOLUME_DOWN_L, \ - GPIO_INT_EDGE_BOTH, button_interrupt) \ - GPIO_INT(GPIO_VOLUME_UP_L, \ - GPIO_INT_EDGE_BOTH, button_interrupt) \ - GPIO_INT(GPIO_AP_XHCI_INIT_DONE, \ - GPIO_INT_EDGE_BOTH, usb_a0_interrupt) \ - GPIO_INT(GPIO_AC_PRESENT, \ - GPIO_INT_EDGE_BOTH, extpower_interrupt) \ - GPIO_INT(GPIO_WP, \ - GPIO_INT_EDGE_BOTH, switch_interrupt) \ - GPIO_INT(GPIO_SPI0_CS, \ - GPIO_INT_EDGE_FALLING, spi_event) \ - GPIO_INT(GPIO_X_EC_GPIO2, \ - GPIO_INT_EDGE_BOTH, x_ec_interrupt) - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/corsola/krabby/motionsense.dts b/zephyr/projects/corsola/motionsense_krabby.dts index 00434e6be9..00434e6be9 100644 --- a/zephyr/projects/corsola/krabby/motionsense.dts +++ b/zephyr/projects/corsola/motionsense_krabby.dts diff --git a/zephyr/projects/corsola/kingler/CMakeLists.txt b/zephyr/projects/corsola/prj.conf index 33e56afc0e..80f1d03d96 100644 --- a/zephyr/projects/corsola/kingler/CMakeLists.txt +++ b/zephyr/projects/corsola/prj.conf @@ -1,10 +1,3 @@ # Copyright 2021 The Chromium OS Authors. All rights reserved. # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. - -cmake_minimum_required(VERSION 3.13.1) - -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) -project(kingler) - -zephyr_library_include_directories(include) diff --git a/zephyr/projects/corsola/kingler/prj.conf b/zephyr/projects/corsola/prj_kingler.conf index d09697de5d..71f6c5a853 100644 --- a/zephyr/projects/corsola/kingler/prj.conf +++ b/zephyr/projects/corsola/prj_kingler.conf @@ -2,51 +2,44 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. +# Cros EC CONFIG_CROS_EC=y CONFIG_PLATFORM_EC=y CONFIG_SHIMMED_TASKS=y -CONFIG_ESPI=y +CONFIG_PLATFORM_EC_SWITCH=n + +# Variant config +CONFIG_BOARD_KINGLER=y +CONFIG_VARIANT_CORSOLA_DB_DETECTION=n +CONFIG_VARIANT_CORSOLA_USBA=n # Shell features +CONFIG_KERNEL_SHELL=y CONFIG_SHELL_HELP=y CONFIG_SHELL_HISTORY=y -CONFIG_SHELL_TAB_AUTOCOMPLETION=y -CONFIG_KERNEL_SHELL=y + +# Bring up options +CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y CONFIG_PLATFORM_EC_VBOOT_EFS2=n # Power sequencing -CONFIG_AP=y +CONFIG_AP=n # Power button -CONFIG_PLATFORM_EC_POWER_BUTTON=y +CONFIG_PLATFORM_EC_POWER_BUTTON=n # External power -CONFIG_PLATFORM_EC_HOSTCMD=y -CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y CONFIG_PLATFORM_EC_BACKLIGHT_LID=n -# Lid switch -CONFIG_PLATFORM_EC_LID_SWITCH=y - # Keyboard -CONFIG_PLATFORM_EC_KEYBOARD=y -CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y -CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y +CONFIG_PLATFORM_EC_KEYBOARD=n +CONFIG_CROS_KB_RAW_NPCX=n CONFIG_SYSCON=y -# Battery -CONFIG_PLATFORM_EC_BATTERY=y -CONFIG_PLATFORM_EC_BATTERY_SMART=y -CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y -CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=n -CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y - CONFIG_PLATFORM_EC_CHARGER=n CONFIG_PLATFORM_EC_USBC=n -# This is not yet supported -CONFIG_PLATFORM_EC_ADC=n CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=n CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n diff --git a/zephyr/projects/corsola/krabby/prj.conf b/zephyr/projects/corsola/prj_krabby.conf index ad86923679..c034209c7f 100644 --- a/zephyr/projects/corsola/krabby/prj.conf +++ b/zephyr/projects/corsola/prj_krabby.conf @@ -6,6 +6,8 @@ CONFIG_CROS_EC=y CONFIG_PLATFORM_EC=y CONFIG_SHIMMED_TASKS=y +CONFIG_BOARD_KRABBY=y + # Bring up options CONFIG_KERNEL_SHELL=y CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y @@ -42,7 +44,6 @@ CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=y CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON=y CONFIG_PLATFORM_EC_CONSOLE_CMD_SYSINFO=y -CONFIG_PLATFORM_EC_HOSTCMD_REGULATOR=y CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y # LED @@ -85,7 +86,6 @@ CONFIG_PLATFORM_EC_USB_A_PORT_COUNT=1 # USB-C CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y -CONFIG_PLATFORM_EC_BC12_DETECT_MT6360=y CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n CONFIG_PLATFORM_EC_SMBUS_PEC=y CONFIG_PLATFORM_EC_USBC_PPC_DEDICATED_INT=y diff --git a/zephyr/projects/corsola/krabby/pwm.dts b/zephyr/projects/corsola/pwm_krabby.dts index f86448cc8e..f86448cc8e 100644 --- a/zephyr/projects/corsola/krabby/pwm.dts +++ b/zephyr/projects/corsola/pwm_krabby.dts diff --git a/baseboard/corsola/board_chipset.c b/zephyr/projects/corsola/src/board_chipset.c index 7e06a49792..7e06a49792 100644 --- a/baseboard/corsola/board_chipset.c +++ b/zephyr/projects/corsola/src/board_chipset.c diff --git a/baseboard/corsola/hibernate.c b/zephyr/projects/corsola/src/hibernate.c index c3752358bf..c3752358bf 100644 --- a/baseboard/corsola/hibernate.c +++ b/zephyr/projects/corsola/src/hibernate.c diff --git a/board/kingler/battery.c b/zephyr/projects/corsola/src/krabby/battery.c index f07c38e1b8..f07c38e1b8 100644 --- a/board/kingler/battery.c +++ b/zephyr/projects/corsola/src/krabby/battery.c diff --git a/board/krabby/board.c b/zephyr/projects/corsola/src/krabby/board.c index 1e81aed838..1e81aed838 100644 --- a/board/krabby/board.c +++ b/zephyr/projects/corsola/src/krabby/board.c diff --git a/board/krabby/hooks.c b/zephyr/projects/corsola/src/krabby/hooks.c index cea6667650..cea6667650 100644 --- a/board/krabby/hooks.c +++ b/zephyr/projects/corsola/src/krabby/hooks.c diff --git a/zephyr/projects/corsola/krabby/src/i2c.c b/zephyr/projects/corsola/src/krabby/i2c.c index 12f626847c..12f626847c 100644 --- a/zephyr/projects/corsola/krabby/src/i2c.c +++ b/zephyr/projects/corsola/src/krabby/i2c.c diff --git a/board/kingler/led.c b/zephyr/projects/corsola/src/krabby/led.c index 1d3108c47b..d07ec46004 100644 --- a/board/kingler/led.c +++ b/zephyr/projects/corsola/src/krabby/led.c @@ -8,7 +8,6 @@ #include "led_common.h" #include "led_onoff_states.h" #include "chipset.h" -#include "driver/bc12/mt6360.h" __override const int led_charge_lvl_1 = 5; __override const int led_charge_lvl_2 = 95; @@ -49,42 +48,14 @@ const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); __override void led_set_color_battery(enum ec_led_colors color) { - mt6360_led_set_brightness(MT6360_LED_RGB2, 50); - mt6360_led_set_brightness(MT6360_LED_RGB3, 50); - - switch (color) { - case EC_LED_COLOR_AMBER: - mt6360_led_enable(MT6360_LED_RGB2, 0); - mt6360_led_enable(MT6360_LED_RGB3, 1); - break; - case EC_LED_COLOR_WHITE: - mt6360_led_enable(MT6360_LED_RGB2, 1); - mt6360_led_enable(MT6360_LED_RGB3, 0); - break; - default: /* LED_OFF and other unsupported colors */ - mt6360_led_enable(MT6360_LED_RGB2, 0); - mt6360_led_enable(MT6360_LED_RGB3, 0); - break; - } } __override void led_set_color_power(enum ec_led_colors color) { - mt6360_led_set_brightness(MT6360_LED_RGB1, 1); - mt6360_led_enable(MT6360_LED_RGB1, color == EC_LED_COLOR_WHITE); } void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) { - if (led_id == EC_LED_ID_BATTERY_LED) { - brightness_range[EC_LED_COLOR_AMBER] = - MT6360_LED_BRIGHTNESS_MAX; - brightness_range[EC_LED_COLOR_WHITE] = - MT6360_LED_BRIGHTNESS_MAX; - } else if (led_id == EC_LED_ID_POWER_LED) { - brightness_range[EC_LED_COLOR_WHITE] = - MT6360_LED_BRIGHTNESS_MAX; - } } int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) diff --git a/baseboard/corsola/usbc_config.c b/zephyr/projects/corsola/src/krabby/usbc_config.c index 30859fdc0d..2b5ec7204a 100644 --- a/baseboard/corsola/usbc_config.c +++ b/zephyr/projects/corsola/src/krabby/usbc_config.c @@ -3,44 +3,29 @@ * found in the LICENSE file. */ -/* Corsola baseboard-specific USB-C configuration */ +/* Krabby board-specific USB-C configuration */ #include "adc.h" -#include "baseboard_common.h" +#include "baseboard_usbc_config.h" #include "bc12/pi3usb9201_public.h" -#include "bc12/mt6360_public.h" -#include "button.h" +#include "charge_manager.h" #include "charger.h" -#include "charge_state_v2.h" #include "charger/isl923x_public.h" #include "console.h" -#include "ec_commands.h" -#include "extpower.h" -#include "gpio.h" +#include "driver/tcpm/it83xx_pd.h" +#include "driver/usb_mux/ps8743.h" #include "hooks.h" -#include "i2c.h" -#include "lid_switch.h" -#include "task.h" #include "ppc/syv682x_public.h" -#include "power.h" -#include "power_button.h" -#include "spi.h" -#include "switch.h" -#include "tablet_mode.h" -#include "tcpm/it8xxx2_pd_public.h" -#include "uart.h" -#include "usbc_ppc.h" -#include "usb_charge.h" -#include "usb_mux.h" -#include "usb_mux/ps8743_public.h" #include "usb_mux/it5205_public.h" -#include "usb_pd_tcpm.h" #include "usbc_ppc.h" +#include "variant_db_detection.h" + #define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) #define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) #define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) +/* charger */ const struct charger_config_t chg_chips[] = { { .i2c_port = I2C_PORT_CHARGER, @@ -49,69 +34,14 @@ const struct charger_config_t chg_chips[] = { }, }; -/* Baseboard */ - -static void baseboard_init(void) -{ - gpio_enable_interrupt(GPIO_USB_C0_PPC_BC12_INT_ODL); - gpio_enable_interrupt(GPIO_AP_XHCI_INIT_DONE); -} -DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_DEFAULT-1); - -/* Sub-board */ - -enum board_sub_board board_get_sub_board(void) -{ - static enum board_sub_board sub = SUB_BOARD_NONE; - - if (sub != SUB_BOARD_NONE) - return sub; - - /* HDMI board has external pull high. */ - if (gpio_get_level(GPIO_EC_X_GPIO3)) { - sub = SUB_BOARD_HDMI; - /* Only has 1 PPC with HDMI subboard */ - ppc_cnt = 1; - /* EC_X_GPIO1 */ - gpio_set_flags(GPIO_EN_HDMI_PWR, GPIO_OUT_HIGH); - /* X_EC_GPIO2 */ - gpio_set_flags(GPIO_PS185_EC_DP_HPD, GPIO_INT_BOTH); - /* EC_X_GPIO3 */ - gpio_set_flags(GPIO_PS185_PWRDN_ODL, GPIO_ODR_HIGH); - } else { - sub = SUB_BOARD_TYPEC; - /* EC_X_GPIO1 */ - gpio_set_flags(GPIO_USB_C1_FRS_EN, GPIO_OUT_LOW); - /* X_EC_GPIO2 */ - gpio_set_flags(GPIO_USB_C1_PPC_INT_ODL, - GPIO_INT_BOTH | GPIO_PULL_UP); - /* EC_X_GPIO3 */ - gpio_set_flags(GPIO_USB_C1_DP_IN_HPD, GPIO_OUT_LOW); +const struct pi3usb9201_config_t + pi3usb9201_bc12_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { + /* [0]: unused */ + [1] = { + .i2c_port = I2C_PORT_PPC1, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, } - - CPRINTS("Detect %s SUB", sub == SUB_BOARD_HDMI ? "HDMI" : "TYPEC"); - return sub; -} - -static void sub_board_init(void) -{ - board_get_sub_board(); -} -DECLARE_HOOK(HOOK_INIT, sub_board_init, HOOK_PRIO_INIT_I2C - 1); - -/* Detect subboard */ -static void board_tcpc_init(void) -{ - /* C1: GPIO_USB_C1_PPC_INT_ODL & HDMI: GPIO_PS185_EC_DP_HPD */ - gpio_enable_interrupt(GPIO_X_EC_GPIO2); - - /* If this is not a Type-C subboard, disable the task. */ - if (board_get_sub_board() != SUB_BOARD_TYPEC) - task_disable_task(TASK_ID_PD_C1); -} -/* Must be done after I2C and subboard */ -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); - +}; /* PPC */ struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { { @@ -129,23 +59,8 @@ struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { }; unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); -/* BC12 */ -const struct mt6360_config_t mt6360_config = { - .i2c_port = I2C_PORT_POWER, - .i2c_addr_flags = MT6360_PMU_I2C_ADDR_FLAGS, -}; - -const struct pi3usb9201_config_t - pi3usb9201_bc12_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { - /* [0]: unused */ - [1] = { - .i2c_port = I2C_PORT_PPC1, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - } -}; - struct bc12_config bc12_ports[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { .drv = &mt6360_drv }, + { .drv = NULL }, { .drv = &pi3usb9201_drv }, }; @@ -154,9 +69,10 @@ void bc12_interrupt(enum gpio_signal signal) task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); } + static void board_sub_bc12_init(void) { - if (board_get_sub_board() == SUB_BOARD_TYPEC) + if (corsola_get_db_type() == CORSOLA_DB_TYPEC) gpio_enable_interrupt(GPIO_USB_C1_BC12_CHARGER_INT_ODL); else /* If this is not a Type-C subboard, disable the task. */ @@ -165,91 +81,11 @@ static void board_sub_bc12_init(void) /* Must be done after I2C and subboard */ DECLARE_HOOK(HOOK_INIT, board_sub_bc12_init, HOOK_PRIO_INIT_I2C + 1); -__override uint8_t board_get_usb_pd_port_count(void) -{ - if (board_get_sub_board() == SUB_BOARD_TYPEC) - return CONFIG_USB_PD_PORT_MAX_COUNT; - else - return CONFIG_USB_PD_PORT_MAX_COUNT - 1; -} - -/* USB-A */ -const int usb_port_enable[] = { - GPIO_EN_PP5000_USB_A0_VBUS, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); - -void usb_a0_interrupt(enum gpio_signal signal) -{ - enum usb_charge_mode mode = gpio_get_level(signal) ? - USB_CHARGE_MODE_ENABLED : USB_CHARGE_MODE_DISABLED; - - for (int i = 0; i < USB_PORT_COUNT; i++) - usb_charge_set_mode(i, mode, USB_ALLOW_SUSPEND_CHARGE); -} - -static int board_ps8743_mux_set(const struct usb_mux *me, - mux_state_t mux_state) -{ - int rv = EC_SUCCESS; - int reg = 0; - - rv = ps8743_read(me, PS8743_REG_MODE, ®); - if (rv) - return rv; - - /* Disable FLIP pin, enable I2C control. */ - reg |= PS8743_MODE_FLIP_REG_CONTROL; - /* Disable CE_USB pin, enable I2C control. */ - reg |= PS8743_MODE_USB_REG_CONTROL; - /* Disable CE_DP pin, enable I2C control. */ - reg |= PS8743_MODE_DP_REG_CONTROL; - - /* - * DP specific config - * - * Enable/Disable IN_HPD on the DB. - */ - gpio_set_level(GPIO_USB_C1_DP_IN_HPD, - mux_state & USB_PD_MUX_DP_ENABLED); - - return ps8743_write(me, PS8743_REG_MODE, reg); -} - -const struct usb_mux usbc0_virtual_mux = { - .usb_port = 0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; - -const struct usb_mux usbc1_virtual_mux = { - .usb_port = 1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; - -const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .usb_port = 0, - .i2c_port = I2C_PORT_USB_MUX0, - .i2c_addr_flags = IT5205_I2C_ADDR1_FLAGS, - .driver = &it5205_usb_mux_driver, - .next_mux = &usbc0_virtual_mux, - }, - { - .usb_port = 1, - .i2c_port = I2C_PORT_USB_MUX1, - .i2c_addr_flags = PS8743_I2C_ADDR0_FLAG, - .driver = &ps8743_usb_mux_driver, - .next_mux = &usbc1_virtual_mux, - .board_set = &board_ps8743_mux_set, - }, -}; - -void board_overcurrent_event(int port, int is_overcurrented) +static void board_usbc_init(void) { - /* TODO: check correct operation for Corsola */ + gpio_enable_interrupt(GPIO_USB_C0_PPC_BC12_INT_ODL); } +DECLARE_HOOK(HOOK_INIT, board_usbc_init, HOOK_PRIO_DEFAULT-1); /* TCPC */ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { @@ -269,6 +105,57 @@ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { }, }; +void board_usb_mux_init(void) +{ + if (corsola_get_db_type() == CORSOLA_DB_TYPEC) { + ps8743_tune_usb_eq(&usb_muxes[1], + PS8743_USB_EQ_TX_12_8_DB, + PS8743_USB_EQ_RX_12_8_DB); + ps8743_write(&usb_muxes[1], + PS8743_REG_HS_DET_THRESHOLD, + PS8743_USB_HS_THRESH_NEG_10); + } +} +DECLARE_HOOK(HOOK_INIT, board_usb_mux_init, HOOK_PRIO_INIT_I2C + 1); + +void ppc_interrupt(enum gpio_signal signal) +{ + if (signal == GPIO_USB_C1_PPC_INT_ODL) + syv682x_interrupt(1); +} + +int ppc_get_alert_status(int port) +{ + if (port == 0) + return gpio_get_level(GPIO_USB_C0_PPC_BC12_INT_ODL) == 0; + if (port == 1 && corsola_get_db_type() == CORSOLA_DB_TYPEC) + return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; + + return 0; +} + +const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) +{ + const static struct cc_para_t + cc_parameter[CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT] = { + { + .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + { + .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + }; + + return &cc_parameter[port]; +} + +void board_overcurrent_event(int port, int is_overcurrented) +{ + /* TODO: check correct operation for Corsola */ +} + uint16_t tcpc_get_alert_status(void) { /* @@ -286,27 +173,10 @@ void board_reset_pd_mcu(void) */ } -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - charge_set_input_current_limit( - MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); -} - -void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) -{ - /* - * We ignore the cc_pin and PPC vconn because polarity and PPC vconn - * should already be set correctly in the PPC driver via the pd - * state machine. - */ -} - int board_set_active_charge_port(int port) { int i; - int is_valid_port = port == 0 || (port == 1 && board_get_sub_board() == - SUB_BOARD_TYPEC); + int is_valid_port = (port >= 0 && port < board_get_usb_pd_port_count()); if (!is_valid_port && port != CHARGE_PORT_NONE) return EC_ERROR_INVAL; @@ -356,57 +226,64 @@ int board_set_active_charge_port(int port) return EC_SUCCESS; } -/** - * Handle PS185 HPD changing state. - */ -int debounced_hpd; - -static void ps185_hdmi_hpd_deferred(void) -{ - const int new_hpd = gpio_get_level(GPIO_PS185_EC_DP_HPD); - - /* HPD status not changed, probably a glitch, just return. */ - if (debounced_hpd == new_hpd) - return; - - debounced_hpd = new_hpd; - - gpio_set_level(GPIO_EC_AP_DP_HPD_ODL, !debounced_hpd); - CPRINTS(debounced_hpd ? "HDMI plug" : "HDMI unplug"); -} -DECLARE_DEFERRED(ps185_hdmi_hpd_deferred); +const struct usb_mux usbc0_virtual_mux = { + .usb_port = 0, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, +}; -#define PS185_HPD_DEBOUCE 250 +const struct usb_mux usbc1_virtual_mux = { + .usb_port = 1, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, +}; -static void hdmi_hpd_interrupt(enum gpio_signal signal) +static int board_ps8743_mux_set(const struct usb_mux *me, + mux_state_t mux_state) { - hook_call_deferred(&ps185_hdmi_hpd_deferred_data, PS185_HPD_DEBOUCE); -} + int rv = EC_SUCCESS; + int reg = 0; -/* HDMI/TYPE-C function shared subboard interrupt */ -void x_ec_interrupt(enum gpio_signal signal) -{ - int sub = board_get_sub_board(); + rv = ps8743_read(me, PS8743_REG_MODE, ®); + if (rv) + return rv; - if (sub == SUB_BOARD_TYPEC) - /* C1: PPC interrupt */ - syv682x_interrupt(1); - else if (sub == SUB_BOARD_HDMI) - hdmi_hpd_interrupt(signal); - else - CPRINTS("Undetected subboard interrupt."); -} + /* Disable FLIP pin, enable I2C control. */ + reg |= PS8743_MODE_FLIP_REG_CONTROL; + /* Disable CE_USB pin, enable I2C control. */ + reg |= PS8743_MODE_USB_REG_CONTROL; + /* Disable CE_DP pin, enable I2C control. */ + reg |= PS8743_MODE_DP_REG_CONTROL; -int ppc_get_alert_status(int port) -{ - if (port == 0) - return gpio_get_level(GPIO_USB_C0_PPC_BC12_INT_ODL) == 0; - if (port == 1 && board_get_sub_board() == SUB_BOARD_TYPEC) - return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; + /* + * DP specific config + * + * Enable/Disable IN_HPD on the DB. + */ + gpio_set_level(GPIO_USB_C1_DP_IN_HPD, + mux_state & USB_PD_MUX_DP_ENABLED); - return 0; + return ps8743_write(me, PS8743_REG_MODE, reg); } +const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .usb_port = 0, + .i2c_port = I2C_PORT_USB_MUX0, + .i2c_addr_flags = IT5205_I2C_ADDR1_FLAGS, + .driver = &it5205_usb_mux_driver, + .next_mux = &usbc0_virtual_mux, + }, + { + .usb_port = 1, + .i2c_port = I2C_PORT_USB_MUX1, + .i2c_addr_flags = PS8743_I2C_ADDR0_FLAG, + .driver = &ps8743_usb_mux_driver, + .next_mux = &usbc1_virtual_mux, + .board_set = &board_ps8743_mux_set, + }, +}; + #ifdef CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT enum adc_channel board_get_vbus_adc(int port) { diff --git a/baseboard/corsola/regulator.c b/zephyr/projects/corsola/src/regulator.c index 35670bda82..35670bda82 100644 --- a/baseboard/corsola/regulator.c +++ b/zephyr/projects/corsola/src/regulator.c diff --git a/baseboard/corsola/usb_pd_policy.c b/zephyr/projects/corsola/src/usb_pd_policy.c index d0c576a398..a30c5e2fe3 100644 --- a/baseboard/corsola/usb_pd_policy.c +++ b/zephyr/projects/corsola/src/usb_pd_policy.c @@ -2,9 +2,9 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ + #include "adc.h" #include "atomic.h" -#include "baseboard_common.h" #include "charge_manager.h" #include "chipset.h" #include "timer.h" diff --git a/zephyr/projects/corsola/src/usbc_config.c b/zephyr/projects/corsola/src/usbc_config.c new file mode 100644 index 0000000000..c4917b252d --- /dev/null +++ b/zephyr/projects/corsola/src/usbc_config.c @@ -0,0 +1,135 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Corsola baseboard-specific USB-C configuration */ + +#include "adc.h" +#include "baseboard_usbc_config.h" +#include "button.h" +#include "charger.h" +#include "charge_state_v2.h" +#include "console.h" +#include "ec_commands.h" +#include "extpower.h" +#include "gpio.h" +#include "hooks.h" +#include "i2c.h" +#include "lid_switch.h" +#include "task.h" +#include "ppc/syv682x_public.h" +#include "power.h" +#include "power_button.h" +#include "spi.h" +#include "switch.h" +#include "tablet_mode.h" +#include "uart.h" +#include "usb_charge.h" +#include "usb_mux.h" +#include "usb_pd_tcpm.h" +#include "usbc_ppc.h" + +#include "variant_db_detection.h" + +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) + +/* Baseboard */ +static void baseboard_init(void) +{ + gpio_enable_interrupt(GPIO_AP_XHCI_INIT_DONE); +} +DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_DEFAULT-1); + +static void board_tcpc_init(void) +{ + /* C1: GPIO_USB_C1_PPC_INT_ODL & HDMI: GPIO_PS185_EC_DP_HPD */ + gpio_enable_interrupt(GPIO_X_EC_GPIO2); + + /* If this is not a Type-C subboard, disable the task. */ + if (corsola_get_db_type() != CORSOLA_DB_TYPEC) + task_disable_task(TASK_ID_PD_C1); +} +/* Must be done after I2C and subboard */ +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); + +__override uint8_t board_get_usb_pd_port_count(void) +{ + if (corsola_get_db_type() == CORSOLA_DB_TYPEC) + return CONFIG_USB_PD_PORT_MAX_COUNT; + else + return CONFIG_USB_PD_PORT_MAX_COUNT - 1; +} + +/* USB-A */ +const int usb_port_enable[] = { + GPIO_EN_PP5000_USB_A0_VBUS, +}; +BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); + +void usb_a0_interrupt(enum gpio_signal signal) +{ + enum usb_charge_mode mode = gpio_get_level(signal) ? + USB_CHARGE_MODE_ENABLED : USB_CHARGE_MODE_DISABLED; + + for (int i = 0; i < USB_PORT_COUNT; i++) + usb_charge_set_mode(i, mode, USB_ALLOW_SUSPEND_CHARGE); +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); +} + +void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) +{ + /* + * We ignore the cc_pin and PPC vconn because polarity and PPC vconn + * should already be set correctly in the PPC driver via the pd + * state machine. + */ +} + +/** + * Handle PS185 HPD changing state. + */ +int debounced_hpd; + +static void ps185_hdmi_hpd_deferred(void) +{ + const int new_hpd = gpio_get_level(GPIO_PS185_EC_DP_HPD); + + /* HPD status not changed, probably a glitch, just return. */ + if (debounced_hpd == new_hpd) + return; + + debounced_hpd = new_hpd; + + gpio_set_level(GPIO_EC_AP_DP_HPD_ODL, !debounced_hpd); + CPRINTS(debounced_hpd ? "HDMI plug" : "HDMI unplug"); +} +DECLARE_DEFERRED(ps185_hdmi_hpd_deferred); + +#define PS185_HPD_DEBOUCE 250 + +static void hdmi_hpd_interrupt(enum gpio_signal signal) +{ + hook_call_deferred(&ps185_hdmi_hpd_deferred_data, PS185_HPD_DEBOUCE); +} + +/* HDMI/TYPE-C function shared subboard interrupt */ +void x_ec_interrupt(enum gpio_signal signal) +{ + int sub = corsola_get_db_type(); + + if (sub == CORSOLA_DB_TYPEC) + /* C1: PPC interrupt */ + ppc_interrupt(signal); + else if (sub == CORSOLA_DB_HDMI) + hdmi_hpd_interrupt(signal); + else + CPRINTS("Undetected subboard interrupt."); +} diff --git a/zephyr/projects/corsola/src/variant_db_detection.c b/zephyr/projects/corsola/src/variant_db_detection.c new file mode 100644 index 0000000000..340d54a196 --- /dev/null +++ b/zephyr/projects/corsola/src/variant_db_detection.c @@ -0,0 +1,65 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Corsola daughter board detection */ + +#include "console.h" +#include "gpio.h" +#include "hooks.h" + +#include "variant_db_detection.h" + +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) + +static void corsola_db_config(enum corsola_db_type type) +{ + switch (type) { + case CORSOLA_DB_HDMI: + /* EC_X_GPIO1 */ + gpio_set_flags(GPIO_EN_HDMI_PWR, GPIO_OUT_HIGH); + /* X_EC_GPIO2 */ + gpio_set_flags(GPIO_PS185_EC_DP_HPD, GPIO_INT_BOTH); + /* EC_X_GPIO3 */ + gpio_set_flags(GPIO_PS185_PWRDN_ODL, GPIO_ODR_HIGH); + return; + case CORSOLA_DB_TYPEC: + /* EC_X_GPIO1 */ + gpio_set_flags(GPIO_USB_C1_FRS_EN, GPIO_OUT_LOW); + /* X_EC_GPIO2 */ + gpio_set_flags(GPIO_USB_C1_PPC_INT_ODL, + GPIO_INT_BOTH | GPIO_PULL_UP); + /* EC_X_GPIO3 */ + gpio_set_flags(GPIO_USB_C1_DP_IN_HPD, GPIO_OUT_LOW); + return; + default: + break; + + } +} + +enum corsola_db_type corsola_get_db_type(void) +{ + static enum corsola_db_type db = CORSOLA_DB_NONE; + + if (db != CORSOLA_DB_NONE) + return db; + + if (!gpio_get_level(GPIO_HDMI_PRSNT_ODL)) + db = CORSOLA_DB_HDMI; + else + db = CORSOLA_DB_TYPEC; + + corsola_db_config(db); + + CPRINTS("Detect %s DB", db == CORSOLA_DB_HDMI ? "HDMI" : "TYPEC"); + return db; +} + +static void corsola_db_init(void) +{ + corsola_get_db_type(); +} +DECLARE_HOOK(HOOK_INIT, corsola_db_init, HOOK_PRIO_INIT_I2C - 1); diff --git a/zephyr/projects/guybrush/BUILD.py b/zephyr/projects/guybrush/BUILD.py deleted file mode 100644 index 03f3abe37f..0000000000 --- a/zephyr/projects/guybrush/BUILD.py +++ /dev/null @@ -1,9 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -register_npcx_project( - project_name="guybrush", - zephyr_board="npcx9", - dts_overlays=["battery.dts", "fan.dts", "gpio.dts", "i2c.dts", "pwm.dts"], -) diff --git a/zephyr/projects/skyrim/BUILD.py b/zephyr/projects/skyrim/BUILD.py new file mode 100644 index 0000000000..05e9c5279d --- /dev/null +++ b/zephyr/projects/skyrim/BUILD.py @@ -0,0 +1,29 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + + +def register_variant(project_name): + register_npcx_project( + project_name=project_name, + zephyr_board="npcx9", + dts_overlays=[ + # Common to all projects. + here / "battery.dts", + here / "fan.dts", + here / "gpio.dts", + here / "i2c.dts", + here / "pwm.dts", + # Project-specific DTS customizations. + here / f"{project_name}.dts", + ], + kconfig_files=[ + here / f"prj_{project_name}.conf", + ], + ) + + +register_variant(project_name="skyrim") + +# TODO: Deprecate guybrush build after skyrim hardware is readily available. +register_variant(project_name="guybrush") diff --git a/zephyr/projects/guybrush/CMakeLists.txt b/zephyr/projects/skyrim/CMakeLists.txt index 30e8b8c611..30e8b8c611 100644 --- a/zephyr/projects/guybrush/CMakeLists.txt +++ b/zephyr/projects/skyrim/CMakeLists.txt diff --git a/zephyr/projects/guybrush/battery.dts b/zephyr/projects/skyrim/battery.dts index 02a6d0d3b9..02a6d0d3b9 100644 --- a/zephyr/projects/guybrush/battery.dts +++ b/zephyr/projects/skyrim/battery.dts diff --git a/zephyr/projects/guybrush/fan.dts b/zephyr/projects/skyrim/fan.dts index 7ab15229e1..7ab15229e1 100644 --- a/zephyr/projects/guybrush/fan.dts +++ b/zephyr/projects/skyrim/fan.dts diff --git a/zephyr/projects/guybrush/gpio.dts b/zephyr/projects/skyrim/gpio.dts index 8781885759..8781885759 100644 --- a/zephyr/projects/guybrush/gpio.dts +++ b/zephyr/projects/skyrim/gpio.dts diff --git a/zephyr/projects/skyrim/guybrush.dts b/zephyr/projects/skyrim/guybrush.dts new file mode 100644 index 0000000000..46072fd703 --- /dev/null +++ b/zephyr/projects/skyrim/guybrush.dts @@ -0,0 +1,10 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + named-gpios { + /* Guybrush-specific GPIO customizations can be made here */ + }; +}; diff --git a/zephyr/projects/guybrush/i2c.dts b/zephyr/projects/skyrim/i2c.dts index 7b4c0753bc..7b4c0753bc 100644 --- a/zephyr/projects/guybrush/i2c.dts +++ b/zephyr/projects/skyrim/i2c.dts diff --git a/zephyr/projects/guybrush/include/gpio_map.h b/zephyr/projects/skyrim/include/gpio_map.h index 77abf0919a..77abf0919a 100644 --- a/zephyr/projects/guybrush/include/gpio_map.h +++ b/zephyr/projects/skyrim/include/gpio_map.h diff --git a/zephyr/projects/guybrush/led.c b/zephyr/projects/skyrim/led.c index 6a2a2e4609..6a2a2e4609 100644 --- a/zephyr/projects/guybrush/led.c +++ b/zephyr/projects/skyrim/led.c diff --git a/zephyr/projects/guybrush/power_signals.c b/zephyr/projects/skyrim/power_signals.c index eb27ea6c14..eb27ea6c14 100644 --- a/zephyr/projects/guybrush/power_signals.c +++ b/zephyr/projects/skyrim/power_signals.c diff --git a/zephyr/projects/guybrush/prj.conf b/zephyr/projects/skyrim/prj.conf index 5adf663ad3..5adf663ad3 100644 --- a/zephyr/projects/guybrush/prj.conf +++ b/zephyr/projects/skyrim/prj.conf diff --git a/zephyr/shim/chip/posix/CMakeLists.txt b/zephyr/projects/skyrim/prj_guybrush.conf index 70e8b6269a..7f394a2c3e 100644 --- a/zephyr/shim/chip/posix/CMakeLists.txt +++ b/zephyr/projects/skyrim/prj_guybrush.conf @@ -2,4 +2,4 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ESPI espi.c)
\ No newline at end of file +# Guybrush board-specific Kconfig settings. diff --git a/zephyr/projects/corsola/kingler/BUILD.py b/zephyr/projects/skyrim/prj_skyrim.conf index 5a4b9722ea..fe9cc52efb 100644 --- a/zephyr/projects/corsola/kingler/BUILD.py +++ b/zephyr/projects/skyrim/prj_skyrim.conf @@ -2,8 +2,4 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -register_npcx_project( - project_name="kingler", - zephyr_board="npcx9", - dts_overlays=["battery.dts", "gpio.dts", "i2c.dts"], -) +# Skyrim reference-board-specific Kconfig settings. diff --git a/zephyr/projects/guybrush/pwm.dts b/zephyr/projects/skyrim/pwm.dts index dd9fc94eaa..dd9fc94eaa 100644 --- a/zephyr/projects/guybrush/pwm.dts +++ b/zephyr/projects/skyrim/pwm.dts diff --git a/zephyr/projects/skyrim/skyrim.dts b/zephyr/projects/skyrim/skyrim.dts new file mode 100644 index 0000000000..2f4d483900 --- /dev/null +++ b/zephyr/projects/skyrim/skyrim.dts @@ -0,0 +1,13 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + named-gpios { + /* + * Skyrim reference-board-specific GPIO customizations + * can be made here. + */ + }; +}; diff --git a/zephyr/projects/guybrush/usb_pd_policy.c b/zephyr/projects/skyrim/usb_pd_policy.c index 0aa21293fe..0aa21293fe 100644 --- a/zephyr/projects/guybrush/usb_pd_policy.c +++ b/zephyr/projects/skyrim/usb_pd_policy.c diff --git a/zephyr/projects/guybrush/usbc_config.c b/zephyr/projects/skyrim/usbc_config.c index 43484d6751..43484d6751 100644 --- a/zephyr/projects/guybrush/usbc_config.c +++ b/zephyr/projects/skyrim/usbc_config.c diff --git a/zephyr/shim/chip/CMakeLists.txt b/zephyr/shim/chip/CMakeLists.txt index 5c76a4163a..59b5a6c739 100644 --- a/zephyr/shim/chip/CMakeLists.txt +++ b/zephyr/shim/chip/CMakeLists.txt @@ -6,7 +6,5 @@ if (DEFINED CONFIG_SOC_FAMILY_NPCX) add_subdirectory(npcx) elseif (DEFINED CONFIG_SOC_FAMILY_RISCV_ITE) add_subdirectory(it8xxx2) -elseif (DEFINED CONFIG_SOC_POSIX) - add_subdirectory(posix) endif() diff --git a/zephyr/shim/chip/npcx/CMakeLists.txt b/zephyr/shim/chip/npcx/CMakeLists.txt index d3cd4b48fd..585b072ea8 100644 --- a/zephyr/shim/chip/npcx/CMakeLists.txt +++ b/zephyr/shim/chip/npcx/CMakeLists.txt @@ -13,7 +13,6 @@ zephyr_library_include_directories(include) zephyr_library_sources(clock.c) zephyr_library_sources(gpio.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ESPI espi.c) zephyr_library_sources_ifdef(CONFIG_CROS_KB_RAW_NPCX keyboard_raw.c) zephyr_library_sources_ifdef(CONFIG_CROS_SHI_NPCX shi.c) zephyr_library_sources_ifdef(CONFIG_CROS_EC system.c) diff --git a/zephyr/shim/chip/npcx/espi.c b/zephyr/shim/chip/npcx/espi.c deleted file mode 100644 index 2115f388d6..0000000000 --- a/zephyr/shim/chip/npcx/espi.c +++ /dev/null @@ -1,53 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <device.h> -#include <sys/util.h> - -#include "drivers/espi.h" -#include "soc_espi.h" -#include "zephyr_espi_shim.h" - -bool is_acpi_command(uint32_t data) -{ - struct espi_evt_data_acpi *acpi = (struct espi_evt_data_acpi *)&data; - - return acpi->type; -} - -uint32_t get_acpi_value(uint32_t data) -{ - struct espi_evt_data_acpi *acpi = (struct espi_evt_data_acpi *)&data; - - return acpi->data; -} - -bool is_8042_ibf(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->evt & HOST_KBC_EVT_IBF; -} - -bool is_8042_obe(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->evt & HOST_KBC_EVT_OBE; -} - -uint32_t get_8042_type(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->type; -} - -uint32_t get_8042_data(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->data; -} diff --git a/zephyr/shim/chip/posix/espi.c b/zephyr/shim/chip/posix/espi.c deleted file mode 100644 index cf348744d7..0000000000 --- a/zephyr/shim/chip/posix/espi.c +++ /dev/null @@ -1,49 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <sys/util.h> -#include "zephyr_espi_shim.h" - -#define ACPI_TYPE_POS 0U -#define ACPI_DATA_POS 8U - -/* 8042 event data format */ -#define POSIX_8042_EVT_POS 16U -#define POSIX_8042_DATA_POS 8U -#define POSIX_8042_TYPE_POS 0U - -/* 8042 event type format */ -#define POSIX_8042_EVT_IBF BIT(0) -#define POSIX_8042_EVT_OBE BIT(1) - -bool is_acpi_command(uint32_t data) -{ - return (data >> ACPI_TYPE_POS) & 0x01; -} - -uint32_t get_acpi_value(uint32_t data) -{ - return (data >> ACPI_TYPE_POS) & 0xff; -} - -bool is_POSIX_8042_ibf(uint32_t data) -{ - return (data >> POSIX_8042_EVT_POS) & POSIX_8042_EVT_IBF; -} - -bool is_POSIX_8042_obe(uint32_t data) -{ - return (data >> POSIX_8042_EVT_POS) & POSIX_8042_EVT_OBE; -} - -uint32_t get_POSIX_8042_type(uint32_t data) -{ - return (data >> POSIX_8042_TYPE_POS) & 0xFF; -} - -uint32_t get_POSIX_8042_data(uint32_t data) -{ - return (data >> POSIX_8042_DATA_POS) & 0xFF; -} diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index 9598e2cf5a..572942bcee 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -334,7 +334,7 @@ #ifdef CONFIG_PLATFORM_EC_ESPI #ifdef CONFIG_PLATFORM_EC_HOSTCMD -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #endif /* eSPI signals */ @@ -346,6 +346,10 @@ #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #endif +#ifdef CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5 +#define CONFIG_HOSTCMD_ESPI_VW_SLP_S5 +#endif + #ifdef CONFIG_PLATFORM_EC_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST #define CONFIG_HOSTCMD_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST #endif @@ -655,6 +659,11 @@ #define CONFIG_POWER_S0IX #endif +#undef CONFIG_POWER_S4_RESIDENCY +#ifdef CONFIG_PLATFORM_EC_POWERSEQ_S4 +#define CONFIG_POWER_S4_RESIDENCY +#endif + #undef CONFIG_POWER_BUTTON_X86 #ifdef CONFIG_PLATFORM_EC_POWERSEQ_INTEL #define CONFIG_POWER_BUTTON_X86 @@ -1050,6 +1059,21 @@ #define CONFIG_USB_PD_TCPM_DRIVER_IT83XX #endif +#undef CONFIG_USB_PD_TCPM_ANX7447 +#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_ANX7447 +#define CONFIG_USB_PD_TCPM_ANX7447 +#endif + +#undef CONFIG_USB_PD_TCPM_ANX7447_AUX_PU_PD +#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_ANX7447_AUX_PU_PD +#define CONFIG_USB_PD_TCPM_ANX7447_AUX_PU_PD +#endif + +#undef CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE_COMMAND +#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_ANX7447_OCM_ERASE_COMMAND +#define CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE_COMMAND +#endif + #undef CONFIG_USB_PD_PORT_MAX_COUNT #ifdef CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT #define CONFIG_USB_PD_PORT_MAX_COUNT CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT @@ -1470,6 +1494,11 @@ #endif /* CONFIG_PLATFORM_EC_MOTIONSENSE */ +#undef CONFIG_MATH_UTIL +#ifdef CONFIG_PLATFORM_EC_MATH_UTIL +#define CONFIG_MATH_UTIL +#endif + #undef CONFIG_HOSTCMD_GET_UPTIME_INFO #ifdef CONFIG_PLATFORM_EC_HOSTCMD_GET_UPTIME_INFO #define CONFIG_HOSTCMD_GET_UPTIME_INFO @@ -1790,6 +1819,17 @@ #define CONFIG_CHARGER_BQ25710_CMP_REF_1P2 #endif +#undef CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM +#define CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM +#endif + +#undef CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_PKPWR_TOVLD_DEG +#define CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG \ + CONFIG_PLATFORM_EC_CHARGER_BQ25710_PKPWR_TOVLD_DEG +#endif + #undef CONFIG_CHARGER_BQ25710_EN_ACOC #ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_EN_ACOC #define CONFIG_CHARGER_BQ25710_EN_ACOC @@ -1832,6 +1872,11 @@ #define CONFIG_CHARGER_BQ25710_PP_ACOK #endif +#undef CONFIG_CHARGER_BQ25720_PP_IDCHG2 +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720_PP_IDCHG2 +#define CONFIG_CHARGER_BQ25720_PP_IDCHG2 +#endif + #undef CONFIG_CHARGER_DISCHARGE_ON_AC #ifdef CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC #define CONFIG_CHARGER_DISCHARGE_ON_AC diff --git a/zephyr/shim/include/motionsense_sensors.h b/zephyr/shim/include/motionsense_sensors.h index bfa9aea050..f4ca97840e 100644 --- a/zephyr/shim/include/motionsense_sensors.h +++ b/zephyr/shim/include/motionsense_sensors.h @@ -100,12 +100,11 @@ enum sensor_alt_id { SENSOR_INFO_NODE)) #endif -/** - * If CONFIG_PLATFORM_EC_MOTION_SENSE_RUNTIME_PROBE_CUSTOM_CALL is enabled, - * this function must be called to perform probing of alternative sensors. +/* + * Performs probing of alternative sensors marked with "runtime-probe" property + * in device tree. If an alternative sensor is detected, the function replaces + * a default one in the motion_sensors array. */ -#ifdef CONFIG_PLATFORM_EC_MOTION_SENSE_RUNTIME_PROBE_CUSTOM_CALL void motion_sense_probe_sensors(void); -#endif #endif /* __CROS_EC_MOTIONSENSE_SENSORS_H */ diff --git a/zephyr/shim/src/console.c b/zephyr/shim/src/console.c index 5a465b2fd4..ef5e20687a 100644 --- a/zephyr/shim/src/console.c +++ b/zephyr/shim/src/console.c @@ -109,6 +109,14 @@ int uart_shell_stop(void) return event.signal->result; } +#ifdef SHELL_DEFAULT_BACKEND_CONFIG_FLAGS +static const struct shell_backend_config_flags shell_cfg_flags = + SHELL_DEFAULT_BACKEND_CONFIG_FLAGS; +#else +/* TODO(b/205884929): Drop after we drop support for v2.7 */ +static const bool shell_cfg_flags; +#endif + static void shell_init_from_work(struct k_work *work) { bool log_backend = CONFIG_SHELL_BACKEND_SERIAL_LOG_LEVEL > 0; @@ -122,8 +130,8 @@ static void shell_init_from_work(struct k_work *work) } /* Initialize the shell and re-enable both RX and TX */ - shell_init(shell_backend_uart_get_ptr(), uart_shell_dev, false, - log_backend, level); + shell_init(shell_backend_uart_get_ptr(), uart_shell_dev, + shell_cfg_flags, log_backend, level); uart_irq_rx_enable(uart_shell_dev); uart_irq_tx_enable(uart_shell_dev); diff --git a/zephyr/shim/src/espi.c b/zephyr/shim/src/espi.c index 12027a6399..f3d80e2071 100644 --- a/zephyr/shim/src/espi.c +++ b/zephyr/shim/src/espi.c @@ -561,3 +561,45 @@ int zephyr_shim_setup_espi(void) return 0; } + +bool is_acpi_command(uint32_t data) +{ + struct espi_evt_data_acpi *acpi = (struct espi_evt_data_acpi *)&data; + + return acpi->type; +} + +uint32_t get_acpi_value(uint32_t data) +{ + struct espi_evt_data_acpi *acpi = (struct espi_evt_data_acpi *)&data; + + return acpi->data; +} + +bool is_8042_ibf(uint32_t data) +{ + struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; + + return kbc->evt & HOST_KBC_EVT_IBF; +} + +bool is_8042_obe(uint32_t data) +{ + struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; + + return kbc->evt & HOST_KBC_EVT_OBE; +} + +uint32_t get_8042_type(uint32_t data) +{ + struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; + + return kbc->type; +} + +uint32_t get_8042_data(uint32_t data) +{ + struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; + + return kbc->data; +} diff --git a/zephyr/shim/src/flash.c b/zephyr/shim/src/flash.c index 15e32269d2..d82e860e17 100644 --- a/zephyr/shim/src/flash.c +++ b/zephyr/shim/src/flash.c @@ -15,8 +15,11 @@ LOG_MODULE_REGISTER(shim_flash, LOG_LEVEL_ERR); -#define CROS_FLASH_DEV DT_LABEL(DT_NODELABEL(fiu0)) -static const struct device *cros_flash_dev; +#if !DT_HAS_CHOSEN(cros_ec_flash) +#error "cros-ec,flash device must be chosen" +#else +#define cros_flash_dev DEVICE_DT_GET(DT_CHOSEN(cros_ec_flash)) +#endif K_MUTEX_DEFINE(flash_lock); @@ -104,11 +107,8 @@ static int flash_dev_init(const struct device *unused) { ARG_UNUSED(unused); - cros_flash_dev = device_get_binding(CROS_FLASH_DEV); - if (!cros_flash_dev) { - LOG_ERR("Fail to find %s", CROS_FLASH_DEV); - return -ENODEV; - } + if (!device_is_ready(cros_flash_dev)) + k_oops(); cros_flash_init(cros_flash_dev); return 0; diff --git a/zephyr/shim/src/motionsense_sensors.c b/zephyr/shim/src/motionsense_sensors.c index b884f890b2..66c08b7d0a 100644 --- a/zephyr/shim/src/motionsense_sensors.c +++ b/zephyr/shim/src/motionsense_sensors.c @@ -437,11 +437,7 @@ DECLARE_HOOK(HOOK_INIT, sensor_enable_irqs, HOOK_PRIO_DEFAULT); ()) #if DT_NODE_EXISTS(SENSOR_ALT_NODE) -#ifndef CONFIG_PLATFORM_EC_MOTION_SENSE_RUNTIME_PROBE_CUSTOM_CALL -static void motion_sense_probe_sensors(void) -#else void motion_sense_probe_sensors(void) -#endif { DT_FOREACH_CHILD(SENSOR_ALT_NODE, PROBE_IF_NEEDED); } @@ -453,10 +449,6 @@ static void motion_sensors_init_alt(void) if (dev != NULL) { DT_FOREACH_CHILD(SENSOR_ALT_NODE, ALT_MOTION_SENSOR_INIT_ID) } - - if (!IS_ENABLED( - CONFIG_PLATFORM_EC_MOTION_SENSE_RUNTIME_PROBE_CUSTOM_CALL)) - motion_sense_probe_sensors(); } DECLARE_HOOK(HOOK_INIT, motion_sensors_init_alt, HOOK_PRIO_INIT_I2C + 1); #endif /* DT_NODE_EXISTS(SENSOR_ALT_NODE) */ diff --git a/zephyr/shim/src/tasks.c b/zephyr/shim/src/tasks.c index 9c6f655a5c..851a179f3e 100644 --- a/zephyr/shim/src/tasks.c +++ b/zephyr/shim/src/tasks.c @@ -55,7 +55,7 @@ struct task_ctx_dyn { /** A wait-able event that is raised when a new task event is posted */ struct k_poll_signal new_event; /** The current platform/ec events set for this task/thread */ - uint32_t event_mask; + atomic_t event_mask; /** * The timer associated with this task, which can be set using * timer_arm(). @@ -117,7 +117,7 @@ __test_only k_tid_t task_get_zephyr_tid(size_t cros_tid) return shimmed_tasks_dyn[cros_tid].zephyr_tid; } -uint32_t *task_get_event_bitmap(task_id_t cros_task_id) +atomic_t *task_get_event_bitmap(task_id_t cros_task_id) { struct task_ctx_dyn *const ctx = &shimmed_tasks_dyn[cros_task_id]; diff --git a/zephyr/shim/src/ztest_system.c b/zephyr/shim/src/ztest_system.c index 580368d7f9..7da949dd84 100644 --- a/zephyr/shim/src/ztest_system.c +++ b/zephyr/shim/src/ztest_system.c @@ -7,7 +7,7 @@ #include "cros_version.h" /* Ongoing actions preventing going into deep-sleep mode. */ -uint32_t sleep_mask; +atomic_t sleep_mask; void system_common_pre_init(void) { diff --git a/zephyr/test/drivers/include/gpio_map.h b/zephyr/test/drivers/include/gpio_map.h index 5253b0155a..35a31119ed 100644 --- a/zephyr/test/drivers/include/gpio_map.h +++ b/zephyr/test/drivers/include/gpio_map.h @@ -24,6 +24,7 @@ GPIO_INT(GPIO_USB_C0_TCPC_INT_ODL, GPIO_INT_EDGE_FALLING, \ tcpc_alert_event) \ GPIO_INT(GPIO_USB_C1_TCPC_INT_ODL, GPIO_INT_EDGE_FALLING, \ - tcpc_alert_event) + tcpc_alert_event) \ + GPIO_INT(GPIO_USB_C1_PPC_INT_ODL, GPIO_INT_EDGE_FALLING, ppc_alert) #endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/test/drivers/include/stubs.h b/zephyr/test/drivers/include/stubs.h index 448d6c883b..af32a988c6 100644 --- a/zephyr/test/drivers/include/stubs.h +++ b/zephyr/test/drivers/include/stubs.h @@ -6,6 +6,7 @@ #ifndef __TEST_DRIVERS_STUBS_H #define __TEST_DRIVERS_STUBS_H +#include "fff.h" #include "power.h" enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_C1, USBC_PORT_COUNT }; @@ -13,7 +14,16 @@ enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_C1, USBC_PORT_COUNT }; /* Structure used by usb_mux test. It is part of usb_muxes chain. */ extern struct usb_mux usbc1_virtual_usb_mux; -void set_mock_power_state(enum power_state state); +/** + * @brief Set state which should be returned by power_handle_state() and wake + * chipset task to immediately change state + * + * @param force If true @p state will be used as return for power_handle_state() + * and will wake up chipset task. If false argument of + * power_handle_state() will be used as return value + * @param state Power state to use when @p force is true + */ +void force_power_state(bool force, enum power_state state); /** * @brief Set product ID that should be returned by board_get_ps8xxx_product_id @@ -22,4 +32,7 @@ void set_mock_power_state(enum power_state state); */ void board_set_ps8xxx_product_id(uint16_t product_id); +/* Declare fake function to allow tests to examine calls to this function */ +DECLARE_FAKE_VOID_FUNC(system_hibernate, uint32_t, uint32_t); + #endif /* __TEST_DRIVERS_STUBS_H */ diff --git a/zephyr/test/drivers/overlay.dts b/zephyr/test/drivers/overlay.dts index fc0ddc0a6e..8025cd5c6f 100644 --- a/zephyr/test/drivers/overlay.dts +++ b/zephyr/test/drivers/overlay.dts @@ -84,6 +84,11 @@ enum-name = "GPIO_USB_C1_TCPC_RST_L"; label = "USB_C1_TCPC_RST_L"; }; + gpio_usb_c1_ppc_int: usb_c1_ppc_int { + gpios = <&gpio0 13 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_PPC_INT_ODL"; + label = "GPIO_USB_C1_PPC_INT_ODL"; + }; }; named-i2c-ports { compatible = "named-i2c-ports"; @@ -500,6 +505,7 @@ reg = <0x41>; label = "SYV682X_EMUL"; frs_en_gpio = <&gpio_usb_c1_frs_en>; + alert_gpio = <&gpio_usb_c1_ppc_int>; }; usb_c1_bb_retimer_emul: bbretimer@42 { @@ -539,7 +545,7 @@ }; &gpio0 { - ngpios = <13>; + ngpios = <14>; }; &i2c0 { @@ -621,6 +627,7 @@ status = "okay"; reg = <0x9>; label = "ISL923X_EMUL"; + battery = <&battery>; }; tcpci_emul: tcpci_emul@82 { diff --git a/zephyr/test/drivers/prj.conf b/zephyr/test/drivers/prj.conf index ed41ea5357..84fb8f2e60 100644 --- a/zephyr/test/drivers/prj.conf +++ b/zephyr/test/drivers/prj.conf @@ -40,6 +40,9 @@ CONFIG_EMUL_BMI=y CONFIG_EMUL_TCS3400=y CONFIG_EMUL_BB_RETIMER=y CONFIG_EMUL_PS8XXX=y +CONFIG_EMUL_CHARGER=y +CONFIG_PLATFORM_EC_CHARGE_MANAGER=y +CONFIG_PLATFORM_EC_CHARGE_RAMP_SW=y CONFIG_PLATFORM_EC_POWERSEQ=y diff --git a/zephyr/test/drivers/src/bb_retimer.c b/zephyr/test/drivers/src/bb_retimer.c index 39af8da2c3..02a712aacb 100644 --- a/zephyr/test/drivers/src/bb_retimer.c +++ b/zephyr/test/drivers/src/bb_retimer.c @@ -441,13 +441,7 @@ static void test_bb_init(void) emul = bb_emul_get(BB_RETIMER_ORD); /* Set AP to normal state and wait for chipset task */ - set_mock_power_state(POWER_S0); - /* - * TODO(b/201420132) - setting power state requires to wake up - * TASK_ID_CHIPSET Sleep is required to run chipset task before - * continuing with test - */ - k_msleep(1); + power_set_state(POWER_S0); /* Setup emulator fail on read */ i2c_common_emul_set_read_fail_reg(emul, BB_RETIMER_REG_VENDOR_ID); @@ -508,13 +502,7 @@ static void test_bb_init(void) NULL); /* Set AP to off state and wait for chipset task */ - set_mock_power_state(POWER_G3); - /* - * TODO(b/201420132) - setting power state requires to wake up - * TASK_ID_CHIPSET Sleep is required to run chipset task before - * continuing with test - */ - k_msleep(1); + power_set_state(POWER_G3); /* With AP off, init should fail and pins should be unset */ zassert_equal(EC_ERROR_NOT_POWERED, diff --git a/zephyr/test/drivers/src/integration_usb.c b/zephyr/test/drivers/src/integration_usb.c new file mode 100644 index 0000000000..61f5f97c7b --- /dev/null +++ b/zephyr/test/drivers/src/integration_usb.c @@ -0,0 +1,101 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr.h> +#include <ztest.h> + +#include "emul/emul_tcpci.h" +#include "emul/emul_smart_battery.h" +#include "emul/emul_charger.h" +#include <drivers/gpio/gpio_emul.h> +#include "battery_smart.h" +#include "tcpm/tcpci.h" +#include "ec_tasks.h" + +#define TCPCI_EMUL_LABEL DT_NODELABEL(tcpci_emul) +#define BATTERY_ORD DT_DEP_ORD(DT_NODELABEL(battery)) + +#define GPIO_AC_OK_PATH DT_PATH(named_gpios, acok_od) +#define GPIO_AC_OK_PIN DT_GPIO_PIN(GPIO_AC_OK_PATH, gpios) + +static void init_tcpm(void) +{ + const struct emul *tcpci_emul = + emul_get_binding(DT_LABEL(TCPCI_EMUL_LABEL)); + struct i2c_emul *i2c_emul; + struct sbat_emul_bat_data *bat; + const struct device *gpio_dev = + DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_AC_OK_PATH, gpios)); + + set_test_runner_tid(); + zassert_ok(tcpci_tcpm_init(0), 0); + pd_set_suspend(0, 0); + /* Reset to disconnected state. */ + zassert_ok(tcpci_emul_disconnect_partner(tcpci_emul), NULL); + + /* Battery defaults to charging, so reset to not charging. */ + i2c_emul = sbat_emul_get_ptr(BATTERY_ORD); + bat = sbat_emul_get_bat_data(i2c_emul); + bat->cur = -5; + + zassert_ok(gpio_emul_input_set(gpio_dev, GPIO_AC_OK_PIN, 0), NULL); +} + +static void remove_emulated_devices(void) +{ + const struct emul *tcpci_emul = + emul_get_binding(DT_LABEL(TCPCI_EMUL_LABEL)); + /* TODO: This function should trigger gpios to signal there is nothing + * attached to the port. + */ + zassert_ok(tcpci_emul_disconnect_partner(tcpci_emul), NULL); +} + +static void test_attach_compliant_charger(void) +{ + const struct emul *tcpci_emul = + emul_get_binding(DT_LABEL(TCPCI_EMUL_LABEL)); + struct i2c_emul *i2c_emul; + uint16_t battery_status; + struct charger_emul_data my_charger; + const struct device *gpio_dev = + DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_AC_OK_PATH, gpios)); + + /* Verify battery not charging. */ + i2c_emul = sbat_emul_get_ptr(BATTERY_ORD); + zassert_ok(sbat_emul_get_word_val(i2c_emul, SB_BATTERY_STATUS, + &battery_status), + NULL); + zassert_not_equal(battery_status & STATUS_DISCHARGING, 0, + "Battery is not discharging: %d", battery_status); + + /* TODO? Send host command to verify PD_ROLE_DISCONNECTED. */ + + /* Attach emulated charger. */ + zassert_ok(gpio_emul_input_set(gpio_dev, GPIO_AC_OK_PIN, 1), NULL); + charger_emul_init(&my_charger); + zassert_ok(charger_emul_connect_to_tcpci(&my_charger, tcpci_emul), + NULL); + + /* Wait for current ramp. */ + k_sleep(K_SECONDS(10)); + + /* Verify battery charging. */ + zassert_ok(sbat_emul_get_word_val(i2c_emul, SB_BATTERY_STATUS, + &battery_status), + NULL); + zassert_equal(battery_status & STATUS_DISCHARGING, 0, + "Battery is discharging: %d", battery_status); + /* TODO: Also check voltage, current, etc. */ +} + +void test_suite_integration_usb(void) +{ + ztest_test_suite(integration_usb, + ztest_user_unit_test_setup_teardown( + test_attach_compliant_charger, init_tcpm, + remove_emulated_devices)); + ztest_run_test_suite(integration_usb); +} diff --git a/zephyr/test/drivers/src/main.c b/zephyr/test/drivers/src/main.c index 05fe12c8fc..687ea0785e 100644 --- a/zephyr/test/drivers/src/main.c +++ b/zephyr/test/drivers/src/main.c @@ -30,6 +30,8 @@ extern void test_suite_ppc_sn5s330(void); extern void test_suite_cros_cbi(void); extern void test_suite_tcpci(void); extern void test_suite_ps8xxx(void); +extern void test_suite_integration_usb(void); +extern void test_suite_power_common(void); void test_main(void) { @@ -61,4 +63,6 @@ void test_main(void) test_suite_cros_cbi(); test_suite_tcpci(); test_suite_ps8xxx(); + test_suite_integration_usb(); + test_suite_power_common(); } diff --git a/zephyr/test/drivers/src/power_common.c b/zephyr/test/drivers/src/power_common.c new file mode 100644 index 0000000000..19003c8dde --- /dev/null +++ b/zephyr/test/drivers/src/power_common.c @@ -0,0 +1,687 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <ztest.h> +#include <drivers/gpio.h> +#include <drivers/gpio/gpio_emul.h> +#include <shell/shell.h> +#include <shell/shell_uart.h> + +#include "chipset.h" +#include "common.h" +#include "extpower.h" +#include "hooks.h" +#include "host_command.h" +#include "power.h" +#include "stubs.h" +#include "task.h" + +#include "emul/emul_common_i2c.h" +#include "emul/emul_smart_battery.h" + +#include "battery.h" +#include "battery_smart.h" + +#define BATTERY_ORD DT_DEP_ORD(DT_NODELABEL(battery)) + +#define GPIO_ACOK_OD_NODE DT_PATH(named_gpios, acok_od) +#define GPIO_ACOK_OD_PIN DT_GPIO_PIN(GPIO_ACOK_OD_NODE, gpios) + +/* Description of all power states with chipset state masks */ +static struct { + /* Power state */ + enum power_state p_state; + /* + * CHIPSET_STATE_* to which this state transition (the same as + * transition_from for static states) + */ + int transition_to; + /* CHIPSET_STATE_* from which this state transition */ + int transition_from; +} test_power_state_desc[] = { + { + .p_state = POWER_G3, + .transition_to = CHIPSET_STATE_HARD_OFF, + .transition_from = CHIPSET_STATE_HARD_OFF, + }, + { + .p_state = POWER_G3S5, + .transition_to = CHIPSET_STATE_SOFT_OFF, + .transition_from = CHIPSET_STATE_HARD_OFF, + }, + { + .p_state = POWER_S5G3, + .transition_to = CHIPSET_STATE_HARD_OFF, + .transition_from = CHIPSET_STATE_SOFT_OFF, + }, + { + .p_state = POWER_S5, + .transition_to = CHIPSET_STATE_SOFT_OFF, + .transition_from = CHIPSET_STATE_SOFT_OFF, + }, + { + .p_state = POWER_S5S3, + .transition_to = CHIPSET_STATE_SUSPEND, + .transition_from = CHIPSET_STATE_SOFT_OFF, + }, + { + .p_state = POWER_S3S5, + .transition_to = CHIPSET_STATE_SOFT_OFF, + .transition_from = CHIPSET_STATE_SUSPEND, + }, + { + .p_state = POWER_S3, + .transition_to = CHIPSET_STATE_SUSPEND, + .transition_from = CHIPSET_STATE_SUSPEND, + }, + { + .p_state = POWER_S3S0, + .transition_to = CHIPSET_STATE_ON, + .transition_from = CHIPSET_STATE_SUSPEND, + }, + { + .p_state = POWER_S0S3, + .transition_to = CHIPSET_STATE_SUSPEND, + .transition_from = CHIPSET_STATE_ON, + }, + { + .p_state = POWER_S0, + .transition_to = CHIPSET_STATE_ON, + .transition_from = CHIPSET_STATE_ON, + }, +}; + +/* + * Chipset state masks used by chipset_in_state and + * chipset_in_or_transitioning_to_state tests + */ +static int in_state_test_masks[] = { + CHIPSET_STATE_HARD_OFF, + CHIPSET_STATE_SOFT_OFF, + CHIPSET_STATE_SUSPEND, + CHIPSET_STATE_ON, + CHIPSET_STATE_STANDBY, + CHIPSET_STATE_ANY_OFF, + CHIPSET_STATE_ANY_SUSPEND, + CHIPSET_STATE_ANY_SUSPEND | CHIPSET_STATE_SOFT_OFF, +}; + +/** Test chipset_in_state() for each state */ +static void test_power_chipset_in_state(void) +{ + bool expected_in_state; + bool transition_from; + bool transition_to; + bool in_state; + int mask; + + for (int i = 0; i < ARRAY_SIZE(test_power_state_desc); i++) { + /* Set given power state */ + power_set_state(test_power_state_desc[i].p_state); + /* Test with selected state masks */ + for (int j = 0; j < ARRAY_SIZE(in_state_test_masks); j++) { + mask = in_state_test_masks[j]; + /* + * Currently tested mask match with state if it match + * with transition_to and from chipset states + */ + transition_to = + mask & test_power_state_desc[i].transition_to; + transition_from = + mask & test_power_state_desc[i].transition_from; + expected_in_state = transition_to && transition_from; + in_state = chipset_in_state(mask); + zassert_equal(expected_in_state, in_state, + "Wrong chipset_in_state() == %d, " + "should be %d; mask 0x%x; power state %d " + "in test case %d", + in_state, expected_in_state, mask, + test_power_state_desc[i].p_state, i); + } + } +} + +/** Test chipset_in_or_transitioning_to_state() for each state */ +static void test_power_chipset_in_or_transitioning_to_state(void) +{ + bool expected_in_state; + bool in_state; + int mask; + + for (int i = 0; i < ARRAY_SIZE(test_power_state_desc); i++) { + /* Set given power state */ + power_set_state(test_power_state_desc[i].p_state); + /* Test with selected state masks */ + for (int j = 0; j < ARRAY_SIZE(in_state_test_masks); j++) { + mask = in_state_test_masks[j]; + /* + * Currently tested mask match with state if it match + * with transition_to chipset state + */ + expected_in_state = + mask & test_power_state_desc[i].transition_to; + in_state = chipset_in_or_transitioning_to_state(mask); + zassert_equal(expected_in_state, in_state, + "Wrong " + "chipset_in_or_transitioning_to_state() " + "== %d, should be %d; mask 0x%x; " + "power state %d in test case %d", + in_state, expected_in_state, mask, + test_power_state_desc[i].p_state, i); + } + } +} + +/** Test using chipset_exit_hard_off() in different power states */ +static void test_power_exit_hard_off(void) +{ + /* Force initial state */ + force_power_state(true, POWER_G3); + zassert_equal(POWER_G3, power_get_state(), NULL); + + /* Stop forcing state */ + force_power_state(false, 0); + + /* Test after exit hard off, we reach G3S5 */ + chipset_exit_hard_off(); + /* + * TODO(b/201420132) - chipset_exit_hard_off() is waking up + * TASK_ID_CHIPSET Sleep is required to run chipset task before + * continuing with test + */ + k_msleep(1); + zassert_equal(POWER_G3S5, power_get_state(), NULL); + + /* Go back to G3 and check we stay there */ + force_power_state(true, POWER_G3); + force_power_state(false, 0); + zassert_equal(POWER_G3, power_get_state(), NULL); + + /* Exit G3 again */ + chipset_exit_hard_off(); + /* TODO(b/201420132) - see comment above */ + k_msleep(1); + zassert_equal(POWER_G3S5, power_get_state(), NULL); + + /* Go to S5G3 */ + force_power_state(true, POWER_S5G3); + zassert_equal(POWER_S5G3, power_get_state(), NULL); + + /* Test exit hard off in S5G3 -- should immedietly exit G3 */ + chipset_exit_hard_off(); + /* Go back to G3 and check we exit it to G3S5 */ + force_power_state(true, POWER_G3); + zassert_equal(POWER_G3S5, power_get_state(), NULL); + + /* Test exit hard off is cleared on entering S5 */ + chipset_exit_hard_off(); + force_power_state(true, POWER_S5); + zassert_equal(POWER_S5, power_get_state(), NULL); + /* Go back to G3 and check we stay in G3 */ + force_power_state(true, POWER_G3); + force_power_state(false, 0); + zassert_equal(POWER_G3, power_get_state(), NULL); + + /* Test exit hard off doesn't work on other states */ + force_power_state(true, POWER_S5S3); + force_power_state(false, 0); + zassert_equal(POWER_S5S3, power_get_state(), NULL); + chipset_exit_hard_off(); + /* TODO(b/201420132) - see comment above */ + k_msleep(1); + + /* Go back to G3 and check we stay in G3 */ + force_power_state(true, POWER_G3); + force_power_state(false, 0); + zassert_equal(POWER_G3, power_get_state(), NULL); +} + +/* Test reboot ap on g3 host command is triggering reboot */ +static void test_power_reboot_ap_at_g3(void) +{ + struct ec_params_reboot_ap_on_g3_v1 params; + struct host_cmd_handler_args args = { + .command = EC_CMD_REBOOT_AP_ON_G3, + .version = 0, + .send_response = stub_send_response_callback, + .params = ¶ms, + .params_size = sizeof(params), + }; + int offset_for_still_in_g3_test; + int delay_ms; + + /* Force initial state S0 */ + force_power_state(true, POWER_S0); + zassert_equal(POWER_S0, power_get_state(), NULL); + + /* Test version 0 (no delay argument) */ + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + + /* Go to G3 and check if reboot is triggered */ + force_power_state(true, POWER_G3); + zassert_equal(POWER_G3S5, power_get_state(), NULL); + + /* Test version 1 (with delay argument) */ + args.version = 1; + delay_ms = 3000; + params.reboot_ap_at_g3_delay = delay_ms / 1000; /* in seconds */ + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + + /* Go to G3 and check if reboot is triggered after delay */ + force_power_state(true, POWER_G3); + force_power_state(false, 0); + zassert_equal(POWER_G3, power_get_state(), NULL); + /* + * Arbitrary chosen offset before end of reboot delay to check if G3 + * state wasn't left too soon + */ + offset_for_still_in_g3_test = 50; + k_msleep(delay_ms - offset_for_still_in_g3_test); + /* Test if still in G3 */ + zassert_equal(POWER_G3, power_get_state(), NULL); + /* + * power_common_state() use for loop with 100ms sleeps. msleep() wait at + * least specified time, so wait 10% longer than specified delay to take + * this into account. + */ + k_msleep(offset_for_still_in_g3_test + delay_ms / 10); + /* Test if reboot is triggered */ + zassert_equal(POWER_G3S5, power_get_state(), NULL); +} + +/** Test setting cutoff and stay-up battery levels through host command */ +static void test_power_hc_smart_discharge(void) +{ + struct ec_response_smart_discharge response; + struct ec_params_smart_discharge params; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_SMART_DISCHARGE, 0, response); + struct i2c_emul *emul; + int hours_to_zero; + int hibern_drate; + int cutoff_drate; + int stayup_cap; + int cutoff_cap; + + emul = sbat_emul_get_ptr(BATTERY_ORD); + + /* Set up host command parameters */ + args.params = ¶ms; + args.params_size = sizeof(params); + + params.flags = EC_SMART_DISCHARGE_FLAGS_SET; + + /* Test fail when battery capacity is not available */ + i2c_common_emul_set_read_fail_reg(emul, SB_FULL_CHARGE_CAPACITY); + zassert_equal(EC_RES_UNAVAILABLE, host_command_process(&args), NULL); + i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Setup discharge rates */ + params.drate.hibern = 10; + params.drate.cutoff = 100; + /* Test fail on higher discahrge in hibernation than cutoff */ + zassert_equal(EC_RES_INVALID_PARAM, host_command_process(&args), NULL); + + /* Setup discharge rates */ + params.drate.hibern = 10; + params.drate.cutoff = 0; + /* Test fail on only one discharge rate set to 0 */ + zassert_equal(EC_RES_INVALID_PARAM, host_command_process(&args), NULL); + + /* Setup correct parameters */ + hours_to_zero = 1000; + hibern_drate = 100; /* uA */ + cutoff_drate = 10; /* uA */ + /* Need at least 100 mA capacity to stay 1000h using 0.1mAh */ + stayup_cap = hibern_drate * hours_to_zero / 1000; + /* Need at least 10 mA capacity to stay 1000h using 0.01mAh */ + cutoff_cap = cutoff_drate * hours_to_zero / 1000; + + params.drate.hibern = hibern_drate; + params.drate.cutoff = cutoff_drate; + params.hours_to_zero = hours_to_zero; + + /* Test if correct values are set */ + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + zassert_equal(hibern_drate, response.drate.hibern, NULL); + zassert_equal(cutoff_drate, response.drate.cutoff, NULL); + zassert_equal(hours_to_zero, response.hours_to_zero, NULL); + zassert_equal(stayup_cap, response.dzone.stayup, NULL); + zassert_equal(cutoff_cap, response.dzone.cutoff, NULL); + + /* Setup discharge rate to 0 */ + params.drate.hibern = 0; + params.drate.cutoff = 0; + /* Update hours to zero */ + hours_to_zero = 2000; + params.hours_to_zero = hours_to_zero; + /* Need at least 200 mA capacity to stay 2000h using 0.1mAh */ + stayup_cap = hibern_drate * hours_to_zero / 1000; + /* Need at least 20 mA capacity to stay 2000h using 0.01mAh */ + cutoff_cap = cutoff_drate * hours_to_zero / 1000; + + /* Test that command doesn't change drate but apply new hours to zero */ + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + zassert_equal(hibern_drate, response.drate.hibern, NULL); + zassert_equal(cutoff_drate, response.drate.cutoff, NULL); + zassert_equal(hours_to_zero, response.hours_to_zero, NULL); + zassert_equal(stayup_cap, response.dzone.stayup, NULL); + zassert_equal(cutoff_cap, response.dzone.cutoff, NULL); + + /* Setup any parameters != 0 */ + params.drate.hibern = 1000; + params.drate.cutoff = 1000; + /* Clear set flag */ + params.flags = 0; + + /* Test that command doesn't change drate and dzone */ + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + zassert_equal(hibern_drate, response.drate.hibern, NULL); + zassert_equal(cutoff_drate, response.drate.cutoff, NULL); + zassert_equal(hours_to_zero, response.hours_to_zero, NULL); + zassert_equal(stayup_cap, response.dzone.stayup, NULL); + zassert_equal(cutoff_cap, response.dzone.cutoff, NULL); +} + +/** + * Test if default board_system_is_idle() recognize cutoff and stay-up + * levels correctly. + */ +static void test_power_board_system_is_idle(void) +{ + struct ec_response_smart_discharge response; + struct ec_params_smart_discharge params; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_SMART_DISCHARGE, 0, response); + struct sbat_emul_bat_data *bat; + struct i2c_emul *emul; + uint64_t last_shutdown_time = 0; + uint64_t target; + uint64_t now; + + emul = sbat_emul_get_ptr(BATTERY_ORD); + bat = sbat_emul_get_bat_data(emul); + + /* Set up host command parameters */ + args.params = ¶ms; + args.params_size = sizeof(params); + params.drate.hibern = 100; /* uA */ + params.drate.cutoff = 10; /* uA */ + params.hours_to_zero = 1000; /* h */ + params.flags = EC_SMART_DISCHARGE_FLAGS_SET; + /* Set stay-up and cutoff zones */ + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + + /* Test shutdown ignore is send when target time is in future */ + target = 1125; + now = 1000; + zassert_equal(CRITICAL_SHUTDOWN_IGNORE, + board_system_is_idle(last_shutdown_time, &target, now), + NULL); + + /* Set "now" time after target time */ + now = target + 30; + + /* + * Test hibernation is requested when battery remaining capacity + * is not available + */ + i2c_common_emul_set_read_fail_reg(emul, SB_REMAINING_CAPACITY); + zassert_equal(CRITICAL_SHUTDOWN_HIBERNATE, + board_system_is_idle(last_shutdown_time, &target, now), + NULL); + i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Setup remaining capacity to trigger cutoff */ + bat->cap = response.dzone.cutoff - 5; + zassert_equal(CRITICAL_SHUTDOWN_CUTOFF, + board_system_is_idle(last_shutdown_time, &target, now), + NULL); + + /* Setup remaining capacity to trigger stay-up and ignore shutdown */ + bat->cap = response.dzone.stayup - 5; + zassert_equal(CRITICAL_SHUTDOWN_IGNORE, + board_system_is_idle(last_shutdown_time, &target, now), + NULL); + + /* Setup remaining capacity to be in safe zone to hibernate */ + bat->cap = response.dzone.stayup + 5; + zassert_equal(CRITICAL_SHUTDOWN_HIBERNATE, + board_system_is_idle(last_shutdown_time, &target, now), + NULL); +} + +/** + * Common setup for hibernation delay tests. Smart discharge zone is setup, + * battery is set in safe zone (which trigger hibernation), power state is + * set to G3 and AC is disabled. system_hibernate mock is reset. + */ +static void setup_hibernation_delay(void) +{ + struct ec_response_smart_discharge response; + struct ec_params_smart_discharge params; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_SMART_DISCHARGE, 0, response); + const struct device *acok_dev = + DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_ACOK_OD_NODE, gpios)); + struct sbat_emul_bat_data *bat; + struct i2c_emul *emul; + + emul = sbat_emul_get_ptr(BATTERY_ORD); + bat = sbat_emul_get_bat_data(emul); + + /* Setup smart discharge zone and set capacity to safe zone */ + args.params = ¶ms; + args.params_size = sizeof(params); + params.drate.hibern = 100; /* uA */ + params.drate.cutoff = 10; /* uA */ + params.hours_to_zero = 10000; /* h */ + params.flags = EC_SMART_DISCHARGE_FLAGS_SET; + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + /* + * Make sure that battery is in safe zone in good condition to + * not trigger hibernate in charge_state_v2.c + */ + bat->cap = response.dzone.stayup + 5; + bat->volt = battery_get_info()->voltage_normal; + + /* Force initial state */ + force_power_state(true, POWER_G3); + zassert_equal(POWER_G3, power_get_state(), NULL); + + /* Stop forcing state */ + force_power_state(false, 0); + + /* Disable AC */ + zassert_ok(gpio_emul_input_set(acok_dev, GPIO_ACOK_OD_PIN, 0), NULL); + msleep(CONFIG_EXTPOWER_DEBOUNCE_MS + 1); + zassert_equal(0, extpower_is_present(), NULL); + + RESET_FAKE(system_hibernate); +} + +/** Test setting hibernation delay through host command */ +static void test_power_hc_hibernation_delay(void) +{ + struct ec_response_hibernation_delay response; + struct ec_params_hibernation_delay params; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_HIBERNATION_DELAY, 0, response); + const struct device *acok_dev = + DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_ACOK_OD_NODE, gpios)); + uint32_t h_delay; + int sleep_time; + + /* Setup hibernation delay host command */ + args.params = ¶ms; + args.params_size = sizeof(params); + + /* Set hibernate delay */ + h_delay = 9; + params.seconds = h_delay; + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + + zassert_equal(0, response.time_g3, "Time from last G3 enter %d != 0", + response.time_g3); + zassert_equal(h_delay, response.time_remaining, + "Time to hibernation %d != %d", + response.time_remaining, h_delay); + zassert_equal(h_delay, response.hibernate_delay, + "Hibernation delay %d != %d", + h_delay, response.hibernate_delay); + + /* Kick chipset task to process new hibernation delay */ + task_wake(TASK_ID_CHIPSET); + /* Wait some arbitrary time less than hibernate delay */ + sleep_time = 6; + k_msleep(sleep_time * 1000); + + /* Get hibernate delay */ + params.seconds = 0; + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + + zassert_equal(sleep_time, response.time_g3, + "Time from last G3 enter %d != %d", + response.time_g3, sleep_time); + zassert_equal(h_delay - sleep_time, response.time_remaining, + "Time to hibernation %d != %d", + response.time_remaining, h_delay - sleep_time); + zassert_equal(h_delay, response.hibernate_delay, + "Hibernation delay %d != %d", + h_delay, response.hibernate_delay); + zassert_equal(0, system_hibernate_fake.call_count, + "system_hibernate() shouldn't be called before delay"); + + /* Wait to end of the hibenate delay */ + k_msleep((h_delay - sleep_time) * 1000); + + /* Get hibernate delay */ + params.seconds = 0; + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + + zassert_equal(h_delay, response.time_g3, + "Time from last G3 enter %d != %d", + response.time_g3, h_delay); + zassert_equal(0, response.time_remaining, + "Time to hibernation %d != 0", + response.time_remaining); + zassert_equal(h_delay, response.hibernate_delay, + "Hibernation delay %d != %d", + h_delay, response.hibernate_delay); + zassert_equal(1, system_hibernate_fake.call_count, + "system_hibernate() should be called after delay %d", + system_hibernate_fake.call_count); + + /* Wait some more time */ + k_msleep(2000); + + /* Get hibernate delay */ + params.seconds = 0; + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + + /* After hibernation, remaining time shouldn't be negative */ + zassert_equal(0, response.time_remaining, + "Time to hibernation %d != 0", + response.time_remaining); + + /* Enable AC */ + zassert_ok(gpio_emul_input_set(acok_dev, GPIO_ACOK_OD_PIN, 1), NULL); + msleep(CONFIG_EXTPOWER_DEBOUNCE_MS + 1); + zassert_equal(1, extpower_is_present(), NULL); + + /* Reset system_hibernate fake to check that it is not called on AC */ + RESET_FAKE(system_hibernate); + /* Allow chipset task to spin with enabled AC */ + task_wake(TASK_ID_CHIPSET); + k_msleep(1); + + /* Get hibernate delay */ + params.seconds = 0; + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + + zassert_equal(0, response.time_g3, + "Time from last G3 enter %d should be 0 on AC", + response.time_g3); + zassert_equal(0, system_hibernate_fake.call_count, + "system_hibernate() shouldn't be called on AC"); + + /* Disable AC */ + zassert_ok(gpio_emul_input_set(acok_dev, GPIO_ACOK_OD_PIN, 0), NULL); + msleep(CONFIG_EXTPOWER_DEBOUNCE_MS + 1); + zassert_equal(0, extpower_is_present(), NULL); + + /* Go to different state */ + force_power_state(true, POWER_G3S5); + zassert_equal(POWER_G3S5, power_get_state(), NULL); + + /* Stop forcing state */ + force_power_state(false, 0); + + /* Get hibernate delay */ + params.seconds = 0; + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + + zassert_equal(0, response.time_g3, + "Time from last G3 enter %d should be 0 on state != G3", + response.time_g3); +} + +/** Test setting hibernation delay through UART command */ +static void test_power_cmd_hibernation_delay(void) +{ + uint32_t h_delay; + int sleep_time; + + /* Test success on call without argument */ + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "hibdelay"), NULL); + + /* Test error on hibernation delay argument that is not a number */ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "hibdelay test1"), NULL); + + /* Set hibernate delay */ + h_delay = 3; + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "hibdelay 3"), NULL); + + /* Kick chipset task to process new hibernation delay */ + task_wake(TASK_ID_CHIPSET); + /* Wait some arbitrary time less than hibernate delay */ + sleep_time = 2; + k_msleep(sleep_time * 1000); + + zassert_equal(0, system_hibernate_fake.call_count, + "system_hibernate() shouldn't be called before delay"); + + /* Wait to end of the hibenate delay */ + k_msleep((h_delay - sleep_time) * 1000); + + zassert_equal(1, system_hibernate_fake.call_count, + "system_hibernate() should be called after delay %d", + system_hibernate_fake.call_count); +} + +void test_suite_power_common(void) +{ + ztest_test_suite(power_common, + ztest_unit_test(test_power_chipset_in_state), + ztest_unit_test( + test_power_chipset_in_or_transitioning_to_state), + ztest_unit_test(test_power_exit_hard_off), + ztest_unit_test(test_power_reboot_ap_at_g3), + ztest_unit_test(test_power_hc_smart_discharge), + ztest_unit_test(test_power_board_system_is_idle), + ztest_unit_test_setup_teardown( + test_power_hc_hibernation_delay, + setup_hibernation_delay, unit_test_noop), + ztest_unit_test_setup_teardown( + test_power_cmd_hibernation_delay, + setup_hibernation_delay, unit_test_noop)); + ztest_run_test_suite(power_common); +} diff --git a/zephyr/test/drivers/src/ppc.c b/zephyr/test/drivers/src/ppc.c index 740c7a0aea..c7f8a1c642 100644 --- a/zephyr/test/drivers/src/ppc.c +++ b/zephyr/test/drivers/src/ppc.c @@ -51,21 +51,18 @@ static void test_ppc_syv682x_interrupt(void) uint8_t reg; /* An OC event less than 100 ms should not cause VBUS to turn off. */ - syv682x_emul_set_status(emul, SYV682X_STATUS_OC_5V); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_OC_5V, + SYV682X_CONTROL_4_NONE); msleep(50); - syv682x_interrupt(syv682x_port); zassert_true(ppc_is_sourcing_vbus(syv682x_port), "PPC is not sourcing VBUS after 50 ms OC"); /* But one greater than 100 ms should. */ - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ msleep(60); - syv682x_interrupt(syv682x_port); zassert_false(ppc_is_sourcing_vbus(syv682x_port), "PPC is sourcing VBUS after 100 ms OC"); - syv682x_emul_set_status(emul, 0x0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); /* * TODO(b/190519131): Organize the tests to be more hermetic and avoid * the following issue: The driver triggers overcurrent protection. If @@ -81,24 +78,24 @@ static void test_ppc_syv682x_interrupt(void) */ zassert_ok(ppc_vbus_source_enable(syv682x_port, true), "Source enable failed"); - syv682x_emul_set_status(emul, SYV682X_STATUS_TSD); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_TSD, + SYV682X_CONTROL_4_NONE); msleep(1); zassert_false(ppc_is_sourcing_vbus(syv682x_port), "PPC is sourcing power after TSD"); - syv682x_emul_set_status(emul, 0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); /* An OVP event should cause the driver to disable the source path. */ zassert_ok(ppc_vbus_source_enable(syv682x_port, true), "Source enable failed"); - syv682x_emul_set_status(emul, SYV682X_STATUS_OVP); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_OVP, + SYV682X_CONTROL_4_NONE); msleep(1); zassert_false(ppc_is_sourcing_vbus(syv682x_port), "PPC is sourcing power after OVP"); - syv682x_emul_set_status(emul, 0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); /* * A high-voltage OC while sinking should cause the driver to try to @@ -107,52 +104,45 @@ static void test_ppc_syv682x_interrupt(void) */ zassert_ok(ppc_vbus_sink_enable(syv682x_port, true), "Sink enable failed"); - syv682x_emul_set_status(emul, SYV682X_STATUS_OC_HV); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_OC_HV, + SYV682X_CONTROL_4_NONE); msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); zassert_equal(reg & SYV682X_CONTROL_1_PWR_ENB, 0, "Power path disabled after HV_OC handled"); - syv682x_emul_set_status(emul, SYV682X_STATUS_OC_HV); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_OC_HV, + SYV682X_CONTROL_4_NONE); msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); zassert_equal(reg & SYV682X_CONTROL_1_PWR_ENB, 0, "Power path disabled after HV_OC handled"); - syv682x_emul_set_status(emul, SYV682X_STATUS_OC_HV); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_OC_HV, + SYV682X_CONTROL_4_NONE); msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); zassert_equal(reg & SYV682X_CONTROL_1_PWR_ENB, SYV682X_CONTROL_1_PWR_ENB, "Power path enabled after HV_OC handled 3 times"); - syv682x_emul_set_status(emul, 0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); /* * A VCONN OC event less than 100 ms should not cause the driver to turn * VCONN off. */ ppc_set_vconn(syv682x_port, true); - syv682x_emul_set_control_4(emul, SYV682X_CONTROL_4_VCONN_OCP); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_VCONN_OCP); msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_true(reg & (SYV682X_CONTROL_4_VCONN1 | SYV682X_CONTROL_4_VCONN2), "VCONN disabled after initial VCONN OC"); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ msleep(50); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ - msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_true(reg & @@ -162,17 +152,14 @@ static void test_ppc_syv682x_interrupt(void) * But if the event keeps going for over 100 ms continuously, the driver * should turn VCONN off. */ - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ msleep(60); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ - msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_false(reg & (SYV682X_CONTROL_4_VCONN1 | SYV682X_CONTROL_4_VCONN2), "VCONN enabled after long VCONN OC"); - syv682x_emul_set_control_4(emul, 0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); /* * A VCONN over-voltage (VBAT_OVP) event will cause the device to @@ -181,9 +168,8 @@ static void test_ppc_syv682x_interrupt(void) * driver should then run generic CC over-voltage handling. */ ppc_set_vconn(syv682x_port, true); - syv682x_emul_set_control_4(emul, SYV682X_CONTROL_4_VBAT_OVP); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_VBAT_OVP); msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); @@ -199,7 +185,8 @@ static void test_ppc_syv682x_interrupt(void) * to a CC over-voltage event. There is currently no easy way to test * that a Hard Reset occurred. */ - syv682x_emul_set_control_4(emul, 0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); } static void test_ppc_syv682x_frs(void) @@ -252,14 +239,47 @@ static void test_ppc_syv682x_frs(void) * An FRS event when the PPC is Sink should cause the PPC to switch from * Sink to Source. */ - syv682x_emul_set_status(emul, SYV682X_STATUS_FRS); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_FRS, + SYV682X_CONTROL_4_NONE); msleep(1); zassert_true(ppc_is_sourcing_vbus(syv682x_port), "PPC is not sourcing VBUS after FRS signal handled"); - syv682x_emul_set_status(emul, 0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); +} + +static void test_ppc_syv682x_source_current_limit(void) +{ + struct i2c_emul *emul = syv682x_emul_get(SYV682X_ORD); + uint8_t reg; + int ilim_val; + zassert_ok(ppc_set_vbus_source_current_limit(syv682x_port, + TYPEC_RP_USB), + "Could not set source current limit"); + zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_1_REG, ®), + "Reading CONTROL_1 failed"); + ilim_val = (reg & SYV682X_5V_ILIM_MASK) >> SYV682X_5V_ILIM_BIT_SHIFT; + zassert_equal(reg & SYV682X_5V_ILIM_MASK, SYV682X_5V_ILIM_1_25, + "Set USB Rp value, but 5V_ILIM is %d", ilim_val); + + zassert_ok(ppc_set_vbus_source_current_limit(syv682x_port, + TYPEC_RP_1A5), + "Could not set source current limit"); + zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_1_REG, ®), + "Reading CONTROL_1 failed"); + ilim_val = (reg & SYV682X_5V_ILIM_MASK) >> SYV682X_5V_ILIM_BIT_SHIFT; + zassert_equal(ilim_val, SYV682X_5V_ILIM_1_75, + "Set 1.5A Rp value, but 5V_ILIM is %d", ilim_val); + + zassert_ok(ppc_set_vbus_source_current_limit(syv682x_port, + TYPEC_RP_3A0), + "Could not set source current limit"); + zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_1_REG, ®), + "Reading CONTROL_1 failed"); + ilim_val = (reg & SYV682X_5V_ILIM_MASK) >> SYV682X_5V_ILIM_BIT_SHIFT; + zassert_equal(ilim_val, SYV682X_5V_ILIM_3_30, + "Set 3.0A Rp value, but 5V_ILIM is %d", ilim_val); } static void test_ppc_syv682x(void) @@ -269,6 +289,7 @@ static void test_ppc_syv682x(void) test_ppc_syv682x_vbus_enable(); test_ppc_syv682x_interrupt(); test_ppc_syv682x_frs(); + test_ppc_syv682x_source_current_limit(); } void test_suite_ppc(void) diff --git a/zephyr/test/drivers/src/ppc_sn5s330.c b/zephyr/test/drivers/src/ppc_sn5s330.c index 95556e28cf..d8072c2673 100644 --- a/zephyr/test/drivers/src/ppc_sn5s330.c +++ b/zephyr/test/drivers/src/ppc_sn5s330.c @@ -23,6 +23,39 @@ * to avoid test flakiness */ +struct intercept_write_data { + int reg_to_intercept; + uint8_t val_intercepted; +}; + +struct intercept_read_data { + int reg_to_intercept; + bool replace_reg_val; + uint8_t replacement_val; +}; + +static int intercept_read_func(struct i2c_emul *emul, int reg, uint8_t *val, + int bytes, void *data) +{ + struct intercept_read_data *test_data = data; + + if (test_data->reg_to_intercept && test_data->replace_reg_val) + *val = test_data->replacement_val; + + return EC_SUCCESS; +} + +static int intercept_write_func(struct i2c_emul *emul, int reg, uint8_t val, + int bytes, void *data) +{ + struct intercept_write_data *test_data = data; + + if (test_data->reg_to_intercept == reg) + test_data->val_intercepted = val; + + return 1; +} + static int fail_until_write_func(struct i2c_emul *emul, int reg, uint8_t val, int bytes, void *data) { @@ -40,29 +73,162 @@ static void test_fail_once_func_set1(void) const struct emul *emul = EMUL; struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(emul); uint32_t count = 1; - uint32_t func_set1_value; + uint8_t func_set1_value; i2c_common_emul_set_write_func(i2c_emul, fail_until_write_func, &count); zassert_ok(sn5s330_drv.init(SN5S330_PORT), NULL); zassert_equal(count, 0, NULL); - zassert_ok(sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET1, - &func_set1_value), - NULL); + sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET1, &func_set1_value); zassert_true((func_set1_value & SN5S330_ILIM_1_62) != 0, NULL); i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); } +static void test_dead_battery_boot_force_pp2_fets_set(void) +{ + const struct emul *emul = EMUL; + struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(emul); + struct intercept_write_data test_write_data = { + .reg_to_intercept = SN5S330_FUNC_SET3, + .val_intercepted = 0, + }; + struct intercept_read_data test_read_data = { + .reg_to_intercept = SN5S330_INT_STATUS_REG4, + .replace_reg_val = true, + .replacement_val = SN5S330_DB_BOOT, + }; + + i2c_common_emul_set_write_func(i2c_emul, intercept_write_func, + &test_write_data); + i2c_common_emul_set_read_func(i2c_emul, intercept_read_func, + &test_read_data); + + zassert_ok(sn5s330_drv.init(SN5S330_PORT), NULL); + + /* + * Although the device enables PP2_FET on dead battery boot by setting + * the PP2_EN bit, the driver also force sets this bit during dead + * battery boot by writing that bit to the FUNC_SET3 reg. + * + * TODO(207034759): Verify need or remove redundant PP2 set. + */ + zassert_true(test_write_data.val_intercepted & SN5S330_PP2_EN, NULL); + zassert_false(sn5s330_drv.is_sourcing_vbus(SN5S330_PORT), NULL); +} + +static void test_enter_low_power_mode(void) +{ + const struct emul *emul = EMUL; + + uint8_t func_set2_reg; + uint8_t func_set3_reg; + uint8_t func_set4_reg; + uint8_t func_set9_reg; + + /* + * Requirements were extracted from TI's recommended changes for octopus + * to lower power use during hibernate as well as the follow up changes + * we made to allow the device to wake up from hibernate. + * + * For Reference: b/111006203#comment35 + */ + + zassert_ok(sn5s330_drv.init(SN5S330_PORT), NULL); + zassert_ok(sn5s330_drv.enter_low_power_mode(SN5S330_PORT), NULL); + + /* 1) Verify VBUS power paths are off */ + sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET3, &func_set3_reg); + zassert_equal(func_set3_reg & SN5S330_PP1_EN, 0, NULL); + zassert_equal(func_set3_reg & SN5S330_PP2_EN, 0, NULL); + + /* 2) Verify VCONN power path is off */ + sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET4, &func_set4_reg); + zassert_not_equal(func_set4_reg & SN5S330_CC_EN, 0, NULL); + zassert_equal(func_set4_reg & SN5S330_VCONN_EN, 0, NULL); + + /* 3) Verify SBU FET is off */ + sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET2, &func_set2_reg); + zassert_equal(func_set2_reg & SN5S330_SBU_EN, 0, NULL); + + /* 4) Verify VBUS and SBU OVP comparators are off */ + sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET9, &func_set9_reg); + zassert_equal(func_set9_reg & SN5S330_FORCE_OVP_EN_SBU, 0, NULL); + zassert_equal(func_set9_reg & SN5S330_PWR_OVR_VBUS, 0, NULL); + zassert_not_equal(func_set9_reg & SN5S330_OVP_EN_CC, 0, NULL); + zassert_equal(func_set9_reg & SN5S330_FORCE_ON_VBUS_OVP, 0, NULL); + zassert_equal(func_set9_reg & SN5S330_FORCE_ON_VBUS_UVP, 0, NULL); +} + +static void test_vbus_source_sink_enable(void) +{ + const struct emul *emul = EMUL; + uint8_t func_set3_reg; + + zassert_ok(sn5s330_drv.init(SN5S330_PORT), NULL); + + /* Test enable/disable VBUS source FET */ + zassert_ok(sn5s330_drv.vbus_source_enable(SN5S330_PORT, true), NULL); + sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET3, &func_set3_reg); + zassert_not_equal(func_set3_reg & SN5S330_PP1_EN, 0, NULL); + + zassert_ok(sn5s330_drv.vbus_source_enable(SN5S330_PORT, false), NULL); + sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET3, &func_set3_reg); + zassert_equal(func_set3_reg & SN5S330_PP1_EN, 0, NULL); + + /* Test enable/disable VBUS sink FET */ + zassert_ok(sn5s330_drv.vbus_sink_enable(SN5S330_PORT, true), NULL); + sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET3, &func_set3_reg); + zassert_not_equal(func_set3_reg & SN5S330_PP2_EN, 0, NULL); + + zassert_ok(sn5s330_drv.vbus_sink_enable(SN5S330_PORT, false), NULL); + sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET3, &func_set3_reg); + zassert_equal(func_set3_reg & SN5S330_PP2_EN, 0, NULL); +} + +static void test_vbus_discharge(void) +{ + const struct emul *emul = EMUL; + uint8_t func_set3_reg; + + zassert_ok(sn5s330_drv.init(SN5S330_PORT), NULL); + + /* Test enable/disable VBUS discharging */ + zassert_ok(sn5s330_drv.discharge_vbus(SN5S330_PORT, true), NULL); + sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET3, &func_set3_reg); + zassert_not_equal(func_set3_reg & SN5S330_VBUS_DISCH_EN, 0, NULL); + + zassert_ok(sn5s330_drv.discharge_vbus(SN5S330_PORT, false), NULL); + sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET3, &func_set3_reg); + zassert_equal(func_set3_reg & SN5S330_VBUS_DISCH_EN, 0, NULL); +} + static void reset_sn5s330_state(void) { + struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(EMUL); + + i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); sn5s330_emul_reset(EMUL); } void test_suite_ppc_sn5s330(void) { - ztest_test_suite(ppc_sn5s330, - ztest_unit_test_setup_teardown( - test_fail_once_func_set1, reset_sn5s330_state, - reset_sn5s330_state)); + ztest_test_suite( + ppc_sn5s330, + ztest_unit_test_setup_teardown(test_vbus_discharge, + reset_sn5s330_state, + reset_sn5s330_state), + ztest_unit_test_setup_teardown(test_vbus_source_sink_enable, + reset_sn5s330_state, + reset_sn5s330_state), + ztest_unit_test_setup_teardown(test_enter_low_power_mode, + reset_sn5s330_state, + reset_sn5s330_state), + ztest_unit_test_setup_teardown( + test_dead_battery_boot_force_pp2_fets_set, + reset_sn5s330_state, reset_sn5s330_state), + ztest_unit_test_setup_teardown(test_fail_once_func_set1, + reset_sn5s330_state, + reset_sn5s330_state)); ztest_run_test_suite(ppc_sn5s330); } diff --git a/zephyr/test/drivers/src/ps8xxx.c b/zephyr/test/drivers/src/ps8xxx.c index 790eebf2db..6f76ab2be0 100644 --- a/zephyr/test/drivers/src/ps8xxx.c +++ b/zephyr/test/drivers/src/ps8xxx.c @@ -911,7 +911,14 @@ static void test_ps8xxx_tcpci_low_power_mode(void) { const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - + /* + * PS8751/PS8815 has the auto sleep function that enters + * low power mode on its own in ~2 seconds. Other chips + * don't have it. Stub it out for PS8751/PS8815. + */ + if (board_get_ps8xxx_product_id(USBC_PORT_C1) == PS8751_PRODUCT_ID || + board_get_ps8xxx_product_id(USBC_PORT_C1) == PS8815_PRODUCT_ID) + return; test_tcpci_low_power_mode(tcpci_emul, USBC_PORT_C1); } diff --git a/zephyr/test/drivers/src/stubs.c b/zephyr/test/drivers/src/stubs.c index 68aab8ba12..ee531557a5 100644 --- a/zephyr/test/drivers/src/stubs.c +++ b/zephyr/test/drivers/src/stubs.c @@ -11,6 +11,7 @@ #include "charger/isl923x_public.h" #include "charger/isl9241_public.h" #include "config.h" +#include "fff.h" #include "hooks.h" #include "i2c/i2c.h" #include "power.h" @@ -23,6 +24,13 @@ #include "usb_mux.h" #include "usb_pd_tcpm.h" #include "usbc_ppc.h" +#include "charge_state_v2.h" + +#include <logging/log.h> +LOG_MODULE_REGISTER(stubs); + +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) /* All of these definitions are just to get the test to link. None of these * functions are useful or behave as they should. Please remove them once the @@ -105,6 +113,56 @@ const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_LGC011; int board_set_active_charge_port(int port) { + int is_real_port = (port >= 0 && + port < CONFIG_USB_PD_PORT_MAX_COUNT); + int i; + + if (!is_real_port && port != CHARGE_PORT_NONE) + return EC_ERROR_INVAL; + + if (port == CHARGE_PORT_NONE) { + CPRINTS("Disabling all charging port"); + + /* Disable all ports. */ + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (board_vbus_sink_enable(i, 0)) + CPRINTS("Disabling p%d sink path failed.", i); + } + + return EC_SUCCESS; + } + + /* Check if the port is sourcing VBUS. */ + if (board_is_sourcing_vbus(port)) { + CPRINTS("Skip enable p%d", port); + return EC_ERROR_INVAL; + } + + + CPRINTS("New charge port: p%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + if (i == port) + continue; + + if (board_vbus_sink_enable(i, 0)) + CPRINTS("p%d: sink path disable failed.", i); + } + + /* Enable requested charge port. */ + if (board_vbus_sink_enable(port, 1)) { + CPRINTS("p%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + return EC_SUCCESS; } @@ -116,6 +174,8 @@ int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, int charge_mv) { + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); } struct tcpc_config_t tcpc_config[] = { @@ -156,9 +216,16 @@ void board_set_ps8xxx_product_id(uint16_t product_id) ps8xxx_product_id = product_id; } +int board_vbus_sink_enable(int port, int enable) +{ + /* Both ports are controlled by PPC SN5S330 */ + return ppc_vbus_sink_enable(port, enable); +} + int board_is_sourcing_vbus(int port) { - return 0; + /* Both ports are controlled by PPC SN5S330 */ + return ppc_is_sourcing_vbus(port); } struct usb_mux usbc0_virtual_usb_mux = { @@ -235,9 +302,7 @@ struct ppc_config_t ppc_chips[] = { BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT); unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); -void system_hibernate(uint32_t seconds, uint32_t microseconds) -{ -} +DEFINE_FAKE_VOID_FUNC(system_hibernate, uint32_t, uint32_t); uint16_t tcpc_get_alert_status(void) { @@ -265,17 +330,53 @@ enum power_state power_chipset_init(void) return POWER_G3; } -enum power_state mock_state = POWER_G3; +static enum power_state forced_state; +static bool force_state; -void set_mock_power_state(enum power_state state) +void force_power_state(bool force, enum power_state state) { - mock_state = state; - task_wake(TASK_ID_CHIPSET); + forced_state = state; + force_state = force; + + if (force) { + task_wake(TASK_ID_CHIPSET); + /* + * TODO(b/201420132) - setting power state requires to wake up + * TASK_ID_CHIPSET Sleep is required to run chipset task before + * continuing with test + */ + k_msleep(1); + } } enum power_state power_handle_state(enum power_state state) { - return mock_state; + switch (state) { + case POWER_G3S5: + case POWER_S5S3: + case POWER_S3S0: + case POWER_S0S3: + case POWER_S3S5: + case POWER_S5G3: +#ifdef CONFIG_POWER_S0IX + case POWER_S0ixS0: + case POWER_S0S0ix: +#endif + /* + * Wait for event in transition states to prevent dead loop in + * chipset task + */ + task_wait_event(-1); + break; + default: + break; + } + + if (force_state) { + state = forced_state; + } + + return state; } void chipset_reset(enum chipset_shutdown_reason reason) @@ -307,6 +408,17 @@ void tcpc_alert_event(enum gpio_signal signal) schedule_deferred_pd_interrupt(port); } +void ppc_alert(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C1_PPC_INT_ODL: + syv682x_interrupt(USBC_PORT_C1); + break; + default: + return; + } +} + /* TODO: This code should really be generic, and run based on something in * the dts. */ @@ -328,5 +440,8 @@ static void usbc_interrupt_init(void) gpio_set_level(GPIO_USB_C1_TCPC_RST_L, 0); msleep(PS8XXX_RESET_DELAY_MS); gpio_set_level(GPIO_USB_C1_TCPC_RST_L, 1); + + /* Enable PPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); } DECLARE_HOOK(HOOK_INIT, usbc_interrupt_init, HOOK_PRIO_INIT_I2C + 1); diff --git a/zephyr/test/drivers/src/usb_mux.c b/zephyr/test/drivers/src/usb_mux.c index cf6190eec9..42e65b0779 100644 --- a/zephyr/test/drivers/src/usb_mux.c +++ b/zephyr/test/drivers/src/usb_mux.c @@ -34,15 +34,22 @@ const struct usb_mux *org_mux[3]; static int proxy_init(const struct usb_mux *me) { int i = me->i2c_addr_flags; + int ec = EC_SUCCESS; - ztest_check_expected_value(i); + if (task_get_current() == TASK_ID_TEST_RUNNER) { + ztest_check_expected_value(i); + } if (org_mux[i] != NULL && org_mux[i]->driver->init != NULL) { - org_mux[i]->driver->init(org_mux[i]); + ec = org_mux[i]->driver->init(org_mux[i]); + } + + if (task_get_current() == TASK_ID_TEST_RUNNER) { + return ztest_get_return_value(); } - return ztest_get_return_value(); + return ec; } /** Proxy function which check calls from usb_mux framework to driver */ @@ -50,63 +57,92 @@ static int proxy_set(const struct usb_mux *me, mux_state_t mux_state, bool *ack_required) { int i = me->i2c_addr_flags; + int ec = EC_SUCCESS; - ztest_check_expected_value(i); - ztest_check_expected_value(mux_state); + if (task_get_current() == TASK_ID_TEST_RUNNER) { + ztest_check_expected_value(i); + ztest_check_expected_value(mux_state); + } if (org_mux[i] != NULL && org_mux[i]->driver->set != NULL) { - org_mux[i]->driver->set(org_mux[i], mux_state, ack_required); + ec = org_mux[i]->driver->set(org_mux[i], mux_state, + ack_required); } - return ztest_get_return_value(); + if (task_get_current() == TASK_ID_TEST_RUNNER) { + return ztest_get_return_value(); + } + + return ec; } /** Proxy function which check calls from usb_mux framework to driver */ static int proxy_get(const struct usb_mux *me, mux_state_t *mux_state) { int i = me->i2c_addr_flags; + int ec = EC_SUCCESS; - ztest_check_expected_value(i); + if (task_get_current() == TASK_ID_TEST_RUNNER) { + ztest_check_expected_value(i); + } if (org_mux[i] != NULL && org_mux[i]->driver->get != NULL) { - org_mux[i]->driver->get(org_mux[i], mux_state); + ec = org_mux[i]->driver->get(org_mux[i], mux_state); } - *mux_state = ztest_get_return_value(); + if (task_get_current() == TASK_ID_TEST_RUNNER) { + *mux_state = ztest_get_return_value(); - return ztest_get_return_value(); + return ztest_get_return_value(); + } + + return ec; } /** Proxy function which check calls from usb_mux framework to driver */ static int proxy_enter_low_power_mode(const struct usb_mux *me) { int i = me->i2c_addr_flags; + int ec = EC_SUCCESS; - ztest_check_expected_value(i); + if (task_get_current() == TASK_ID_TEST_RUNNER) { + ztest_check_expected_value(i); + } if (org_mux[i] != NULL && org_mux[i]->driver->enter_low_power_mode != NULL) { - org_mux[i]->driver->enter_low_power_mode(org_mux[i]); + ec = org_mux[i]->driver->enter_low_power_mode(org_mux[i]); } - return ztest_get_return_value(); + if (task_get_current() == TASK_ID_TEST_RUNNER) { + return ztest_get_return_value(); + } + + return ec; } /** Proxy function which check calls from usb_mux framework to driver */ static int proxy_chipset_reset(const struct usb_mux *me) { int i = me->i2c_addr_flags; + int ec = EC_SUCCESS; - ztest_check_expected_value(i); + if (task_get_current() == TASK_ID_TEST_RUNNER) { + ztest_check_expected_value(i); + } if (org_mux[i] != NULL && org_mux[i]->driver->chipset_reset != NULL) { - org_mux[i]->driver->chipset_reset(org_mux[i]); + ec = org_mux[i]->driver->chipset_reset(org_mux[i]); } - return ztest_get_return_value(); + if (task_get_current() == TASK_ID_TEST_RUNNER) { + return ztest_get_return_value(); + } + + return ec; } /** Proxy function for fw update capability */ @@ -120,8 +156,10 @@ static void proxy_hpd_update(const struct usb_mux *me, mux_state_t mux_state) { int i = me->i2c_addr_flags; - ztest_check_expected_value(i); - ztest_check_expected_value(mux_state); + if (task_get_current() == TASK_ID_TEST_RUNNER) { + ztest_check_expected_value(i); + ztest_check_expected_value(mux_state); + } if (org_mux[i] != NULL && org_mux[i]->hpd_update != NULL) { @@ -194,27 +232,9 @@ static void setup_usb_mux_proxy_chain(void) } } -static void suspend_usbc_task(bool suspend) -{ - static const task_id_t cros_tids[] = { - COND_CODE_1(HAS_TASK_PD_C0, (TASK_ID_PD_C0,), ()) - COND_CODE_1(HAS_TASK_PD_C1, (TASK_ID_PD_C1,), ()) - COND_CODE_1(HAS_TASK_PD_C2, (TASK_ID_PD_C2,), ()) - COND_CODE_1(HAS_TASK_PD_C3, (TASK_ID_PD_C3,), ()) - }; - - for (int i = 0; i < ARRAY_SIZE(cros_tids); ++i) - /* - * TODO(b/201420132): pd_set_suspend uses sleeps which we should - * minimize - */ - pd_set_suspend(TASK_ID_TO_PD_PORT(cros_tids[i]), suspend); -} - /** Restore original usb_mux chain without proxy */ static void resotre_usb_mux_chain(void) { - suspend_usbc_task(/*suspend=*/ false); memcpy(&usb_muxes[USBC_PORT_C1], &usb_mux_c1, sizeof(struct usb_mux)); } @@ -294,7 +314,9 @@ static int mock_board_set(const struct usb_mux *me, mux_state_t mux_state) { int i = me->i2c_addr_flags; - ztest_check_expected_value(i); + if (task_get_current() == TASK_ID_TEST_RUNNER) { + ztest_check_expected_value(i); + } return EC_SUCCESS; } @@ -303,13 +325,7 @@ static int mock_board_set(const struct usb_mux *me, mux_state_t mux_state) static void test_usb_mux_init(void) { /* Set AP to normal state to init BB retimer */ - set_mock_power_state(POWER_S0); - /* - * TODO(b/201420132) - setting power state requires to wake up - * TASK_ID_CHIPSET Sleep is required to run chipset task before - * continuing with test - */ - k_msleep(1); + power_set_state(POWER_S0); /* Test successful initialisation */ setup_ztest_proxy_init(0, 2, EC_SUCCESS); @@ -436,16 +452,6 @@ static void test_usb_mux_low_power_mode(void) { mux_state_t exp_mode, mode; - /* - * Virtual mux return ack_required in some cases, but this requires to - * run usb_mux_set in TASK_PD_C1 context. Remove virtual mux from chain - * for this test. - * - * TODO: Find way to setup PD stack in such state that notifing PD task - * results in required usb_mux_set call. - */ - org_mux[1] = NULL; - /* Test enter to low power mode */ exp_mode = USB_PD_MUX_NONE; setup_ztest_proxy_set(0, 2, EC_SUCCESS, exp_mode); @@ -708,8 +714,8 @@ static void test_usb_mux_typec_command(void) /** Setup proxy chain and uninit usb muxes */ void setup_uninit_mux(void) { - suspend_usbc_task(/*suspend=*/ true); setup_usb_mux_proxy_chain(); + set_test_runner_tid(); /* Makes sure that usb muxes of port 1 are not init */ usb_muxes[USBC_PORT_C1].flags = USB_MUX_FLAG_RESETS_IN_G3; @@ -719,8 +725,8 @@ void setup_uninit_mux(void) /** Setup proxy chain and init usb muxes */ void setup_init_mux(void) { - suspend_usbc_task(/*suspend=*/ true); setup_usb_mux_proxy_chain(); + set_test_runner_tid(); /* Makes sure that usb muxes of port 1 are init */ setup_ztest_proxy_init(0, 2, EC_SUCCESS); diff --git a/zephyr/zmake/tests/test_project.py b/zephyr/zmake/tests/test_project.py index 4d9994a108..f7688784e7 100644 --- a/zephyr/zmake/tests/test_project.py +++ b/zephyr/zmake/tests/test_project.py @@ -58,7 +58,6 @@ def test_find_dts_overlays(modules): zephyr_board=board, output_packer=zmake.output_packers.ElfPacker, supported_toolchains=["llvm"], - zephyr_version="v2.7", project_dir=pathlib.Path("/fakebuild"), ) ) @@ -93,7 +92,6 @@ def test_prune_modules(modules): zephyr_board="native_posix", output_packer=zmake.output_packers.ElfPacker, supported_toolchains=["coreboot-sdk"], - zephyr_version="v2.7", project_dir=pathlib.Path("/fake"), modules=modules, ), @@ -116,7 +114,6 @@ def test_prune_modules_unavailable(): zephyr_board="native_posix", output_packer=zmake.output_packers.ElfPacker, supported_toolchains=["coreboot-sdk"], - zephyr_version="v2.7", project_dir=pathlib.Path("/fake"), modules=["hal_stm32", "cmsis"], ), diff --git a/zephyr/zmake/tests/test_toolchains.py b/zephyr/zmake/tests/test_toolchains.py index 09d37c4c4e..fb1953052a 100644 --- a/zephyr/zmake/tests/test_toolchains.py +++ b/zephyr/zmake/tests/test_toolchains.py @@ -66,7 +66,6 @@ def fake_project(tmp_path): project.ProjectConfig( project_name="foo", zephyr_board="foo", - zephyr_version="v2.6", supported_toolchains=[ "coreboot-sdk", "host", diff --git a/zephyr/zmake/tests/test_version.py b/zephyr/zmake/tests/test_version.py index cbc1ceff88..b2c6b43fec 100644 --- a/zephyr/zmake/tests/test_version.py +++ b/zephyr/zmake/tests/test_version.py @@ -57,7 +57,6 @@ def _setup_example_repos(tmp_path): zephyr_board="foo", output_packer=zmake.output_packers.RawBinPacker, supported_toolchains=["coreboot-sdk"], - zephyr_version="v2.6", project_dir=project_path, ), ) diff --git a/zephyr/zmake/tests/test_zmake.py b/zephyr/zmake/tests/test_zmake.py index 589ee72c66..83862ce65d 100644 --- a/zephyr/zmake/tests/test_zmake.py +++ b/zephyr/zmake/tests/test_zmake.py @@ -13,6 +13,7 @@ import unittest import unittest.mock as mock from unittest.mock import patch +import pytest from testfixtures import LogCapture import zmake.build_config @@ -39,7 +40,6 @@ class FakeProject: project_name="fakeproject", zephyr_board="fakeboard", supported_toolchains=["llvm"], - zephyr_version="v2.5", output_packer=zmake.output_packers.ElfPacker, project_dir=pathlib.Path("FakeProjectDir"), ) @@ -129,12 +129,10 @@ def do_test_with_log_level(log_level, use_configure=False, fnames=None): re.compile(r".*build-rw"): get_test_filepath("rw"), } zephyr_base = mock.Mock() - zephyr_root = mock.Mock() zmk = zm.Zmake( jobserver=FakeJobserver(fnames), zephyr_base=zephyr_base, - zephyr_root=zephyr_root, ) with LogCapture(level=log_level) as cap: @@ -231,5 +229,71 @@ class TestFilters(unittest.TestCase): assert "devicetree error: 'adc' is marked as required" in list(dt_errs)[0] +@pytest.mark.parametrize( + ["project_names", "format", "search_dir", "expected_output"], + [ + ( + ["link", "samus"], + "{config.project_name}\n", + None, + "link\nsamus\n", + ), + ( + ["link", "samus"], + "{config.project_name}\n", + pathlib.Path("/foo/bar"), + "link\nsamus\n", + ), + ( + [], + "{config.project_name}\n", + None, + "", + ), + ( + ["link"], + "", + None, + "", + ), + ( + ["link"], + "{config.zephyr_board}\n", + None, + "some_board\n", + ), + ( + ["link"], + "{config.project_name} is_test={config.is_test}\n", + None, + "link is_test=False\n", + ), + ], +) +def test_list_projects(project_names, format, search_dir, expected_output, capsys): + """Test listing projects with default directory.""" + fake_projects = { + name: zmake.project.Project( + zmake.project.ProjectConfig( + project_name=name, + zephyr_board="some_board", + supported_toolchains=["coreboot-sdk"], + output_packer=zmake.output_packers.RawBinPacker, + ) + ) + for name in project_names + } + zmk = zm.Zmake() + with mock.patch( + "zmake.project.find_projects", + autospec=True, + return_value=fake_projects, + ): + zmk.list_projects(format=format, search_dir=search_dir) + + captured = capsys.readouterr() + assert captured.out == expected_output + + if __name__ == "__main__": unittest.main() diff --git a/zephyr/zmake/zmake/__main__.py b/zephyr/zmake/zmake/__main__.py index f776c1dbaa..1f9c506ee5 100644 --- a/zephyr/zmake/zmake/__main__.py +++ b/zephyr/zmake/zmake/__main__.py @@ -107,7 +107,10 @@ def main(argv=None): maybe_reexec(argv) - parser = argparse.ArgumentParser() + parser = argparse.ArgumentParser( + prog="zmake", + description="Chromium OS's meta-build tool for Zephyr", + ) parser.add_argument( "--checkout", type=pathlib.Path, help="Path to ChromiumOS checkout" ) @@ -161,20 +164,13 @@ def main(argv=None): parser.add_argument( "--zephyr-base", type=pathlib.Path, help="Path to Zephyr OS repository" ) - parser.add_argument( - "--zephyr-root", - type=pathlib.Path, - help="Path to Zephyr OS repos, must contain subdirs like v1.2", - ) sub = parser.add_subparsers(dest="subcommand", help="Subcommand") sub.required = True - configure = sub.add_parser("configure") - configure.add_argument( - "--ignore-unsupported-zephyr-version", - action="store_true", - help="Don't warn about using an unsupported Zephyr version", + configure = sub.add_parser( + "configure", + help="Set up a build directory to be built later by the build subcommand", ) configure.add_argument("-t", "--toolchain", help="Name of toolchain to use") configure.add_argument( @@ -217,7 +213,10 @@ def main(argv=None): help="Enable CONFIG_COVERAGE Kconfig.", ) - build = sub.add_parser("build") + build = sub.add_parser( + "build", + help="Execute the build from a build directory", + ) build.add_argument( "build_dir", type=pathlib.Path, @@ -230,16 +229,44 @@ def main(argv=None): help="Exit with code 2 if warnings are detected", ) - test = sub.add_parser("test") + list_projects = sub.add_parser( + "list-projects", + help="List projects known to zmake.", + ) + list_projects.add_argument( + "--format", + default="{config.project_name}\n", + help=( + "Output format to print projects (str.format(config=project.config) is " + "called on this for each project)." + ), + ) + list_projects.add_argument( + "search_dir", + type=pathlib.Path, + nargs="?", + help="Optional directory to search for BUILD.py files in.", + ) + + test = sub.add_parser( + "test", + help="Execute tests from a build directory", + ) test.add_argument( "build_dir", type=pathlib.Path, help="The build directory used during configuration", ) - sub.add_parser("testall") + sub.add_parser( + "testall", + help="Execute all known builds and tests", + ) - coverage = sub.add_parser("coverage") + coverage = sub.add_parser( + "coverage", + help="Run coverage on a build directory", + ) coverage.add_argument( "build_dir", type=pathlib.Path, diff --git a/zephyr/zmake/zmake/project.py b/zephyr/zmake/zmake/project.py index de3bc8413b..8e90372a35 100644 --- a/zephyr/zmake/zmake/project.py +++ b/zephyr/zmake/zmake/project.py @@ -55,10 +55,10 @@ def load_config_file(path): exec(code, config_globals) # Next, load the BUILD.py - logging.info("Loading config file %s", path) + logging.debug("Loading config file %s", path) code = compile(path.read_bytes(), str(path), "exec") exec(code, config_globals) - logging.info("Config file %s defines %s projects", path, len(projects)) + logging.debug("Config file %s defines %s projects", path, len(projects)) return projects @@ -71,7 +71,7 @@ def find_projects(root_dir): Returns: A dictionary mapping project names to Project objects. """ - logging.info("Finding zmake targets under '%s'.", root_dir) + logging.debug("Finding zmake targets under '%s'.", root_dir) found_projects = {} for path in pathlib.Path(root_dir).rglob("BUILD.py"): for project in load_config_file(path): @@ -91,7 +91,6 @@ class ProjectConfig: zephyr_board: str supported_toolchains: "list[str]" output_packer: type - zephyr_version: str = dataclasses.field(default="v2.7") modules: "list[str]" = dataclasses.field( default_factory=lambda: modules.known_modules, ) diff --git a/zephyr/zmake/zmake/toolchains.py b/zephyr/zmake/zmake/toolchains.py index 88b7c16e46..671c539c0f 100644 --- a/zephyr/zmake/zmake/toolchains.py +++ b/zephyr/zmake/zmake/toolchains.py @@ -107,7 +107,7 @@ class ZephyrToolchain(GenericToolchain): if not self.zephyr_sdk_install_dir: raise RuntimeError( "No installed Zephyr SDK was found" - " (see docs/zephyr_build.md for documentation)" + " (see docs/zephyr/zephyr_build.md for documentation)" ) tc_vars = { "ZEPHYR_SDK_INSTALL_DIR": str(self.zephyr_sdk_install_dir), diff --git a/zephyr/zmake/zmake/util.py b/zephyr/zmake/zmake/util.py index ca75f1b55e..ee3b245b78 100644 --- a/zephyr/zmake/zmake/util.py +++ b/zephyr/zmake/zmake/util.py @@ -64,19 +64,6 @@ def locate_cros_checkout(): raise FileNotFoundError("Unable to locate a ChromiumOS checkout") -def locate_zephyr_base(zephyr_root, version): - """Locate the path to the Zephyr RTOS in a ChromiumOS checkout. - - Args: - checkout: The path to the ChromiumOS checkout. - version: The requested zephyr version, as a tuple of integers. - - Returns: - The path to the Zephyr source. - """ - return zephyr_root / "v{}.{}".format(*version[:2]) - - def read_kconfig_file(path): """Parse a Kconfig file. @@ -132,23 +119,6 @@ def write_kconfig_file(path, config, only_if_changed=True): f.write("{}={}\n".format(name, value)) -def parse_zephyr_version(version_string): - """Parse a human-readable version string (e.g., "v2.4") as a tuple. - - Args: - version_string: The human-readable version string. - - Returns: - A 2-tuple or 3-tuple of integers representing the version. - """ - match = re.fullmatch(r"v?(\d+)[._](\d+)(?:[._](\d+))?", version_string) - if not match: - raise ValueError( - "{} does not look like a Zephyr version.".format(version_string) - ) - return tuple(int(x) for x in match.groups() if x is not None) - - def read_zephyr_version(zephyr_base): """Read the Zephyr version from a Zephyr OS checkout. diff --git a/zephyr/zmake/zmake/zmake.py b/zephyr/zmake/zmake/zmake.py index 8fc9542dca..713c6773e3 100644 --- a/zephyr/zmake/zmake/zmake.py +++ b/zephyr/zmake/zmake/zmake.py @@ -153,16 +153,17 @@ class Zmake: jobs=0, modules_dir=None, zephyr_base=None, - zephyr_root=None, ): zmake.multiproc.reset() self._checkout = checkout - self._zephyr_base = zephyr_base - if zephyr_root: - self._zephyr_root = zephyr_root + if zephyr_base: + self.zephyr_base = zephyr_base else: - self._zephyr_root = ( - self.checkout / "src" / "third_party" / "zephyr" / "main" + # TODO(b/205884929): Drop v2.7 from path. This is + # intentionally hard-coded here as an intermediate step to + # cutting over to the main branch. + self.zephyr_base = ( + self.checkout / "src" / "third_party" / "zephyr" / "main" / "v2.7" ) if modules_dir: @@ -188,28 +189,11 @@ class Zmake: self._checkout = util.locate_cros_checkout() return self._checkout.resolve() - def locate_zephyr_base(self, version): - """Locate the Zephyr OS repository. - - Args: - version: If a Zephyr OS base was not supplied to Zmake, - which version to search for as a tuple of integers. - This argument is ignored if a Zephyr base was supplied - to Zmake. - Returns: - A pathlib.Path to the found Zephyr OS repository. - """ - if self._zephyr_base: - return self._zephyr_base - - return util.locate_zephyr_base(self._zephyr_root, version) - def configure( self, project_name_or_dir, build_dir=None, toolchain=None, - ignore_unsupported_zephyr_version=False, build_after_configure=False, test_after_configure=False, bringup=False, @@ -234,7 +218,6 @@ class Zmake: project=project, build_dir=build_dir, toolchain=toolchain, - ignore_unsupported_zephyr_version=ignore_unsupported_zephyr_version, build_after_configure=build_after_configure, test_after_configure=test_after_configure, bringup=bringup, @@ -247,7 +230,6 @@ class Zmake: project, build_dir=None, toolchain=None, - ignore_unsupported_zephyr_version=False, build_after_configure=False, test_after_configure=False, bringup=False, @@ -255,23 +237,6 @@ class Zmake: allow_warnings=False, ): """Set up a build directory to later be built by "zmake build".""" - supported_version = util.parse_zephyr_version(project.config.zephyr_version) - zephyr_base = self.locate_zephyr_base(supported_version).resolve() - - # Ignore the patchset from the Zephyr version. - zephyr_version = util.read_zephyr_version(zephyr_base)[:2] - - if ( - not ignore_unsupported_zephyr_version - and zephyr_version != supported_version - ): - raise ValueError( - "The Zephyr OS version (v{}.{}) is not supported by the " - "project. You may wish to either configure BUILD.py to " - "support this version, or pass " - "--ignore-unsupported-zephyr-version.".format(*zephyr_version) - ) - # Resolve build_dir if needed. if not build_dir: build_dir = ( @@ -287,7 +252,7 @@ class Zmake: generated_include_dir = (build_dir / "include").resolve() base_config = zmake.build_config.BuildConfig( - environ_defs={"ZEPHYR_BASE": str(zephyr_base), "PATH": "/usr/bin"}, + environ_defs={"ZEPHYR_BASE": str(self.zephyr_base), "PATH": "/usr/bin"}, cmake_defs={ "CMAKE_EXPORT_COMPILE_COMMANDS": "ON", "DTS_ROOT": str(self.module_paths["ec"] / "zephyr"), @@ -307,7 +272,7 @@ class Zmake: # Symlink the Zephyr base into the build directory so it can # be used in the build phase. - util.update_symlink(zephyr_base, build_dir / "zephyr_base") + util.update_symlink(self.zephyr_base, build_dir / "zephyr_base") dts_overlay_config = project.find_dts_overlays(module_paths) @@ -845,3 +810,19 @@ class Zmake: if proc.wait(): raise OSError(get_process_failure_msg(proc)) return 0 + + def list_projects(self, format, search_dir): + """List project names known to zmake on stdout. + + Args: + format: The formatting string to print projects with. + search_dir: Directory to start the search for + BUILD.py files at. + """ + if not search_dir: + search_dir = self.module_paths["ec"] / "zephyr" + + for project in zmake.project.find_projects(search_dir).values(): + print(format.format(config=project.config), end="") + + return 0 |