diff options
| -rw-r--r-- | chip/stm32/registers.h | 8 | ||||
| -rw-r--r-- | chip/stm32/uart.c | 8 |
2 files changed, 13 insertions, 3 deletions
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h index 4a15c20d2d..70c846a683 100644 --- a/chip/stm32/registers.h +++ b/chip/stm32/registers.h @@ -608,8 +608,14 @@ typedef volatile struct timer_ctlr timer_ctlr_t; #define STM32_RCC_APB2ENR REG32(STM32_RCC_BASE + 0x60) #define STM32_RCC_CCIPR REG32(STM32_RCC_BASE + 0x88) -#define STM32_RCC_CCIPR_LPUART1SEL_SHIFT (10) +#define STM32_RCC_CCIPR_PCLK 0 +#define STM32_RCC_CCIPR_SYSCLK 1 +#define STM32_RCC_CCIPR_HSI 2 +#define STM32_RCC_CCIPR_LSE 3 #define STM32_RCC_CCIPR_USART1SEL_SHIFT (0) +#define STM32_RCC_CCIPR_USART1SEL_MASK (2 << STM32_RCC_CCIPR_USART1SEL_SHIFT) +#define STM32_RCC_CCIPR_LPUART1SEL_SHIFT (10) +#define STM32_RCC_CCIPR_LPUART1SEL_MASK (2 << STM32_RCC_CCIPR_LPUART1SEL_SHIFT) #define STM32_RCC_BDCR REG32(STM32_RCC_BASE + 0x90) diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c index d18b4b781a..8fbb6a3436 100644 --- a/chip/stm32/uart.c +++ b/chip/stm32/uart.c @@ -268,8 +268,12 @@ void uart_init(void) STM32_RCC_CFGR3 |= 0x030000; /* USART2 clock source from HSI(8MHz) */ #endif /* UARTN */ #elif defined(CHIP_FAMILY_STM32L4) - STM32_RCC_CCIPR |= (0x2 << STM32_RCC_CCIPR_USART1SEL_SHIFT); - STM32_RCC_CCIPR |= (0x2 << STM32_RCC_CCIPR_LPUART1SEL_SHIFT); + STM32_RCC_CCIPR &= ~STM32_RCC_CCIPR_USART1SEL_MASK; + STM32_RCC_CCIPR |= (STM32_RCC_CCIPR_SYSCLK << + STM32_RCC_CCIPR_USART1SEL_SHIFT); + STM32_RCC_CCIPR &= ~STM32_RCC_CCIPR_LPUART1SEL_MASK; + STM32_RCC_CCIPR |= (STM32_RCC_CCIPR_SYSCLK << + STM32_RCC_CCIPR_LPUART1SEL_SHIFT); #endif /* CHIP_FAMILY_STM32F0 || CHIP_FAMILY_STM32F3 */ /* Enable USART clock */ |