diff options
| -rw-r--r-- | chip/it83xx/clock.c | 7 | ||||
| -rw-r--r-- | include/config.h | 8 |
2 files changed, 15 insertions, 0 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index b3fad35c9a..8b2c8882c9 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -118,10 +118,17 @@ const struct clock_pll_t clock_pll_ctrl[] = { */ /* PLL:24MHz, MCU:24MHz, Fnd(e-flash):24MHz */ [PLL_24_MHZ] = {24000000, 2, 0, 0, 0, 0, 0, 2, 0, 0, 0x2}, +#ifdef CONFIG_IT83XX_FLASH_CLOCK_48MHZ + /* PLL:48MHz, MCU:48MHz, Fnd:48MHz */ + [PLL_48_MHZ] = {48000000, 4, 0, 1, 0, 1, 0, 6, 1, 0, 0x5}, + /* PLL:96MHz, MCU:96MHz, Fnd:48MHz */ + [PLL_96_MHZ] = {96000000, 7, 1, 3, 1, 3, 1, 6, 3, 1, 0xb}, +#else /* PLL:48MHz, MCU:48MHz, Fnd:24MHz */ [PLL_48_MHZ] = {48000000, 4, 1, 1, 0, 1, 0, 2, 1, 0, 0x5}, /* PLL:96MHz, MCU:96MHz, Fnd:32MHz */ [PLL_96_MHZ] = {96000000, 7, 2, 3, 1, 3, 1, 4, 3, 1, 0xb}, +#endif }; static uint8_t pll_div_fnd; diff --git a/include/config.h b/include/config.h index c1fe44aa2d..9a723f256c 100644 --- a/include/config.h +++ b/include/config.h @@ -1614,6 +1614,14 @@ /* Number of IRQs supported on the EC chip */ #undef CONFIG_IRQ_COUNT +/* + * The IT8320 supports e-flash clock up to 48 MHz (IT8390 maximum is 32 MHz). + * Enable it if we want better performance of fetching instruction from e-flash. + * + * This is valid with PLL frequency equal to 48/96MHz only. + */ +#undef CONFIG_IT83XX_FLASH_CLOCK_48MHZ + /* To define it, if I2C channel C and PECI used at the same time. */ #undef CONFIG_IT83XX_SMCLK2_ON_GPC7 |