diff options
| -rw-r--r-- | zephyr/program/skyrim/crystaldrift/src/usb_mux_config.c | 51 |
1 files changed, 43 insertions, 8 deletions
diff --git a/zephyr/program/skyrim/crystaldrift/src/usb_mux_config.c b/zephyr/program/skyrim/crystaldrift/src/usb_mux_config.c index 9b6d5f9462..4f875bc3ab 100644 --- a/zephyr/program/skyrim/crystaldrift/src/usb_mux_config.c +++ b/zephyr/program/skyrim/crystaldrift/src/usb_mux_config.c @@ -56,6 +56,19 @@ int board_c0_amd_fp6_mux_set(const struct usb_mux *me, mux_state_t mux_state) return EC_SUCCESS; } +int board_anx7483_c1_fg_defalut_tuning(const struct usb_mux *me) +{ + RETURN_ERROR( + anx7483_set_fg(me, ANX7483_PIN_URX1, ANX7483_FG_SETTING_1_2DB)); + RETURN_ERROR( + anx7483_set_fg(me, ANX7483_PIN_URX2, ANX7483_FG_SETTING_1_2DB)); + RETURN_ERROR( + anx7483_set_fg(me, ANX7483_PIN_UTX1, ANX7483_FG_SETTING_1_2DB)); + RETURN_ERROR( + anx7483_set_fg(me, ANX7483_PIN_UTX2, ANX7483_FG_SETTING_1_2DB)); + + return EC_SUCCESS; +} int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state) { bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED; @@ -68,6 +81,12 @@ int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state) RETURN_ERROR(anx7483_set_default_tuning(me, mux_state)); + /* + * Set the Flat Gain to default every time, to prevent DP only mode's + * Flat Gain change in the last plug. + */ + RETURN_ERROR(board_anx7483_c1_fg_defalut_tuning(me)); + if (mux_state == USB_PD_MUX_USB_ENABLED) { RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, ANX7483_EQ_SETTING_12_5DB)); @@ -79,31 +98,47 @@ int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state) ANX7483_EQ_SETTING_12_5DB)); } else if (mux_state == USB_PD_MUX_DP_ENABLED) { RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, - ANX7483_EQ_SETTING_12_5DB)); + ANX7483_EQ_SETTING_8_4DB)); RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, - ANX7483_EQ_SETTING_12_5DB)); + ANX7483_EQ_SETTING_8_4DB)); RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, - ANX7483_EQ_SETTING_12_5DB)); + ANX7483_EQ_SETTING_8_4DB)); RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, - ANX7483_EQ_SETTING_12_5DB)); + ANX7483_EQ_SETTING_8_4DB)); + RETURN_ERROR(anx7483_set_fg(me, ANX7483_PIN_URX1, + ANX7483_FG_SETTING_0_5DB)); + RETURN_ERROR(anx7483_set_fg(me, ANX7483_PIN_URX2, + ANX7483_FG_SETTING_0_5DB)); + RETURN_ERROR(anx7483_set_fg(me, ANX7483_PIN_UTX1, + ANX7483_FG_SETTING_0_5DB)); + RETURN_ERROR(anx7483_set_fg(me, ANX7483_PIN_UTX2, + ANX7483_FG_SETTING_0_5DB)); } else if (mux_state == USB_PD_MUX_DOCK && !flipped) { RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, ANX7483_EQ_SETTING_12_5DB)); RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, - ANX7483_EQ_SETTING_12_5DB)); + ANX7483_EQ_SETTING_8_4DB)); RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1, ANX7483_EQ_SETTING_12_5DB)); RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, - ANX7483_EQ_SETTING_12_5DB)); + ANX7483_EQ_SETTING_8_4DB)); + RETURN_ERROR(anx7483_set_fg(me, ANX7483_PIN_URX2, + ANX7483_FG_SETTING_0_5DB)); + RETURN_ERROR(anx7483_set_fg(me, ANX7483_PIN_UTX2, + ANX7483_FG_SETTING_0_5DB)); } else if (mux_state == USB_PD_MUX_DOCK && flipped) { RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, - ANX7483_EQ_SETTING_12_5DB)); + ANX7483_EQ_SETTING_8_4DB)); RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, ANX7483_EQ_SETTING_12_5DB)); RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, - ANX7483_EQ_SETTING_12_5DB)); + ANX7483_EQ_SETTING_8_4DB)); RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2, ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_fg(me, ANX7483_PIN_URX1, + ANX7483_FG_SETTING_0_5DB)); + RETURN_ERROR(anx7483_set_fg(me, ANX7483_PIN_UTX1, + ANX7483_FG_SETTING_0_5DB)); } return EC_SUCCESS; |