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-rw-r--r--common/usbc/usb_pe_drp_sm.c8
-rw-r--r--common/usbc/usb_prl_sm.c10
-rw-r--r--include/config.h15
-rw-r--r--include/usb_pd.h6
4 files changed, 28 insertions, 11 deletions
diff --git a/common/usbc/usb_pe_drp_sm.c b/common/usbc/usb_pe_drp_sm.c
index 2f627f367f..c490508674 100644
--- a/common/usbc/usb_pe_drp_sm.c
+++ b/common/usbc/usb_pe_drp_sm.c
@@ -1335,8 +1335,7 @@ static void pe_src_send_capabilities_run(int port)
* ports.
*/
prl_set_rev(port, TCPC_TX_SOP,
- (PD_HEADER_REV(emsg[port].header) > PD_REV30) ?
- PD_REV30 : PD_HEADER_REV(emsg[port].header));
+ MIN(PD_REVISION, PD_HEADER_REV(emsg[port].header)));
/*
* If port partner runs PD 2.0, cable communication must
@@ -2034,7 +2033,6 @@ static void pe_snk_wait_for_capabilities_run(int port)
static void pe_snk_evaluate_capability_entry(int port)
{
uint32_t *pdo = (uint32_t *)emsg[port].buf;
- uint32_t header = emsg[port].header;
uint32_t num = emsg[port].len >> 2;
int i;
@@ -2044,8 +2042,8 @@ static void pe_snk_evaluate_capability_entry(int port)
pe[port].hard_reset_counter = 0;
/* Set to highest revision supported by both ports. */
- prl_set_rev(port, TCPC_TX_SOP, (PD_HEADER_REV(header) > PD_REV30) ?
- PD_REV30 : PD_HEADER_REV(header));
+ prl_set_rev(port, TCPC_TX_SOP,
+ MIN(PD_REVISION, PD_HEADER_REV(emsg[port].header)));
/*
* If port partner runs PD 2.0, cable communication must
diff --git a/common/usbc/usb_prl_sm.c b/common/usbc/usb_prl_sm.c
index 9314049bf8..1cc5636118 100644
--- a/common/usbc/usb_prl_sm.c
+++ b/common/usbc/usb_prl_sm.c
@@ -322,11 +322,11 @@ static void prl_init(int port)
* partner doesn't support this revision, the Protocol Engine will
* lower this value to the revision supported by the partner.
*/
- pdmsg[port].rev[TCPC_TX_SOP] = PD_REV30;
- pdmsg[port].rev[TCPC_TX_SOP_PRIME] = PD_REV30;
- pdmsg[port].rev[TCPC_TX_SOP_PRIME_PRIME] = PD_REV30;
- pdmsg[port].rev[TCPC_TX_SOP_DEBUG_PRIME] = PD_REV30;
- pdmsg[port].rev[TCPC_TX_SOP_DEBUG_PRIME_PRIME] = PD_REV30;
+ pdmsg[port].rev[TCPC_TX_SOP] = PD_REVISION;
+ pdmsg[port].rev[TCPC_TX_SOP_PRIME] = PD_REVISION;
+ pdmsg[port].rev[TCPC_TX_SOP_PRIME_PRIME] = PD_REVISION;
+ pdmsg[port].rev[TCPC_TX_SOP_DEBUG_PRIME] = PD_REVISION;
+ pdmsg[port].rev[TCPC_TX_SOP_DEBUG_PRIME_PRIME] = PD_REVISION;
pdmsg[port].flags = 0;
prl_hr[port].flags = 0;
diff --git a/include/config.h b/include/config.h
index ba48d21b71..89b622cd85 100644
--- a/include/config.h
+++ b/include/config.h
@@ -3746,7 +3746,20 @@
/* Define if this board, operating as a sink, can give power back to a source */
#undef CONFIG_USB_PD_GIVE_BACK
-/* Enable USB PD Rev3.0 features */
+/*
+ * Enable USB PD Rev2.0 features only
+ * NOTE:
+ * This flag is only used with TCPMv2. The TCPMv2 stack defaults to PD3.0
+ * and this flag disabled PD3.0 features.
+ */
+#undef CONFIG_USB_PD_REV20
+
+/*
+ * Enable USB PD Rev3.0 features
+ * NOTE:
+ * This flag is only used with TCPMv1. The TCPMv1 stack defaults to PD2.0
+ * and this flag enabled PD3.0 features.
+ */
#undef CONFIG_USB_PD_REV30
/* Major and Minor ChromeOS specific PD device Hardware IDs. */
diff --git a/include/usb_pd.h b/include/usb_pd.h
index 8f313b8c64..cdd111d687 100644
--- a/include/usb_pd.h
+++ b/include/usb_pd.h
@@ -546,6 +546,12 @@ enum pd_rev_type {
PD_REV30,
};
+#ifdef CONFIG_USB_PD_REV20
+#define PD_REVISION PD_REV20
+#else
+#define PD_REVISION PD_REV30
+#endif
+
/* Cable structure for storing cable attributes */
struct pd_cable {
/* Note: the following fields are used by TCPMv1 */