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-rw-r--r--board/cheza/build.mk2
-rw-r--r--board/npcx7_evb/board.h2
-rw-r--r--board/npcx7_evb/build.mk12
-rw-r--r--board/yorp/build.mk2
-rw-r--r--chip/npcx/config_chip-npcx5.h2
-rw-r--r--chip/npcx/config_chip-npcx7.h31
-rw-r--r--chip/npcx/config_flash_layout.h6
-rw-r--r--chip/npcx/registers.h2
-rw-r--r--chip/npcx/system.c2
-rw-r--r--chip/npcx/wov.c2
-rwxr-xr-xutil/ecst.c29
11 files changed, 45 insertions, 47 deletions
diff --git a/board/cheza/build.mk b/board/cheza/build.mk
index ea9523843b..92f46b88d9 100644
--- a/board/cheza/build.mk
+++ b/board/cheza/build.mk
@@ -8,6 +8,6 @@
CHIP:=npcx
CHIP_FAMILY:=npcx7
-CHIP_VARIANT:=npcx7m7w
+CHIP_VARIANT:=npcx7m7wb
board-y=board.o
diff --git a/board/npcx7_evb/board.h b/board/npcx7_evb/board.h
index 2449b07636..250619a922 100644
--- a/board/npcx7_evb/board.h
+++ b/board/npcx7_evb/board.h
@@ -11,7 +11,7 @@
/*
* npcx7 EVB version:
* 1 - for EVB version 1 which supports npcx7m6f/npcx7m6g
- * 2 - for EVB version 2 which supports npcx7m7w/npcx7m6xb
+ * 2 - for EVB version 2 which supports npcx7m7wb/npcx7m6fb
*/
#define BOARD_VERSION 2
diff --git a/board/npcx7_evb/build.mk b/board/npcx7_evb/build.mk
index af5c355292..84c7c83dd0 100644
--- a/board/npcx7_evb/build.mk
+++ b/board/npcx7_evb/build.mk
@@ -6,15 +6,15 @@
# Board specific files build
#
-# the IC is Nuvoton NPCX7 M-Series EC (npcx7m6g, npcx7m6f, npcx7m6xb, npcx7m7w)
+# the IC is Nuvoton NPCX7 M-Series EC (npcx7m6g, npcx7m6f, npcx7m6fb, npcx7m7wb)
# CHIP_VARIANT:
-# npcx7m6f - for npcx7 ec with 144 pins package
-# npcx7m6g - for npcx7 ec with 128 pins package
-# npcx7m6xb - for npcx7 ec with 144 pins package, enhanced features.
-# npcx7m7w - for npcx7 ec with 144 pins package, enhanced features + WOV.
+# npcx7m6g - for npcx7 ec without internal flash
+# npcx7m6f - for npcx7 ec with internal flash
+# npcx7m6fb - for npcx7 ec with internal flash, enhanced features.
+# npcx7m7wb - for npcx7 ec with internal flash, enhanced features + WOV.
CHIP:=npcx
CHIP_FAMILY:=npcx7
-CHIP_VARIANT:=npcx7m7w
+CHIP_VARIANT:=npcx7m7wb
board-y=board.o
diff --git a/board/yorp/build.mk b/board/yorp/build.mk
index 797f24957a..7e806f4667 100644
--- a/board/yorp/build.mk
+++ b/board/yorp/build.mk
@@ -8,7 +8,7 @@
CHIP:=npcx
CHIP_FAMILY:=npcx7
-CHIP_VARIANT:=npcx7m6xb
+CHIP_VARIANT:=npcx7m6fb
BASEBOARD:=octopus
board-y=board.o led.o
diff --git a/chip/npcx/config_chip-npcx5.h b/chip/npcx/config_chip-npcx5.h
index 98ea716646..9abe21d1c9 100644
--- a/chip/npcx/config_chip-npcx5.h
+++ b/chip/npcx/config_chip-npcx5.h
@@ -7,7 +7,7 @@
/*
* NPCX5 Series Device-Specific Information
- * Ex. NPCX5-M-N-G
+ * Ex. NPCX5(M)(N)(G)
* @param M: 7: 132-pins package, 8: 128-pins package
* @param N: 5: 128KB RAM Size, 6: 256KB RAM Size
* @param G: Google EC.
diff --git a/chip/npcx/config_chip-npcx7.h b/chip/npcx/config_chip-npcx7.h
index 74a4c30c36..93525fadc7 100644
--- a/chip/npcx/config_chip-npcx7.h
+++ b/chip/npcx/config_chip-npcx7.h
@@ -8,28 +8,29 @@
/*
* NPCX7 Series Device-Specific Information
- * Ex. NPCX7-M-N-G/K/F
- * @param M: 9: 144-pins package
+ * Ex. NPCX7(M)(N)(G/K/F)(B/C)
+ * @param M: 8: 128-pins package, 9: 144-pins package
* @param N: 5: 128KB RAM Size, 6: 256KB RAM Size, 7: 384KB RAM Size
- * @param G/K/F: Google EC depends on specific features.
+ * @param G/K/F/W: Google EC depends on specific features.
+ * @param B/C: (Optional) Chip generation in the same series.
*/
/*****************************************************************************/
/* Hardware features */
/* The optional hardware features depend on chip variant */
-#if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M7W) || \
- defined(CHIP_VARIANT_NPCX7M6XB)
+#if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6FB) || \
+ defined(CHIP_VARIANT_NPCX7M7WB)
#define NPCX_INT_FLASH_SUPPORT /* Internal flash support */
#define NPCX_PSL_MODE_SUPPORT /* Power switch logic mode for ultra-low power */
#define NPCX_EXT32K_OSC_SUPPORT /* External 32KHz crytal osc. input support */
#endif
-#if defined(CHIP_VARIANT_NPCX7M7W) || defined(CHIP_VARIANT_NPCX7M6XB)
+#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M7WB)
#define NPCX_UART_FIFO_SUPPORT
#endif
-#ifdef CHIP_VARIANT_NPCX7M7W
+#ifdef CHIP_VARIANT_NPCX7M7WB
#define NPCX_WOV_SUPPORT /* Audio front-end for Wake-on-Voice support */
#endif
@@ -60,13 +61,13 @@
/* no low power ram in npcx7 series */
/* Use chip variant to specify the size and start address of program memory */
-#if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6G) || \
- defined(CHIP_VARIANT_NPCX7M6XB)
+#if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6FB) || \
+ defined(CHIP_VARIANT_NPCX7M6G)
/* 192KB RAM for FW code */
#define NPCX_PROGRAM_MEMORY_SIZE (192 * 1024)
/* program memory base address for 192KB Code RAM (ie. 0x100C0000 - 192KB) */
#define CONFIG_PROGRAM_MEMORY_BASE 0x10090000
-#elif defined(CHIP_VARIANT_NPCX7M7W)
+#elif defined(CHIP_VARIANT_NPCX7M7WB)
/* 320 RAM for FW code */
#define NPCX_PROGRAM_MEMORY_SIZE (320 * 1024)
/* program memory base address for 320KB Code RAM (ie. 0x100C0000 - 320KB) */
@@ -77,14 +78,14 @@
/* Total RAM size checking for npcx ec */
#define NPCX_RAM_SIZE (CONFIG_DATA_RAM_SIZE + NPCX_PROGRAM_MEMORY_SIZE)
-#if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6G) || \
- defined(CHIP_VARIANT_NPCX7M6XB)
-/* 256KB RAM in NPCX7M6F/NPCX7M6G/NPCX7M6XB */
+#if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6FB) || \
+ defined(CHIP_VARIANT_NPCX7M6G)
+/* 256KB RAM in NPCX7M6F/NPCX7M6G/NPCX7M6FB */
#if (NPCX_RAM_SIZE != 0x40000)
#error "Wrong memory mapping layout for NPCX7M6F"
#endif
-#elif defined(CHIP_VARIANT_NPCX7M7W)
-/* 384KB RAM in NPCX7M7W */
+#elif defined(CHIP_VARIANT_NPCX7M7WB)
+/* 384KB RAM in NPCX7M7WB */
#if (NPCX_RAM_SIZE != 0x60000)
#error "Wrong memory mapping layout for NPCX7M6F"
#endif
diff --git a/chip/npcx/config_flash_layout.h b/chip/npcx/config_flash_layout.h
index 382f807e1a..e517ce4398 100644
--- a/chip/npcx/config_flash_layout.h
+++ b/chip/npcx/config_flash_layout.h
@@ -30,13 +30,13 @@
#define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x40000
#define CONFIG_EC_WRITABLE_STORAGE_OFF 0x40000
#define CONFIG_EC_WRITABLE_STORAGE_SIZE 0x40000
-#elif defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6G) || \
- defined(CHIP_VARIANT_NPCX7M6XB)
+#elif defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6FB) || \
+ defined(CHIP_VARIANT_NPCX7M6G)
#define CONFIG_EC_PROTECTED_STORAGE_OFF 0
#define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x40000
#define CONFIG_EC_WRITABLE_STORAGE_OFF 0x40000
#define CONFIG_EC_WRITABLE_STORAGE_SIZE 0x40000
-#elif defined(CHIP_VARIANT_NPCX7M7W)
+#elif defined(CHIP_VARIANT_NPCX7M7WB)
#define CONFIG_EC_PROTECTED_STORAGE_OFF 0
#define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x80000
#define CONFIG_EC_WRITABLE_STORAGE_OFF 0x80000
diff --git a/chip/npcx/registers.h b/chip/npcx/registers.h
index dee7629540..c30ada4207 100644
--- a/chip/npcx/registers.h
+++ b/chip/npcx/registers.h
@@ -1201,7 +1201,7 @@ enum PM_CHANNEL_T {
/* BBRAM register fields */
#define NPCX_BKUP_STS_IBBR 7
-#if defined(CHIP_VARIANT_NPCX7M7W) || defined(CHIP_VARIANT_NPCX7M6XB)
+#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M7WB)
#define NPCX_BBRAM_SIZE 128 /* Size of BBRAM */
#else
#define NPCX_BBRAM_SIZE 64 /* Size of BBRAM */
diff --git a/chip/npcx/system.c b/chip/npcx/system.c
index 059a75b6da..3c5b89c253 100644
--- a/chip/npcx/system.c
+++ b/chip/npcx/system.c
@@ -697,7 +697,7 @@ void system_pre_init(void)
NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_6) = pwdwn6;
#if defined(CHIP_FAMILY_NPCX7)
-#if defined(CHIP_VARIANT_NPCX7M7W) || defined(CHIP_VARIANT_NPCX7M6XB)
+#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M7WB)
NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_7) = 0xE7;
#else
NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_7) = 0x07;
diff --git a/chip/npcx/wov.c b/chip/npcx/wov.c
index 5892f490a8..090a66ebdf 100644
--- a/chip/npcx/wov.c
+++ b/chip/npcx/wov.c
@@ -261,7 +261,7 @@ static enum ec_error_list wov_calc_pll_div_l(uint32_t i2s_clk_freq,
/*
* The code below implemented the “PLL setting option” table as
- * describe in the NPCX7m7w specification document.
+ * describe in the NPCX7m7wb specification document.
* - Total_div is VCO frequency in MHz / 12 MHz
* - d_f is the Feedback Divider
* - d_in is the Input Divider (PLL_INDV)
diff --git a/util/ecst.c b/util/ecst.c
index cf4752041c..773f0d270c 100755
--- a/util/ecst.c
+++ b/util/ecst.c
@@ -43,6 +43,10 @@ struct chip_info chip_info[] = {{NPCX5M5G_RAM_ADDR, NPCX5M5G_RAM_SIZE},
{NPCX7M6X_RAM_ADDR, NPCX7M6X_RAM_SIZE},
{NPCX7M7X_RAM_ADDR, NPCX7M7X_RAM_SIZE},};
+/* Support chips name strings */
+const char *supported_chips = "npcx5m5g, npcx5m6g, npcx7m5g, npcx7m6g, "
+ "npcx7m6f, npcx7m6fb or npcx7m7wb";
+
static unsigned int calc_api_csum_bin(void);
static unsigned int initialize_crc_32(void);
static unsigned int update_crc_32(unsigned int crc, char c);
@@ -192,15 +196,12 @@ int main(int argc, char *argv[])
(sscanf(hdr_args[arg_ind],
"%s",
main_str_temp) != 1)) {
- my_printf(TERR, "\nCannot read chip name, ");
- my_printf(TERR, "npcx7m7w");
- my_printf(TERR, "npcx7m6xb, npcx7m6f");
- my_printf(TERR, ", npcx7m6g, npcx7m5g");
- my_printf(TERR, ", npcx5m5g or npcx5m6g.\n");
+ my_printf(TERR, "\nCannot read chip name %s.\n",
+ supported_chips);
main_status = FALSE;
} else {
if (str_cmp_no_case(main_str_temp,
- "npcx7m7w") == 0) {
+ "npcx7m7wb") == 0) {
if ((bin_params.bin_params
& BIN_FW_LOAD_START_ADDR) ==
0x00000000)
@@ -220,7 +221,7 @@ int main(int argc, char *argv[])
} else if ((str_cmp_no_case(main_str_temp,
"npcx7m6f") == 0) ||
(str_cmp_no_case(main_str_temp,
- "npcx7m6xb") == 0) ||
+ "npcx7m6fb") == 0) ||
(str_cmp_no_case(main_str_temp,
"npcx7m6g") == 0)) {
if ((bin_params.bin_params
@@ -302,11 +303,8 @@ int main(int argc, char *argv[])
my_printf(TERR,
"\nInvalid chip name (%s) ",
main_str_temp);
- my_printf(TERR, "should be npcx7m7w, ");
- my_printf(TERR, "npcx7m6xb, ");
- my_printf(TERR, "npcx7m6f, npcx7m6g, ");
- my_printf(TERR, "npcx7m5g, npcx5m5g, ");
- my_printf(TERR, "or npcx5m6g.");
+ my_printf(TERR, ", it should be %s.\n",
+ supported_chips);
main_status = FALSE;
}
@@ -841,10 +839,9 @@ void exit_with_usage(void)
my_printf(TUSG, "(default is out_<input_filename>.bin)");
my_printf(TUSG, "\n -argfile <filename> - Arguments file name; ");
my_printf(TUSG, "includes multiple flags");
- my_printf(TUSG, "\n -chip <name> - EC Chip Name: ");
- my_printf(TUSG, "npcx7m7w|npcx7m6f|npcx7m6xb|npcx7m6g|npcx7m5g|");
- my_printf(TUSG, "npcx5m5g|npcx5m6g");
- my_printf(TUSG, " (default is npcx5m5g)");
+ my_printf(TUSG, "\n -chip <name> - Supported EC Chip Name: ");
+ my_printf(TUSG, "%s. ", supported_chips);
+ my_printf(TUSG, "(default is npcx5m5g)");
my_printf(TUSG, "\n -v - Verbose; prints ");
my_printf(TUSG, "information messages");
my_printf(TUSG, "\n -vv - Super Verbose; prints ");