diff options
-rw-r--r-- | chip/it83xx/clock.c | 10 | ||||
-rw-r--r-- | chip/it83xx/intc.h | 1 |
2 files changed, 11 insertions, 0 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index 613b5db04d..c52edb6f6a 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -262,6 +262,16 @@ void clock_init(void) */ IT83XX_GCTRL_RSTS = (IT83XX_GCTRL_RSTS & 0x3F) + 0x40; +#if defined(IT83XX_ESPI_RESET_MODULE_BY_FW) && defined(CONFIG_HOSTCMD_ESPI) + /* + * Because we don't support eSPI HW reset function (b/111480168) on DX + * version, so we have to reset eSPI configurations during init to + * ensure Host and EC are synchronized (especially for the field of + * I/O mode) + */ + if (!system_jumped_to_this_image()) + espi_fw_reset_module(); +#endif /* Turn off auto clock gating. */ IT83XX_ECPM_AUTOCG = 0x00; diff --git a/chip/it83xx/intc.h b/chip/it83xx/intc.h index 1b085498fc..9fa6341953 100644 --- a/chip/it83xx/intc.h +++ b/chip/it83xx/intc.h @@ -22,6 +22,7 @@ void clock_sleep_mode_wakeup_isr(void); int clock_ec_wake_from_sleep(void); void __enter_hibernate(uint32_t seconds, uint32_t microseconds); void espi_reset_pin_asserted_interrupt(enum gpio_signal signal); +void espi_fw_reset_module(void); void espi_interrupt(void); void espi_vw_interrupt(void); void espi_init(void); |