diff options
| -rw-r--r-- | Makefile.rules | 8 | ||||
| -rw-r--r-- | board/kukui_scp/board.h | 6 | ||||
| -rw-r--r-- | chip/mt_scp/memmap.c | 5 | ||||
| -rw-r--r-- | common/firmware_image.S | 8 | ||||
| -rw-r--r-- | common/firmware_image.lds.S | 9 | ||||
| -rw-r--r-- | core/cortex-m/ec.lds.S | 11 | ||||
| -rw-r--r-- | include/config.h | 15 |
7 files changed, 61 insertions, 1 deletions
diff --git a/Makefile.rules b/Makefile.rules index bf7680cd43..28eae3a7d3 100644 --- a/Makefile.rules +++ b/Makefile.rules @@ -61,8 +61,9 @@ cmd_obj_to_bin ?= $(OBJCOPY) --gap-fill=0xff -O binary $^ $(out)/$*.bin.tmp cmd_flat_to_obj = $(CC) -Wl,-T $(out)/firmware_image.lds -nostdlib $(CPPFLAGS) \ -Wl,--build-id=none -o $@ $< # Allow the .roshared section to overlap other sections (itself) -cmd_ec_elf_to_flat ?= $(OBJCOPY) --set-section-flags .roshared=share \ +cmd_ec_elf_to_flat ?= $(OBJCOPY) --set-section-flags .roshared=share -R .dram \ -O binary $< $@ +cmd_ec_elf_to_flat_dram ?= $(OBJCOPY) -j .dram -O binary $< $@ cmd_elf_to_signed ?= $(SIGNER) --key=util/signer/$(3) \ --b --input=$< --format=bin --output=$@.signed $(SIGNER_EXTRAS) \ && sudo chown $(shell whoami) $@.signed && mv $@.signed $@ @@ -382,6 +383,8 @@ flat-$(CONFIG_FW_INCLUDE_RO) += $(out)/RO/$(PROJECT).RO.flat deps += $(out)/firmware_image.lds.d $(flat-y:%.flat=%.lds.d) +flat-$(CONFIG_DRAM_BASE) += $(out)/RW/$(PROJECT).RW.flat.dram + flat-$(CONFIG_RWSIG_TYPE_RWSIG) += $(out)/key.vbpubk2 flat-$(CONFIG_RWSIG_TYPE_RWSIG) += $(out)/RW/$(PROJECT).RW.flat.sig @@ -401,6 +404,9 @@ ifeq ($(SIGNED_IMAGES),) $(out)/%.flat: $(out)/%.elf $(out)/%.smap utils-build $(call quiet,ec_elf_to_flat,OBJCOPY) +$(out)/%.flat.dram: $(out)/%.elf $(out)/%.smap utils-build + $(call quiet,ec_elf_to_flat_dram,OBJCOPY) + $(out)/RO/%.hex: $(out)/RO/%.elf $(out)/RO/%.smap $(call quiet,elf_to_hex,OBJCOPY) else diff --git a/board/kukui_scp/board.h b/board/kukui_scp/board.h index c9093e9663..7c0eca93c4 100644 --- a/board/kukui_scp/board.h +++ b/board/kukui_scp/board.h @@ -12,6 +12,12 @@ #undef CONFIG_LID_SWITCH #undef CONFIG_FW_INCLUDE_RO +/* Access DRAM through cached access */ +#define CONFIG_DRAM_BASE 0x10000000 +/* Shared memory address in AP physical address space. */ +#define CONFIG_DRAM_BASE_LOAD 0x50000000 +#define CONFIG_DRAM_SIZE 0x01400000 /* 20 MB */ + /* IPI configs */ #define CONFIG_IPI diff --git a/chip/mt_scp/memmap.c b/chip/mt_scp/memmap.c index cec1e5496b..83322d493a 100644 --- a/chip/mt_scp/memmap.c +++ b/chip/mt_scp/memmap.c @@ -240,6 +240,11 @@ int memmap_scp_to_ap(uintptr_t scp_addr, uintptr_t *ap_addr) return EC_SUCCESS; } +#ifdef CONFIG_DRAM_BASE +BUILD_ASSERT(CONFIG_DRAM_BASE_LOAD == CACHE_TRANS_AP_ADDR); +BUILD_ASSERT(CONFIG_DRAM_BASE == CACHE_TRANS_SCP_CACHE_ADDR); +#endif + int memmap_ap_to_scp_cache(uintptr_t ap_addr, uintptr_t *scp_addr) { uintptr_t lsb; diff --git a/common/firmware_image.S b/common/firmware_image.S index a19968994f..a0924979c2 100644 --- a/common/firmware_image.S +++ b/common/firmware_image.S @@ -16,6 +16,8 @@ #define STRINGIFY(name) STRINGIFY0(name) #define FW_IMAGE(sect,suffix) \ STRINGIFY(FW_FILE(FINAL_OUTDIR,PROJECT,sect,suffix,)) +#define FW_IMAGE_DRAM(sect,suffix) \ + STRINGIFY(FW_FILE(FINAL_OUTDIR,PROJECT,sect,suffix,.dram)) #define FW_IMAGE_SIGN(sect,suffix) \ STRINGIFY(FW_FILE(FINAL_OUTDIR,PROJECT,sect,suffix,.sig)) @@ -56,6 +58,12 @@ .incbin FW_IMAGE_SIGN(RW,) #endif +#ifdef CONFIG_DRAM_BASE +/* Read Write firmware in DRAM */ +.section .image.RW.dram, "ax" +.incbin FW_IMAGE_DRAM(RW,) +#endif + #ifdef CONFIG_RW_B #ifdef CONFIG_RWSIG_TYPE_RWSIG .section .image.RW_B, "ax" diff --git a/common/firmware_image.lds.S b/common/firmware_image.lds.S index 8e82dcf1de..afae2f1624 100644 --- a/common/firmware_image.lds.S +++ b/common/firmware_image.lds.S @@ -40,6 +40,9 @@ OUTPUT_ARCH(BFD_ARCH) MEMORY { FLASH (rx) : ORIGIN = CONFIG_PROGRAM_MEMORY_BASE, LENGTH = CONFIG_FLASH_SIZE +#ifdef CONFIG_DRAM_BASE + DRAM (rx) : ORIGIN = CONFIG_DRAM_BASE_LOAD, LENGTH = CONFIG_DRAM_SIZE +#endif } SECTIONS { @@ -87,4 +90,10 @@ SECTIONS .padding : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_FLASH_SIZE - 1) { BYTE(0xff); } > FLASH =0xff + +#ifdef CONFIG_DRAM_BASE + .image.RW.dram : AT(CONFIG_DRAM_BASE_LOAD) { + *(.image.RW.dram) + } > DRAM =0x00 +#endif } diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S index 2a9a9b2fe0..8bd5bfa21a 100644 --- a/core/cortex-m/ec.lds.S +++ b/core/cortex-m/ec.lds.S @@ -64,6 +64,10 @@ MEMORY #undef REGION #undef REGION_LOAD #endif /* CONFIG_MEMORY_REGIONS */ + +#ifdef CONFIG_DRAM_BASE + DRAM (rwx) : ORIGIN = CONFIG_DRAM_BASE, LENGTH = CONFIG_DRAM_SIZE +#endif } SECTIONS { @@ -422,6 +426,13 @@ SECTIONS #undef REGION_LOAD #endif /* CONFIG_CHIP_MEMORY_REGIONS */ +#ifdef CONFIG_DRAM_BASE + .dram : { + KEEP(*(SORT(.dram.keep.*))) + *(SORT(.dram.*)) + } > DRAM +#endif + #if !(defined(SECTION_IS_RO) && defined(CONFIG_FLASH)) /DISCARD/ : { *(.google) diff --git a/include/config.h b/include/config.h index 8163205c02..0a3a0b8e02 100644 --- a/include/config.h +++ b/include/config.h @@ -1344,6 +1344,21 @@ /* Compile extra debugging and tests for the DMA module */ #undef CONFIG_DMA_HELP +/* + * If the board supports DRAM, base DRAM address for the chip, where we want + * to load extra code/data (address from chip address space). + */ +#undef CONFIG_DRAM_BASE + +/* + * If the board supports DRAM, base DRAM address to load the extra code/data + * (if loaded by AP, this is the AP physical address space). + */ +#undef CONFIG_DRAM_BASE_LOAD + +/* DRAM size. */ +#undef CONFIG_DRAM_SIZE + /* Usually, EC capable of sensor speeds up to 250 Hz */ #define CONFIG_EC_MAX_SENSOR_FREQ_DEFAULT_MILLIHZ 250000 |